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Searched refs:cpu_pri (Results 1 – 9 of 9) sorted by relevance

/titanic_41/usr/src/uts/i86pc/sys/
H A Dmachcpuvar.h163 #define cpu_pri cpu_m.mcpu_pri macro
/titanic_41/usr/src/uts/i86pc/io/apix/
H A Dapix_intr.c389 oldipl = cpu->cpu_pri; in apix_do_softint()
579 oldipl = cpu->cpu_pri; in apix_do_pending_hilevel()
779 oldipl = cpu->cpu_pri; in apix_do_pending_hardint()
872 int vector = rp->r_trapno, newipl, oldipl = cpu->cpu_pri, ret; in apix_do_interrupt()
/titanic_41/usr/src/uts/i86xpv/os/
H A Devtchn.c1322 ttp->ttr_pri = cpu->cpu_pri; in xen_callback_handler()
1384 curpri = cpu->cpu_pri; in xen_callback_handler()
1434 if (cpu->cpu_pri != curpri) in xen_callback_handler()
1446 if (sipri > pri && sipri > cpu->cpu_pri) { in xen_callback_handler()
1452 if (cpu->cpu_pri != curpri) in xen_callback_handler()
/titanic_41/usr/src/uts/i86xpv/io/psm/
H A Dxpv_uppc.c781 } else if (newipl <= cpu->cpu_pri) { in xen_uppc_intr_enter()
790 newipl = cpu->cpu_pri + 1; /* synthetic priority */ in xen_uppc_intr_enter()
H A Dxpv_psm.c551 } else if (newipl <= cpu->cpu_pri) { in xen_psm_intr_enter()
563 newipl = cpu->cpu_pri + 1; /* synthetic priority */ in xen_psm_intr_enter()
/titanic_41/usr/src/uts/i86pc/os/
H A Dintr.c1320 oldipl = cpu->cpu_pri; in dosoftint()
1342 int newipl, oldipl = cpu->cpu_pri; in do_interrupt()
1380 cpu->cpu_pri = newipl; in do_interrupt()
H A Ddtrace_subr.c103 return (CPU->cpu_pri); in dtrace_getipl()
H A Dmlsetup.c336 CPU->cpu_pri = 12; /* initial PIL for the boot CPU */ in mlsetup()
H A Dmp_machdep.c1181 setspl(CPU->cpu_pri); in mach_picinit()