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Searched refs:base_addr (Results 1 – 25 of 36) sorted by relevance

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/titanic_41/usr/src/uts/sun4u/io/pciex/
H A Dpci_cfgacc_4u.c64 uint64_t base_addr; in pci_cfgacc_get() local
70 base_addr = bus_p->bus_cfgacc_base; in pci_cfgacc_get()
71 base_addr += RC_BDF_TO_CFGADDR(bdf, offset); in pci_cfgacc_get()
75 val = ldbphysio(base_addr); in pci_cfgacc_get()
78 val = ldhphysio(base_addr); in pci_cfgacc_get()
81 val = ldphysio(base_addr); in pci_cfgacc_get()
84 val = lddphysio(base_addr); in pci_cfgacc_get()
98 uint64_t base_addr; in pci_cfgacc_set() local
103 base_addr = bus_p->bus_cfgacc_base; in pci_cfgacc_set()
104 base_addr += RC_BDF_TO_CFGADDR(bdf, offset); in pci_cfgacc_set()
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/titanic_41/usr/src/grub/grub-0.97/netboot/
H A Dtlan.h396 inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr) in TLan_DioRead8() argument
398 outw(internal_addr, base_addr + TLAN_DIO_ADR); in TLan_DioRead8()
399 return (inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3))); in TLan_DioRead8()
406 inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr) in TLan_DioRead16() argument
408 outw(internal_addr, base_addr + TLAN_DIO_ADR); in TLan_DioRead16()
409 return (inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2))); in TLan_DioRead16()
416 inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr) in TLan_DioRead32() argument
418 outw(internal_addr, base_addr + TLAN_DIO_ADR); in TLan_DioRead32()
419 return (inl(base_addr + TLAN_DIO_DATA)); in TLan_DioRead32()
426 inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data) in TLan_DioWrite8() argument
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/titanic_41/usr/src/uts/sun4u/io/pci/
H A Dpci_tools.c113 uint64_t base_addr, uint64_t max_addr, uint8_t size, boolean_t write_flag);
630 uint64_t base_addr; in pcitool_bus_reg_ops() local
670 base_addr = pci_rp[prg.barnum].phys_addr; in pcitool_bus_reg_ops()
671 max_addr = base_addr + pci_rp[prg.barnum].size; in pcitool_bus_reg_ops()
672 prg.phys_addr = base_addr + prg.offset; in pcitool_bus_reg_ops()
677 base_addr, prg.offset, prg.phys_addr, max_addr); in pcitool_bus_reg_ops()
809 pcitool_config_request(pci_t *pci_p, pcitool_reg_t *prg, uint64_t base_addr, in pcitool_config_request() argument
816 prg->phys_addr = base_addr + prg->offset; in pcitool_config_request()
820 base_addr, prg->offset, prg->phys_addr, in pcitool_config_request()
841 uint64_t base_addr; in pcitool_dev_reg_ops() local
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H A Dpci_pbm.c63 uint64_t base_addr, last_addr; in pbm_create() local
92 base_addr = -1ull; in pbm_create()
104 base_addr = MIN(rng_addr, base_addr); in pbm_create()
108 pbm_p->pbm_base_pfn = mmu_btop(base_addr); in pbm_create()
H A Dpci_dma.c1638 pci_vmem_do_free(iommu_t *iommu_p, void *base_addr, size_t npages, in pci_vmem_do_free() argument
1644 vmem_free(map_p, base_addr, IOMMU_PAGE_SIZE); in pci_vmem_do_free()
1651 vmem_xfree(map_p, base_addr, IOMMU_PTOB(npages)); in pci_vmem_do_free()
/titanic_41/usr/src/uts/sun4/io/px/
H A Dpx_fm.c297 uint64_t addr, base_addr; in px_fm_callback() local
327 base_addr = px_in_addr_range(dip, ranges_p, fault_addr); in px_fm_callback()
328 if (base_addr) { in px_fm_callback()
340 addr = fault_addr - base_addr; in px_fm_callback()
849 uint64_t base_addr, range_addr; in px_err_pio_hdl_check() local
869 base_addr = (hp->ah_pfn << MMU_PAGESHIFT) + hp->ah_offset; in px_err_pio_hdl_check()
873 range_addr = px_in_addr_range(dip, ranges_p, base_addr); in px_err_pio_hdl_check()
879 base_addr = base_addr - range_addr; in px_err_pio_hdl_check()
891 if (((fault_addr >= base_addr) && (fault_addr < (base_addr + size))) || in px_err_pio_hdl_check()
914 uint32_t base_addr; in px_err_dma_hdl_check() local
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/titanic_41/usr/src/uts/common/sys/fibre-channel/fca/emlxs/
H A Demlxs_mdb.h46 int emlxs_msgbuf(uintptr_t base_addr, uint_t flags, int argc,
51 int emlxs_dump(uintptr_t base_addr, uint_t flags, int argc,
/titanic_41/usr/src/uts/common/io/sfe/
H A Dsfe_util.h68 (void *)((caddr_t)((dp)->base_addr) + (p)), v)
71 (void *)((caddr_t)((dp)->base_addr) + (p)), v)
74 (void *)((caddr_t)((dp)->base_addr) + (p)), v)
77 (void *)((caddr_t)((dp)->base_addr) + (p)), v); \
81 (void *)(((caddr_t)(dp)->base_addr) + (p)))
84 (void *)(((caddr_t)(dp)->base_addr) + (p)))
87 (void *)(((caddr_t)(dp)->base_addr) + (p)))
192 void *base_addr; member
/titanic_41/usr/src/uts/sun4u/io/px/
H A Dpx_tools_4u.c348 uint64_t base_addr; in pxtool_bus_reg_ops() local
389 base_addr = px_rp[prg.barnum].phys_addr; in pxtool_bus_reg_ops()
390 prg.phys_addr = base_addr + prg.offset; in pxtool_bus_reg_ops()
395 base_addr, prg.offset, prg.phys_addr, px_rp[prg.barnum].size); in pxtool_bus_reg_ops()
/titanic_41/usr/src/uts/sun4u/excalibur/io/
H A Dxcalppm.c227 caddr_t base_addr; in xcppm_map_all_regs() local
239 rv0 = ddi_regs_map_setup(dip, 0, &base_addr, 0, 0, &attr_be, in xcppm_map_all_regs()
242 unitp->regs.bbc_estar_ctrl = (uint16_t *)(base_addr + in xcppm_map_all_regs()
244 unitp->regs.bbc_assert_change = (uint32_t *)(base_addr + in xcppm_map_all_regs()
246 unitp->regs.bbc_pll_settle = (uint32_t *)(base_addr + in xcppm_map_all_regs()
253 rv2 = ddi_regs_map_setup(dip, 2, &base_addr, in xcppm_map_all_regs()
256 unitp->regs.gpio_bank_sel_index = (uint8_t *)(base_addr + in xcppm_map_all_regs()
258 unitp->regs.gpio_bank_sel_data = (uint8_t *)(base_addr + in xcppm_map_all_regs()
261 rv3 = ddi_regs_map_setup(dip, 3, &base_addr, 0, 0, &attr_le, in xcppm_map_all_regs()
264 unitp->regs.gpio_port1_data = (uint8_t *)(base_addr + in xcppm_map_all_regs()
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/titanic_41/usr/src/uts/intel/sys/acpi/
H A Dacpi_pci.h43 UINT64 base_addr; member
/titanic_41/usr/src/uts/common/io/ntxn/
H A Dunm_nic_init.c135 unsigned long base_addr, offset, pci_base; in decode_crb_addr() local
140 base_addr = addr & 0xfff00000; in decode_crb_addr()
144 if (crb_addr_xform[i] == base_addr) { in decode_crb_addr()
/titanic_41/usr/src/uts/i86pc/io/pciex/
H A Dnpe_misc.c83 if (cfg_baap->base_addr != (uint64_t)0 && in npe_query_acpi_mcfg()
95 ecfginfo[0] = cfg_baap->base_addr; in npe_query_acpi_mcfg()
/titanic_41/usr/src/uts/common/io/ib/adapters/hermon/
H A Dhermon_event.c619 uint32_t *base_addr; in hermon_eq_catastrophic() local
630 base_addr = state->hs_cmd_regs.fw_err_buf; in hermon_eq_catastrophic()
638 word = ddi_get32(cmdhdl, base_addr); in hermon_eq_catastrophic()
688 base_addr = in hermon_eq_catastrophic()
690 err_buf = ddi_get32(cmdhdl, base_addr); in hermon_eq_catastrophic()
/titanic_41/usr/src/uts/i86pc/io/pci/
H A Dpci_tools.c941 uint64_t base_addr; in pcitool_dev_reg_ops() local
1163 base_addr = prg2.data; in pcitool_dev_reg_ops()
1169 prg2.data, base_addr, prg.offset); in pcitool_dev_reg_ops()
1175 prg.phys_addr = base_addr + prg.offset; in pcitool_dev_reg_ops()
/titanic_41/usr/src/cmd/mdb/common/modules/emlxs/
H A Demlxs.c77 int emlxs_msgbuf(uintptr_t base_addr, uint_t flags, int argc, in emlxs_msgbuf() argument
341 emlxs_dump(uintptr_t base_addr, uint_t flags, int argc, in emlxs_dump() argument
/titanic_41/usr/src/uts/common/io/ib/adapters/tavor/
H A Dtavor_event.c814 uint32_t *base_addr; in tavor_eq_catastrophic() local
825 base_addr = (uint32_t *)(uintptr_t)( in tavor_eq_catastrophic()
830 word = ddi_get32(state->ts_reg_cmdhdl, base_addr); in tavor_eq_catastrophic()
873 base_addr = (uint32_t *)((uintptr_t)(state->ts_reg_cmd_baseaddr in tavor_eq_catastrophic()
875 err_buf = ddi_get32(state->ts_reg_cmdhdl, base_addr); in tavor_eq_catastrophic()
/titanic_41/usr/src/uts/common/io/hxge/
H A Dhxge_peu_hw.h396 uint32_t base_addr:20; member
404 uint32_t base_addr:20;
453 uint32_t base_addr:10; member
461 uint32_t base_addr:10;
509 uint32_t base_addr:11; member
517 uint32_t base_addr:11;
601 uint32_t base_addr:10; member
607 uint32_t base_addr:10;
/titanic_41/usr/src/lib/libproc/common/
H A DPcore.c2215 uintptr_t addr, base_addr; in Pfgrab_core() local
2605 base_addr = Pgetauxval(P, AT_BASE); in Pfgrab_core()
2619 } else if (base_addr != (uintptr_t)-1L) { in Pfgrab_core()
2635 if (base_addr != (uintptr_t)-1L) { in Pfgrab_core()
2638 P->map_ldso = core_name_mapping(P, base_addr, interp); in Pfgrab_core()
2644 rl.rl_base = base_addr; in Pfgrab_core()
2670 if (base_addr == (uintptr_t)-1L || in Pfgrab_core()
/titanic_41/usr/src/uts/sun4u/starcat/io/
H A Daxq.c1546 uint_t *base_addr, *io_domain_control_addr; in starcat_axq_pio_workaround() local
1637 if (axq_map_phys(axq_dip, &phys_spec, (caddr_t *)&base_addr, in starcat_axq_pio_workaround()
1648 io_domain_control_addr = REG_ADDR(base_addr, AXQ_SLOT1_DOMCTRL); in starcat_axq_pio_workaround()
/titanic_41/usr/src/cmd/dcs/sparc/sun4u/
H A Dri_init.c1062 uint64_t base_addr; /* required */ in mem_cm_info() local
1070 if (sscanf(cfga->ap_info, "address=0x%llx size=%u", &base_addr, in mem_cm_info()
1110 cfga->ap_log_id, base_addr, size_kb, perm_kb)); in mem_cm_info()
1118 if (nvlist_add_uint64(mem->conf_props, RI_MEM_ADDR, base_addr) != 0 || in mem_cm_info()
/titanic_41/usr/src/uts/sun4u/sys/pci/
H A Dpci_dma.h260 extern void pci_vmem_do_free(iommu_t *iommu_p, void *base_addr, size_t npages,
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_nx.c1010 uint32_t base_addr, offset, pci_base; in ql_8021_decode_crb_addr() local
1017 base_addr = addr & 0xfff00000; in ql_8021_decode_crb_addr()
1021 if (crb_addr_xform[i] == base_addr) { in ql_8021_decode_crb_addr()
/titanic_41/usr/src/uts/common/io/
H A Dbscv.c2746 uint32_t base_addr; in bscv_ioc_mprog2() local
2768 base_addr = (mprog2.addr_space - 240) * data_size; in bscv_ioc_mprog2()
2776 } else if ((base_addr + data_size) > eeprom_size) { in bscv_ioc_mprog2()
2797 if (bscv_eerw(ssp, base_addr, &mprog2.data[0], in bscv_ioc_mprog2()
2820 uint32_t base_addr; in bscv_ioc_mread2() local
2844 base_addr = (mprog2.addr_space - 240) * data_size; in bscv_ioc_mread2()
2851 } else if ((base_addr + data_size) > eeprom_size) { in bscv_ioc_mread2()
2858 if (bscv_eerw(ssp, base_addr, &mprog2.data[0], in bscv_ioc_mread2()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/
H A Dmm.h230 lm_address_t base_addr,

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