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Searched refs:SSE_MXCSR_EFLAGS (Results 1 – 4 of 4) sorted by relevance

/titanic_41/usr/src/uts/intel/ia32/os/
H A Dfpu.c215 cfx->fx_mxcsr = fx->fx_mxcsr & ~SSE_MXCSR_EFLAGS; in fp_new_lwp()
227 cfx->fx_mxcsr = fx->fx_mxcsr & ~SSE_MXCSR_EFLAGS; in fp_new_lwp()
634 xmask = (mxcsr >> 7) & SSE_MXCSR_EFLAGS; in fpsimderrflt()
635 return (fpe_simd_sicode((mxcsr & SSE_MXCSR_EFLAGS) & ~xmask)); in fpsimderrflt()
/titanic_41/usr/src/uts/intel/sys/
H A Dfp.h158 #define SSE_MXCSR_EFLAGS \ macro
/titanic_41/usr/src/uts/i86pc/ml/
H A Dgenassym.c110 printf("#define\tSSE_MXCSR_EFLAGS 0x%x\n", SSE_MXCSR_EFLAGS); in main()
/titanic_41/usr/src/uts/intel/ia32/ml/
H A Dfloat.s694 andl $_BITNOT(SSE_MXCSR_EFLAGS), (%rsp)
715 andl $_BITNOT(SSE_MXCSR_EFLAGS), (%esp)