Searched refs:PCI_REG_REL_M (Results 1 – 13 of 13) sorted by relevance
1120 (PCI_REG_REL_M | PCI_ADDR_MEM32); in pcicfg_ntbridge_configure_done()1124 (PCI_REG_REL_M | PCI_ADDR_IO); in pcicfg_ntbridge_configure_done()1128 (PCI_REG_REL_M | PCI_ADDR_MEM32 | PCI_REG_PF_M); in pcicfg_ntbridge_configure_done()1760 (PCI_REG_REL_M | PCI_ADDR_IO); in pcicfg_bridge_assign()1763 (PCI_REG_REL_M | PCI_ADDR_MEM32); in pcicfg_bridge_assign()1767 (PCI_REG_REL_M | PCI_ADDR_MEM32 | PCI_REG_PF_M); in pcicfg_bridge_assign()1900 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_bridge_assign()1922 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_bridge_assign()1936 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_bridge_assign()2068 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_device_assign()[all …]
1165 #define PCI_REG_REL_M 0x80000000 /* relocation bit mask */ macro1192 #define PCI_RELOCAT_B PCI_REG_REL_M /* non-relocatable bit */
1249 (PCI_REG_REL_M | PCI_ADDR_MEM32); in pcicfg_ntbridge_configure_done()1253 (PCI_REG_REL_M | PCI_ADDR_IO); in pcicfg_ntbridge_configure_done()1907 (PCI_REG_REL_M | PCI_ADDR_IO); in pcicfg_bridge_assign()1911 (PCI_REG_REL_M | PCI_ADDR_MEM32); in pcicfg_bridge_assign()3340 hiword |= PCI_REG_REL_M; in pcicfg_update_assigned_prop_value()5177 range[0].child_hi = range[0].parent_hi |= (PCI_REG_REL_M | PCI_ADDR_IO); in pcicfg_probe_bridge()5180 (PCI_REG_REL_M | PCI_ADDR_MEM32); in pcicfg_probe_bridge()5434 reg.pci_phys_hi = (PCI_REG_REL_M | PCI_ADDR_IO); in pcicfg_probe_bridge()5444 reg.pci_phys_hi = (PCI_REG_REL_M | PCI_ADDR_MEM32); in pcicfg_probe_bridge()5555 range[0].child_hi = range[0].parent_hi |= (PCI_REG_REL_M | PCI_ADDR_IO); in pcicfg_probe_bridge()[all …]
409 ~PCI_REG_REL_M); in plx_ro_disable()
3180 memlist_to_ranges(&next_rp, iolist, PCI_ADDR_IO | PCI_REG_REL_M, ppb); in add_ranges_prop()3182 PCI_ADDR_MEM32 | PCI_REG_REL_M, ppb); in add_ranges_prop()3184 PCI_ADDR_MEM32 | PCI_REG_REL_M | PCI_REG_PF_M, ppb); in add_ranges_prop()3243 PCI_ADDR_IO | PCI_REG_REL_M); in add_bus_available_prop()3245 PCI_ADDR_MEM32 | PCI_REG_REL_M); in add_bus_available_prop()3247 PCI_ADDR_MEM32 | PCI_REG_REL_M | PCI_REG_PF_M); in add_bus_available_prop()
390 PCI_REG_ADDR_M|PCI_REG_REL_M, in gfxp_vgatext_attach()401 PCI_REG_ADDR_M|PCI_REG_REL_M, in gfxp_vgatext_attach()
339 ptype |= PCI_REG_REL_M; in isa_used_to_ranges()482 pci_reg_p->pci_phys_hi = PCI_ADDR_IO | PCI_REG_REL_M; in isa_apply_range()
1418 if (phys_spec.pci_phys_hi & PCI_REG_REL_M) { in pci_alloc_resource()1469 if (phys_spec.pci_phys_hi & PCI_REG_REL_M) { in pci_alloc_resource()1508 if (phys_spec.pci_phys_hi & PCI_REG_REL_M) { in pci_alloc_resource()
509 PCI_REG_ADDR_M|PCI_REG_REL_M, in vgatext_attach()519 PCI_REG_ADDR_M|PCI_REG_REL_M, in vgatext_attach()
1639 newregs[j].pci_phys_hi |= PCI_REG_REL_M; in pci_put_available_prop()1668 newregs[0].pci_phys_hi |= PCI_REG_REL_M; in pci_put_available_prop()
1500 (PCI_REG_REL_M | PCI_ADDR_IO); in ppb_create_ranges_prop()1532 (PCI_REG_REL_M | PCI_ADDR_MEM32); in ppb_create_ranges_prop()
1802 (PCI_REG_REL_M | PCI_ADDR_IO); in pcieb_create_ranges_prop()1826 (PCI_REG_REL_M | PCI_ADDR_MEM32); in pcieb_create_ranges_prop()
722 range[0].child_hi = range[0].parent_hi |= (PCI_REG_REL_M | PCI_ADDR_IO); in cardbus_bridge_ranges()724 range[1].child_hi = range[1].parent_hi |= (PCI_REG_REL_M | in cardbus_bridge_ranges()1052 PCI_REG_REL_M; in cardbus_isa_bridge_ranges()