Home
last modified time | relevance | path

Searched refs:OS_DEP (Results 1 – 9 of 9) sorted by relevance

/titanic_41/usr/src/uts/common/io/e1000g/
H A De1000_osdep.h77 #define OS_DEP(hw) ((struct e1000g_osdep *)((hw)->back)) macro
109 ddi_put32((OS_DEP(hw))->reg_handle, \
113 ddi_put32((OS_DEP(hw))->reg_handle, \
121 ddi_get32((OS_DEP(hw))->reg_handle, \
123 ddi_get32((OS_DEP(hw))->reg_handle, \
130 ddi_put32((OS_DEP(hw))->reg_handle, \
135 ddi_put32((OS_DEP(hw))->reg_handle, \
143 ddi_get32((OS_DEP(hw))->reg_handle, \
146 ddi_get32((OS_DEP(hw))->reg_handle, \
159 ddi_get32((OS_DEP(hw))->ich_flash_handle, \
[all …]
H A De1000g_osdep.c48 pci_config_put16(OS_DEP(hw)->cfg_handle, reg, *value); in e1000_write_pci_cfg()
55 pci_config_get16(OS_DEP(hw)->cfg_handle, reg); in e1000_read_pci_cfg()
111 *value = pci_config_get16(OS_DEP(hw)->cfg_handle, in e1000_read_pcie_cap_reg()
130 status = pci_lcap_locate(OS_DEP(hw)->cfg_handle, pcie_id, &pcie_cap); in e1000_write_pcie_cap_reg()
134 pci_config_put16(OS_DEP(hw)->cfg_handle, in e1000_write_pcie_cap_reg()
/titanic_41/usr/src/uts/common/io/igb/
H A De1000_osdep.h75 #define OS_DEP(hw) ((struct igb_osdep *)((hw)->back)) macro
117 ddi_put32((OS_DEP(hw))->reg_handle, \
121 ddi_get32((OS_DEP(hw))->reg_handle, \
125 ddi_put32((OS_DEP(hw))->reg_handle, \
130 ddi_get32((OS_DEP(hw))->reg_handle, \
140 ddi_get32((OS_DEP(hw))->ich_flash_handle, \
144 ddi_get16((OS_DEP(hw))->ich_flash_handle, \
148 ddi_put32((OS_DEP(hw))->ich_flash_handle, \
152 ddi_put16((OS_DEP(hw))->ich_flash_handle, \
204 ddi_put32((OS_DEP(a))->io_reg_handle, \
[all …]
H A Digb_osdep.c51 pci_config_put16(OS_DEP(hw)->cfg_handle, reg, *value); in e1000_write_pci_cfg()
58 pci_config_get16(OS_DEP(hw)->cfg_handle, reg); in e1000_read_pci_cfg()
74 status = pci_lcap_locate((OS_DEP(hw))->cfg_handle, pcie_id, &pcie_cap); in e1000_read_pcie_cap_reg()
78 *value = pci_config_get16(OS_DEP(hw)->cfg_handle, in e1000_read_pcie_cap_reg()
98 status = pci_lcap_locate(OS_DEP(hw)->cfg_handle, pcie_id, &pcie_cap); in e1000_write_pcie_cap_reg()
102 pci_config_put16(OS_DEP(hw)->cfg_handle, in e1000_write_pcie_cap_reg()
/titanic_41/usr/src/uts/common/io/i40e/
H A Di40e_osdep.h158 #define OS_DEP(hw) ((struct i40e_osdep *)((hw)->back)) macro
160 (pci_config_get16(OS_DEP(hw)->ios_cfg_handle, (reg)))
162 (pci_config_put16(OS_DEP(hw)->ios_cfg_handle, (reg), (value)))
172 ddi_put32(OS_DEP(hw)->ios_reg_handle, \
175 ddi_get32(OS_DEP(hw)->ios_reg_handle, \
H A Di40e_osdep.c48 i40e_t *i40e = OS_DEP(hw)->ios_i40e; in i40e_allocate_dma_mem()
207 status = pci_lcap_locate((OS_DEP(hw))->ios_cfg_handle, pcie_id, in i40e_set_hw_bus_info()
210 i40e_error(OS_DEP(hw)->ios_i40e, "failed to locate PCIe " in i40e_set_hw_bus_info()
216 value = pci_config_get16(OS_DEP(hw)->ios_cfg_handle, in i40e_set_hw_bus_info()
H A Di40e_main.c1392 struct i40e_osdep *osdep = OS_DEP(hw); in i40e_final_init()
/titanic_41/usr/src/uts/common/io/ixgbe/
H A Dixgbe_osdep.c35 return (pci_config_get16(OS_DEP(hw)->cfg_handle, reg)); in ixgbe_read_pci_cfg()
41 pci_config_put16(OS_DEP(hw)->cfg_handle, reg, val); in ixgbe_write_pci_cfg()
H A Dixgbe_osdep.h71 #define OS_DEP(hw) ((struct ixgbe_osdep *)((hw)->back)) macro
91 ddi_put32((OS_DEP(a))->reg_handle, \
98 ddi_get32((OS_DEP(a))->reg_handle, \