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Searched refs:EN_REG_NCEEN (Results 1 – 6 of 6) sorted by relevance

/titanic_41/usr/src/uts/sun4u/sys/
H A Dcheetahregs.h436 #define EN_REG_NCEEN INT64_C(0x0000000000000002) /* UE,EDU,WDU,BERR,IVU,EMU */ macro
441 #define EN_REG_CE_DISABLE (EN_REG_UCEEN | EN_REG_ISAPEN | EN_REG_NCEEN)
443 (EN_REG_UCEEN | EN_REG_ISAPEN | EN_REG_NCEEN | EN_REG_CEEN)
469 #define EN_REG_NCEEN INT64_C(0x0000000000000002) /* UE,EDU,WDU,BERR,IVU,EMU */
473 #define EN_REG_CE_DISABLE (EN_REG_UCEEN | EN_REG_ISAPEN | EN_REG_NCEEN)
475 (EN_REG_UCEEN | EN_REG_ISAPEN | EN_REG_NCEEN | EN_REG_CEEN)
/titanic_41/usr/src/uts/sun4u/cpu/
H A Dus3_cheetah_asm.s136 andn %g7, EN_REG_CEEN | EN_REG_NCEEN, %g5
391 andn %o5, EN_REG_NCEEN, %o3
H A Dus3_jalapeno_asm.s409 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4
589 andn %g7, EN_REG_CEEN | EN_REG_NCEEN, %g5
914 andn %o5, EN_REG_NCEEN, %o3
H A Dus3_cheetahplus_asm.s207 andn %g7, EN_REG_CEEN | EN_REG_NCEEN, %g5
502 andn %o5, EN_REG_NCEEN, %o3
H A Dus3_common_asm.s1324 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4
1354 and %g3, EN_REG_CEEN + EN_REG_NCEEN, %g4
1826 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4
H A Dus3_common.c1322 nceen = p_clo_flags & EN_REG_NCEEN; in cpu_fast_ecc_error()
1326 nceen = clop->clo_flags & EN_REG_NCEEN; in cpu_fast_ecc_error()
1539 nceen = get_error_enable() & EN_REG_NCEEN; in cpu_tl1_error()
1575 nceen = get_error_enable() & EN_REG_NCEEN; in cpu_tl1_error()
2023 set_error_enable(get_error_enable() | (EN_REG_NCEEN | ceen)); in cpu_deferred_error()