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/linux/drivers/scsi/aic7xxx/
H A Daic7xxx_reg_print.c_shipped19 { "TEMODE", 0x80, 0x80 }
36 { "DFON", 0x80, 0x80 }
54 { "CDI", 0x80, 0x80 },
59 { "P_COMMAND", 0x80, 0x80 },
76 { "WIDEXFER", 0x80, 0x80 },
98 { "TARGET", 0x80, 0x80 }
116 { "SELTO", 0x80, 0x80 }
133 { "OVERRUN", 0x80, 0x80 },
183 { "ENSELTIMO", 0x80, 0x80 }
208 { "DIAGLEDEN", 0x80, 0x80 }
[all …]
H A Daic79xx_reg_print.c_shipped19 { "HWERRINT", 0x80, 0x80 },
32 { "HOST_TQINPOS", 0x80, 0x80 }
65 { "SWTMINTMASK", 0x80, 0x80 }
86 { "PRELOADEN", 0x80, 0x80 }
103 { "PRELOAD_AVAIL", 0x80, 0x80 }
132 { "TEMODEO", 0x80, 0x80 }
179 { "P_COMMAND", 0x80, 0xe0 },
190 { "CDI", 0x80, 0x80 },
262 { "TARGET", 0x80, 0x80 }
280 { "SELTO", 0x80, 0x80 }
[all …]
H A Daic7xxx_reg.h_shipped192 #define TEMODE 0x80
196 #define DFON 0x80
206 #define BITBUCKET 0x80
213 #define CDO 0x80
235 #define WIDEXFER 0x80
249 #define AUTORATEEN 0x80
271 #define TARGET 0x80
282 #define CLRSELTIMEO 0x80
291 #define SELTO 0x80
302 #define OVERRUN 0x80
[all …]
H A Daic79xx_reg.h_shipped372 #define HWERRINT 0x80
411 #define CLRHWERRINT 0x80
421 #define CLRCIOPARERR 0x80
430 #define CIOPARERR 0x80
439 #define SEQ_RESET 0x80
453 #define HOST_TQINPOS 0x80
479 #define EMPTY_SCB_AVAIL 0x80
499 #define SWTMINTMASK 0x80
516 #define CACHETHEN 0x80
524 #define PRELOAD_AVAIL 0x80
[all …]
H A Daic79xx_seq.h_shipped70 0x80, 0xf9, 0x7e, 0x68,
74 0x80, 0xf9, 0x66, 0x79,
83 0x80, 0xad, 0x84, 0x78,
100 0x80, 0x3d, 0x7b, 0x16,
111 0x80, 0x18, 0x84, 0x78,
118 0x80, 0x18, 0x30, 0x04,
168 0x80, 0xac, 0x4a, 0x71,
189 0x80, 0xea, 0xb2, 0x01,
233 0x80, 0xea, 0xb2, 0x01,
284 0x80, 0xea, 0x6e, 0x02,
[all …]
H A Daic7xxx_seq.h_shipped35 0x01, 0x90, 0x80, 0x30,
46 0x80, 0x0b, 0xb6, 0x78,
63 0x80, 0x3d, 0x7a, 0x00,
68 0x80, 0x66, 0xae, 0x78,
106 0x80, 0x3d, 0x7a, 0x00,
115 0x80, 0xb9, 0xd8, 0x78,
122 0x80, 0xb8, 0xe6, 0x78,
123 0x80, 0x65, 0xca, 0x00,
136 0x01, 0xbf, 0x80, 0x30,
140 0x80, 0x0b, 0xc4, 0x79,
[all …]
H A Daic7xxx.reg71 field TEMODE 0x80
88 field DFON 0x80
104 field BITBUCKET 0x80
121 field CDI 0x80
152 field CDO 0x80
183 field WIDEXFER 0x80 /* Wide transfer control */
201 field TWIN_CHNLB 0x80
258 field AUTORATEEN 0x80
303 field TARGET 0x80 /* Board acting as target */
321 field CLRSELTIMEO 0x80
[all …]
H A Daic79xx.reg117 field HWERRINT 0x80
215 field CLRHWERRINT 0x80 /* Rev B or greater */
232 field CIOPARERR 0x80
248 field CLRCIOPARERR 0x80
265 field SEQ_RESET 0x80 /* Rev B or greater */
303 mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */
385 field EMPTY_SCB_AVAIL 0x80
413 field SWTMINTMASK 0x80
431 field PRELOADEN 0x80
452 field CACHETHEN 0x80 /* Cache Threshold enable */
[all …]
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Ddma.txt41 reg = <0 0x80>;
48 reg = <0x80 0x80>;
55 reg = <0x100 0x80>;
62 reg = <0x180 0x80>;
100 reg = <0 0x80>;
107 reg = <0x80 0x80>;
114 reg = <0x100 0x80>;
121 reg = <0x180 0x80>;
157 reg = <0x0 0x80>;
162 reg = <0x80 0x80>;
[all …]
/linux/arch/arm/boot/dts/sunplus/
H A Dsunplus-sp7021.dtsi47 reg = <0x780 0x80>, <0xa80 0x80>;
80 <0x80 0x20>;
180 reg = <0x3a00 0x80>;
189 reg = <0x2d80 0x80>, <0x2e00 0x80>;
206 reg = <0xf480 0x80>, <0xf500 0x80>;
219 reg = <0xf600 0x80>, <0xf680 0x80>;
232 reg = <0xf780 0x80>, <0xf800 0x80>;
245 reg = <0x900 0x80>;
255 reg = <0x980 0x80>;
266 reg = <0x800 0x80>;
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Delo3-dma-0.dtsi44 reg = <0x0 0x80>;
49 reg = <0x80 0x80>;
54 reg = <0x100 0x80>;
59 reg = <0x180 0x80>;
64 reg = <0x300 0x80>;
69 reg = <0x380 0x80>;
74 reg = <0x400 0x80>;
79 reg = <0x480 0x80>;
H A Delo3-dma-1.dtsi44 reg = <0x0 0x80>;
49 reg = <0x80 0x80>;
54 reg = <0x100 0x80>;
59 reg = <0x180 0x80>;
64 reg = <0x300 0x80>;
69 reg = <0x380 0x80>;
74 reg = <0x400 0x80>;
79 reg = <0x480 0x80>;
H A Delo3-dma-2.dtsi44 reg = <0x0 0x80>;
49 reg = <0x80 0x80>;
54 reg = <0x100 0x80>;
59 reg = <0x180 0x80>;
64 reg = <0x300 0x80>;
69 reg = <0x380 0x80>;
74 reg = <0x400 0x80>;
79 reg = <0x480 0x80>;
H A Dpq3-dma-0.dtsi44 reg = <0x0 0x80>;
50 reg = <0x80 0x80>;
56 reg = <0x100 0x80>;
62 reg = <0x180 0x80>;
H A Dpq3-dma-1.dtsi44 reg = <0x0 0x80>;
50 reg = <0x80 0x80>;
56 reg = <0x100 0x80>;
62 reg = <0x180 0x80>;
H A Dqoriq-dma-0.dtsi44 reg = <0x0 0x80>;
50 reg = <0x80 0x80>;
56 reg = <0x100 0x80>;
62 reg = <0x180 0x80>;
H A Dqoriq-dma-1.dtsi44 reg = <0x0 0x80>;
50 reg = <0x80 0x80>;
56 reg = <0x100 0x80>;
62 reg = <0x180 0x80>;
/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-tipwmss.txt29 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
30 0x48300180 0x48300180 0x80 /* EQEP */
31 0x48300200 0x48300200 0x80>; /* EHRPWM */
42 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
43 0x48300180 0x48300180 0x80 /* EQEP */
44 0x48300200 0x48300200 0x80>; /* EHRPWM */
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-tqma8mpql-mba8mp-ras314.dts610 fsl,pins = <MX8MP_IOMUXC_UART1_RXD__GPIO5_IO22 0x80>,
611 <MX8MP_IOMUXC_UART1_TXD__GPIO5_IO23 0x80>,
612 <MX8MP_IOMUXC_UART2_RXD__GPIO5_IO24 0x80>,
613 <MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25 0x80>,
614 <MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x80>;
687 fsl,pins = <MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x80>,
695 fsl,pins = <MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x80>,
696 <MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x80>;
711 fsl,pins = <MX8MP_IOMUXC_UART3_TXD__GPIO5_IO27 0x80>;
719 fsl,pins = <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x80>;
[all …]
/linux/arch/arm64/boot/dts/arm/
H A Djuno-scmi.dtsi206 reg = <0x0 0x80>;
211 reg = <0x80 0x80>;
216 reg = <0x100 0x80>;
221 reg = <0x180 0x80>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6797.dtsi290 <0 0x11000100 0 0x80>;
306 <0 0x11000180 0 0x80>;
322 <0 0x11000200 0 0x80>;
339 <0 0x11000280 0 0x80>;
356 <0 0x11000500 0 0x80>;
372 <0 0x11000580 0 0x80>;
388 <0 0x11000300 0 0x80>;
404 <0 0x11000400 0 0x80>;
421 <0 0x11000480 0 0x80>;
438 <0 0x11000380 0 0x80>;
H A Dmt2712e.dtsi386 reg = <0 0x11000400 0 0x80>,
387 <0 0x11000480 0 0x80>,
388 <0 0x11000500 0 0x80>,
389 <0 0x11000580 0 0x80>,
390 <0 0x11000600 0 0x80>,
391 <0 0x11000680 0 0x80>,
392 <0 0x11000700 0 0x80>,
393 <0 0x11000780 0 0x80>,
394 <0 0x11000800 0 0x80>,
395 <0 0x11000880 0 0x80>,
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g6.dtsi616 reg = <0x80 0x80>;
623 reg = <0x80 0x80>;
890 reg = <0x80 0x80>;
904 reg = <0x100 0x80>;
918 reg = <0x180 0x80>;
932 reg = <0x200 0x80>;
946 reg = <0x280 0x80>;
960 reg = <0x300 0x80>;
974 reg = <0x380 0x80>;
988 reg = <0x400 0x80>;
[all …]
/linux/arch/arm/boot/dts/cirrus/
H A Dep7209.dtsi88 reg = <0x80000100 0x80>;
96 reg = <0x80000180 0x80>;
140 reg = <0x80000480 0x80>;
159 reg = <0x80001100 0x80>;
164 reg = <0x80001480 0x80>;
/linux/Documentation/devicetree/bindings/power/
H A Dti-smartreflex.txt30 reg = <0x4a0db000 0x80>;
37 reg = <0x4a0dd000 0x80>;
44 reg = <0x4a0d9000 0x80>;

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