| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | timing_generator.h | 341 int vupdate_offset,
427 int vupdate_offset,
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator.h | 262 int vupdate_offset,
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| H A D | dce110_timing_generator_v.c | 439 int vupdate_offset, in dce110_timing_generator_v_program_timing() argument
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| H A D | dce110_timing_generator.c | 1956 int vupdate_offset, in dce110_tg_program_timing() argument
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | dml1_display_rq_dlg_calc.c | 1060 unsigned int vupdate_offset; in dml1_rq_dlg_get_dlg_params() local
1242 vupdate_offset = e2e_pipe_param->pipe.dest.vupdate_offset; in dml1_rq_dlg_get_dlg_params()
1313 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1334 DTRACE("DLG: %s: vupdate_offset = %d", __func__, vupdate_offset); in dml1_rq_dlg_get_dlg_params()
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| H A D | display_mode_lib.c | 234 dml_print("DML PARAMS: vupdate_offset = %d\n", pipe_dest->vupdate_offset); in dml_log_pipe_params()
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| H A D | display_mode_structs.h | 523 unsigned int vupdate_offset; member
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| H A D | display_mode_vba.h | 139 dml_get_pipe_attr_decl(vupdate_offset);
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| H A D | display_mode_vba.c | 179 dml_get_pipe_attr_func(vupdate_offset, mode_lib->vba.VUpdateOffsetPix);
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_timing_generator.c | 112 int vupdate_offset, in program_timing() argument
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 446 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
447 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
1210 pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
1251 hsplit_pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 912 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_enable_stream_timing()
1560 || old_pipe->pipe_dlg_param.vupdate_offset != new_pipe->pipe_dlg_param.vupdate_offset in dcn20_detect_pipe_changes()
1901 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_program_tg()
2500 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_update_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 698 int vupdate_offset, in dce120_tg_program_timing() argument
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.c | 132 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp1_vready_workaround()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.c | 188 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp2_vready_at_or_After_vsync()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 1224 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn10_enable_stream_timing()
3218 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn10_program_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 10324 dml_get_per_surface_var_func(vupdate_offset, dml_uint_t, mode_lib->mp.VUpdateOffsetPix);
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 269 dml_get_per_pipe_var_func(vupdate_offset, unsigned int, mode_lib->mp.VUpdateOffsetPix);
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