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Searched refs:vupdate_offset (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Doptc.h65 int vupdate_offset; member
112 int vupdate_offset,
131 int vupdate_offset,
H A Dtiming_generator.h176 int vupdate_offset,
262 int vupdate_offset,
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn401/
H A Ddcn401_optc.c403 int vupdate_offset, in optc401_program_global_sync() argument
411 optc1->vupdate_offset = vupdate_offset; in optc401_program_global_sync()
424 VUPDATE_OFFSET, optc1->vupdate_offset, in optc401_program_global_sync()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.c67 int vupdate_offset, in optc1_program_global_sync() argument
75 optc1->vupdate_offset = vupdate_offset; in optc1_program_global_sync()
88 VUPDATE_OFFSET, optc1->vupdate_offset, in optc1_program_global_sync()
161 int vupdate_offset, in optc1_program_timing() argument
182 optc1->vupdate_offset = vupdate_offset; in optc1_program_timing()
289 vupdate_offset, in optc1_program_timing()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20.c855 unsigned int vupdate_offset; in dml20_rq_dlg_get_dlg_params() local
1002 vupdate_offset = dst->vupdate_offset; in dml20_rq_dlg_get_dlg_params()
1029 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
1036 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
H A Ddisplay_rq_dlg_calc_20v2.c855 unsigned int vupdate_offset; in dml20v2_rq_dlg_get_dlg_params() local
1003 vupdate_offset = dst->vupdate_offset; in dml20v2_rq_dlg_get_dlg_params()
1030 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
1037 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c901 unsigned int vupdate_offset; in dml_rq_dlg_get_dlg_params() local
1042 vupdate_offset = dst->vupdate_offset; in dml_rq_dlg_get_dlg_params()
1069 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1076 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dce80/
H A Ddce80_timing_generator.c112 int vupdate_offset, in program_timing() argument
/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.h262 int vupdate_offset,
H A Ddce110_timing_generator_v.c439 int vupdate_offset, in dce110_timing_generator_v_program_timing() argument
H A Ddce110_timing_generator.c1956 int vupdate_offset, in dce110_tg_program_timing() argument
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddml1_display_rq_dlg_calc.c1060 unsigned int vupdate_offset; in dml1_rq_dlg_get_dlg_params() local
1242 vupdate_offset = e2e_pipe_param->pipe.dest.vupdate_offset; in dml1_rq_dlg_get_dlg_params()
1313 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1334 DTRACE("DLG: %s: vupdate_offset = %d", __func__, vupdate_offset); in dml1_rq_dlg_get_dlg_params()
H A Ddisplay_mode_lib.c234 dml_print("DML PARAMS: vupdate_offset = %d\n", pipe_dest->vupdate_offset); in dml_log_pipe_params()
H A Ddisplay_mode_structs.h523 unsigned int vupdate_offset; member
H A Ddisplay_mode_vba.h139 dml_get_pipe_attr_decl(vupdate_offset);
H A Ddisplay_mode_vba.c179 dml_get_pipe_attr_func(vupdate_offset, mode_lib->vba.VUpdateOffsetPix);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c967 unsigned int vupdate_offset = 0; in dml_rq_dlg_get_dlg_params() local
1103 vupdate_offset = dst->vupdate_offset; in dml_rq_dlg_get_dlg_params()
1130 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1137 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c446 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
447 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
1210 pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
1251 hsplit_pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddisplay_mode_core.h182 dml_get_per_surface_var_decl(vupdate_offset, dml_uint_t);
H A Ddml2_utils.c254 pipe_ctx->pipe_dlg_param.vupdate_offset = dml_get_vupdate_offset(mode_lib, pipe_idx); in populate_pipe_ctx_dlg_params_from_dml()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c910 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_enable_stream_timing()
1554 || old_pipe->pipe_dlg_param.vupdate_offset != new_pipe->pipe_dlg_param.vupdate_offset in dcn20_detect_pipe_changes()
1892 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_program_tg()
2501 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_update_bandwidth()
/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c698 int vupdate_offset, in dce120_tg_program_timing() argument
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
H A Ddcn10_hubp.c132 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp1_vready_workaround()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
H A Ddcn20_hubp.c188 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp2_vready_at_or_After_vsync()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c351 pipes[pipe_idx].pipe.dest.vupdate_offset = in dcn32_helper_populate_phantom_dlg_params()
1703 …pipes[pipe_idx].pipe.dest.vupdate_offset = get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cn… in dcn32_calculate_dlg_params()

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