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Searched refs:vulp (Results 1 – 10 of 10) sorted by relevance

/linux/arch/alpha/kernel/
H A Dcore_t2.c192 t2_cfg = *(vulp)T2_HAE_3 & ~0xc0000000UL; in conf_read()
193 *(vulp)T2_HAE_3 = 0x40000000UL | t2_cfg; in conf_read()
227 *(vulp)T2_HAE_3 = t2_cfg; in conf_read()
244 t2_cfg = *(vulp)T2_HAE_3 & ~0xc0000000UL; in conf_write()
245 *(vulp)T2_HAE_3 = t2_cfg | 0x40000000UL; in conf_write()
278 *(vulp)T2_HAE_3 = t2_cfg; in conf_write()
334 *(vulp)T2_WBASE1 = temp | 0x80000UL; /* OR in ENABLE bit */ in t2_direct_map_window1()
336 *(vulp)T2_WMASK1 = temp; in t2_direct_map_window1()
337 *(vulp)T2_TBASE1 = 0; in t2_direct_map_window1()
341 __func__, *(vulp)T2_WBASE1, *(vulp)T2_WMASK1, *(vulp)T2_TBASE1); in t2_direct_map_window1()
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H A Dirq_pyxis.c27 *(vulp)PYXIS_INT_MASK = mask; in pyxis_update_irq_hw()
29 *(vulp)PYXIS_INT_MASK; in pyxis_update_irq_hw()
51 *(vulp)PYXIS_INT_MASK = mask; in pyxis_mask_and_ack_irq()
54 *(vulp)PYXIS_INT_REQ = bit; in pyxis_mask_and_ack_irq()
57 *(vulp)PYXIS_INT_MASK; in pyxis_mask_and_ack_irq()
74 pld = *(vulp)PYXIS_INT_REQ; in pyxis_device_interrupt()
96 *(vulp)PYXIS_INT_MASK = 0; /* disable all */ in init_pyxis_irqs()
97 *(vulp)PYXIS_INT_REQ = -1; /* flush all */ in init_pyxis_irqs()
H A Dsys_ruffian.c39 *(vulp)PYXIS_INT_HILO = 0x000000c0UL; mb(); in ruffian_init_irq()
40 *(vulp)PYXIS_INT_CNFG = 0x00002064UL; mb(); /* all clear */ in ruffian_init_irq()
189 bank = *(vulp)bank_addr; in ruffian_get_bank_size()
H A Dsys_miata.c69 *(vulp)PYXIS_INT_HILO = 0x000000B2UL; mb(); /* ISA/NMI HI */ in miata_init_irq()
70 *(vulp)PYXIS_RT_COUNT = 0UL; mb(); /* clear count */ in miata_init_irq()
H A Dproto.h12 #define vulp volatile unsigned long * macro
H A Dcore_cia.c799 pyxis_cc = *(vulp)PYXIS_RT_COUNT; in pyxis_init_arch()
800 do { } while(*(vulp)PYXIS_RT_COUNT - pyxis_cc < 4096); in pyxis_init_arch()
H A Dsetup.c1245 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL); in determine_cpu_caches()
1278 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL); in determine_cpu_caches()
/linux/arch/alpha/include/asm/
H A Dcore_mcpcia.h251 #define vulp volatile unsigned long __force * macro
346 return *(vulp)addr; in mcpcia_ioread64()
356 *(vulp)addr = b; in mcpcia_iowrite64()
386 #undef vulp
H A Dcore_cia.h343 #define vulp volatile unsigned long __force * macro
428 return *(vulp)addr; in cia_ioread64()
436 *(vulp)addr = b; in cia_iowrite64()
483 #undef vulp
H A Dcore_t2.h355 #define vulp volatile unsigned long * macro
400 return *(vulp) ((addr << 5) + T2_IO + 0x18); in t2_inq()
405 *(vulp) ((addr << 5) + T2_IO + 0x18) = b; in t2_outq()
603 #undef vulp