Searched refs:vlv_cck_write (Results 1 – 5 of 5) sorted by relevance
/linux/drivers/gpu/drm/i915/display/ |
H A D | vlv_dsi_pll.c | 222 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, 0); in vlv_dsi_pll_enable() 223 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div); in vlv_dsi_pll_enable() 224 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, in vlv_dsi_pll_enable() 232 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl); in vlv_dsi_pll_enable() 258 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, tmp); in vlv_dsi_pll_disable()
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H A D | intel_cdclk.c | 679 vlv_cck_write(dev_priv, CCK_DISPLAY_CLOCK_CONTROL, val); in vlv_set_cdclk()
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/linux/drivers/gpu/drm/xe/compat-i915-headers/ |
H A D | vlv_sideband.h | 61 static inline void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_cck_write() function
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/linux/drivers/gpu/drm/i915/ |
H A D | vlv_sideband.h | 50 void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val);
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H A D | vlv_sideband.c | 178 void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_cck_write() function
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