Searched refs:vdd_dep_on_sclk (Results 1 – 9 of 9) sorted by relevance
502 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()538 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()766 if (pp_table_information->vdd_dep_on_sclk->count < in get_gpio_table()815 pp_table_information->vdd_dep_on_sclk = NULL; in init_clock_voltage_dependency()831 &pp_table_information->vdd_dep_on_sclk, sclk_dep_table); in init_clock_voltage_dependency()859 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_sclk) in init_clock_voltage_dependency()860 && (0 != pp_table_information->vdd_dep_on_sclk->count)) in init_clock_voltage_dependency()862 pp_table_information->vdd_dep_on_sclk); in init_clock_voltage_dependency()1190 kfree(pp_table_information->vdd_dep_on_sclk); in pp_tables_v1_0_uninitialize()1191 pp_table_information->vdd_dep_on_sclk = NULL; in pp_tables_v1_0_uninitialize()
801 pcie_count = table_info->vdd_dep_on_sclk->count; in get_pcie_table()923 pp_table_info->vdd_dep_on_sclk = NULL; in init_powerplay_extended_tables()949 &pp_table_info->vdd_dep_on_sclk, in init_powerplay_extended_tables()1007 pp_table_info->vdd_dep_on_sclk && in init_powerplay_extended_tables()1008 pp_table_info->vdd_dep_on_sclk->count) in init_powerplay_extended_tables()1011 pp_table_info->vdd_dep_on_sclk); in init_powerplay_extended_tables()1199 kfree(pp_table_info->vdd_dep_on_sclk); in vega10_pp_tables_uninitialize()1200 pp_table_info->vdd_dep_on_sclk = NULL; in vega10_pp_tables_uninitialize()
882 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_dpm_tables_v1()949 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_odn_initial_default_setting()991 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_voltage_range_from_vbios()1047 dep_table = table_info->vdd_dep_on_sclk; in smu7_check_dpm_table_updated()1540 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk = in smu7_populate_umdpstate_clocks() local1541 table_info->vdd_dep_on_sclk; in smu7_populate_umdpstate_clocks()1543 for (count = vdd_dep_on_sclk->count - 1; count >= 0; count--) { in smu7_populate_umdpstate_clocks()1544 if (tmp_sclk >= vdd_dep_on_sclk->entries[count].clk) { in smu7_populate_umdpstate_clocks()1545 hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[count].clk; in smu7_populate_umdpstate_clocks()1550 hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[0].clk; in smu7_populate_umdpstate_clocks()[all …]
331 dep_table[0] = table_info->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()334 od_table[0] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()538 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in vega10_get_socclk_for_voltage_evv()683 case 1: vdt = table_info->vdd_dep_on_sclk; break; in vega10_patch_voltage_dependency_tables_with_lookup_table()1198 table_info->vdd_dep_on_sclk, in vega10_construct_voltage_tables()1317 table_info->vdd_dep_on_sclk; in vega10_setup_default_dpm_tables()1627 &(data->odn_dpm_table.vdd_dep_on_sclk); in vega10_populate_single_gfx_level()1629 dep_on_sclk = table_info->vdd_dep_on_sclk; in vega10_populate_single_gfx_level()2156 table_info->vdd_dep_on_sclk; in vega10_populate_clock_stretcher_table()2175 table_info->vdd_dep_on_sclk; in vega10_populate_avfs_parameters()[all …]
295 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_sclk; member
824 table_info->vdd_dep_on_sclk, clock, in vegam_populate_single_graphic_level()1127 table_info->vdd_dep_on_sclk, in vegam_populate_smc_acpi_level()1409 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in vegam_populate_smc_initial_state()1412 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in vegam_populate_smc_initial_state()1496 table_info->vdd_dep_on_sclk; in vegam_populate_clock_stretcher_data_table()1576 table_info->vdd_dep_on_sclk; in vegam_populate_avfs_parameters()
972 vdd_dep_table = table_info->vdd_dep_on_sclk; in polaris10_populate_single_graphic_level()1294 table_info->vdd_dep_on_sclk, in polaris10_populate_smc_acpi_level()1625 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in polaris10_populate_smc_initailial_state()1628 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in polaris10_populate_smc_initailial_state()1657 table_info->vdd_dep_on_sclk; in polaris10_populate_clock_stretcher_data_table()1785 table_info->vdd_dep_on_sclk; in polaris10_populate_avfs_parameters()
952 vdd_dep_table = table_info->vdd_dep_on_sclk; in fiji_populate_single_graphic_level()1318 table_info->vdd_dep_on_sclk, in fiji_populate_smc_acpi_level()1639 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in fiji_populate_smc_initailial_state()1641 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in fiji_populate_smc_initailial_state()1671 table_info->vdd_dep_on_sclk; in fiji_populate_clock_stretcher_data_table()
632 vdd_dep_table = pptable_info->vdd_dep_on_sclk; in tonga_populate_single_graphic_level()1585 table_info->vdd_dep_on_sclk; in tonga_populate_clock_stretcher_data_table()