Searched refs:vdd_dep_on_sclk (Results 1 – 11 of 11) sorted by relevance
504 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()541 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()769 if (pp_table_information->vdd_dep_on_sclk->count < in get_gpio_table()818 pp_table_information->vdd_dep_on_sclk = NULL; in init_clock_voltage_dependency()834 &pp_table_information->vdd_dep_on_sclk, sclk_dep_table); in init_clock_voltage_dependency()862 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_sclk) in init_clock_voltage_dependency()863 && (0 != pp_table_information->vdd_dep_on_sclk->count)) in init_clock_voltage_dependency()865 pp_table_information->vdd_dep_on_sclk); in init_clock_voltage_dependency()1193 kfree(pp_table_information->vdd_dep_on_sclk); in pp_tables_v1_0_uninitialize()1194 pp_table_information->vdd_dep_on_sclk = NULL; in pp_tables_v1_0_uninitialize()
472 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in phm_get_sclk_for_voltage_evv()473 voltage_id = table_info->vdd_dep_on_sclk->entries[entry_id].vddInd; in phm_get_sclk_for_voltage_evv()478 if (entry_id >= table_info->vdd_dep_on_sclk->count) { in phm_get_sclk_for_voltage_evv()483 *sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk; in phm_get_sclk_for_voltage_evv()567 vddc_table = table_info->vdd_dep_on_sclk; in phm_apply_dal_min_voltage_request()
802 pcie_count = table_info->vdd_dep_on_sclk->count; in get_pcie_table()925 pp_table_info->vdd_dep_on_sclk = NULL; in init_powerplay_extended_tables()951 &pp_table_info->vdd_dep_on_sclk, in init_powerplay_extended_tables()1009 pp_table_info->vdd_dep_on_sclk && in init_powerplay_extended_tables()1010 pp_table_info->vdd_dep_on_sclk->count) in init_powerplay_extended_tables()1013 pp_table_info->vdd_dep_on_sclk); in init_powerplay_extended_tables()1201 kfree(pp_table_info->vdd_dep_on_sclk); in vega10_pp_tables_uninitialize()1202 pp_table_info->vdd_dep_on_sclk = NULL; in vega10_pp_tables_uninitialize()
880 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_dpm_tables_v1()947 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_odn_initial_default_setting()989 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_voltage_range_from_vbios()1045 dep_table = table_info->vdd_dep_on_sclk; in smu7_check_dpm_table_updated()1538 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk = in smu7_populate_umdpstate_clocks() local1539 table_info->vdd_dep_on_sclk; in smu7_populate_umdpstate_clocks()1541 for (count = vdd_dep_on_sclk->count - 1; count >= 0; count--) { in smu7_populate_umdpstate_clocks()1542 if (tmp_sclk >= vdd_dep_on_sclk->entries[count].clk) { in smu7_populate_umdpstate_clocks()1543 hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[count].clk; in smu7_populate_umdpstate_clocks()1548 hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[0].clk; in smu7_populate_umdpstate_clocks()[all …]
331 dep_table[0] = table_info->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()334 od_table[0] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()538 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in vega10_get_socclk_for_voltage_evv()683 case 1: vdt = table_info->vdd_dep_on_sclk; break; in vega10_patch_voltage_dependency_tables_with_lookup_table()1199 table_info->vdd_dep_on_sclk, in vega10_construct_voltage_tables()1318 table_info->vdd_dep_on_sclk; in vega10_setup_default_dpm_tables()1628 &(data->odn_dpm_table.vdd_dep_on_sclk); in vega10_populate_single_gfx_level()1630 dep_on_sclk = table_info->vdd_dep_on_sclk; in vega10_populate_single_gfx_level()2157 table_info->vdd_dep_on_sclk; in vega10_populate_clock_stretcher_table()2176 table_info->vdd_dep_on_sclk; in vega10_populate_avfs_parameters()[all …]
295 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_sclk; member
824 table_info->vdd_dep_on_sclk, clock, in vegam_populate_single_graphic_level()1127 table_info->vdd_dep_on_sclk, in vegam_populate_smc_acpi_level()1409 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in vegam_populate_smc_initial_state()1412 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in vegam_populate_smc_initial_state()1496 table_info->vdd_dep_on_sclk; in vegam_populate_clock_stretcher_data_table()1576 table_info->vdd_dep_on_sclk; in vegam_populate_avfs_parameters()
972 vdd_dep_table = table_info->vdd_dep_on_sclk; in polaris10_populate_single_graphic_level()1294 table_info->vdd_dep_on_sclk, in polaris10_populate_smc_acpi_level()1625 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in polaris10_populate_smc_initailial_state()1628 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in polaris10_populate_smc_initailial_state()1657 table_info->vdd_dep_on_sclk; in polaris10_populate_clock_stretcher_data_table()1785 table_info->vdd_dep_on_sclk; in polaris10_populate_avfs_parameters()
952 vdd_dep_table = table_info->vdd_dep_on_sclk; in fiji_populate_single_graphic_level()1318 table_info->vdd_dep_on_sclk, in fiji_populate_smc_acpi_level()1639 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in fiji_populate_smc_initailial_state()1641 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in fiji_populate_smc_initailial_state()1671 table_info->vdd_dep_on_sclk; in fiji_populate_clock_stretcher_data_table()
632 vdd_dep_table = pptable_info->vdd_dep_on_sclk; in tonga_populate_single_graphic_level()1585 table_info->vdd_dep_on_sclk; in tonga_populate_clock_stretcher_data_table()
534 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk; member563 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk; member