Home
last modified time | relevance | path

Searched refs:vba (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_32.c41 dml32_CalculateMaxDETAndMinCompressedBufferSize(mode_lib->vba.ConfigReturnBufferSizeInKByte, in dml32_recalculate()
42 mode_lib->vba.ROBBufferSizeInKByte, in dml32_recalculate()
48 &mode_lib->vba.MaxTotalDETInKByte, &mode_lib->vba.nomDETInKByte, in dml32_recalculate()
49 &mode_lib->vba.MinCompressedBufferSizeInKByte); in dml32_recalculate()
61 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
76 dml_print("DML::%s: mode_lib->vba.PrefetchMode = %d\n", __func__, mode_lib->vba.PrefetchMode); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
77 …dml_print("DML::%s: mode_lib->vba.ImmediateFlipSupport = %d\n", __func__, mode_lib->vba.ImmediateF… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
78 dml_print("DML::%s: mode_lib->vba.VoltageLevel = %d\n", __func__, mode_lib->vba.VoltageLevel); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
85 for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
86 if (mode_lib->vba.WritebackEnable[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c57 bool need_recalculate = memcmp(&mode_lib->soc, &mode_lib->vba.soc, sizeof(mode_lib->vba.soc)) != 0 in dml_get_voltage_level()
58 || memcmp(&mode_lib->ip, &mode_lib->vba.ip, sizeof(mode_lib->vba.ip)) != 0 in dml_get_voltage_level()
59 || num_pipes != mode_lib->vba.cache_num_pipes in dml_get_voltage_level()
60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
63 mode_lib->vba.soc = mode_lib->soc; in dml_get_voltage_level()
64 mode_lib->vba.ip = mode_lib->ip; in dml_get_voltage_level()
65 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
66 mode_lib->vba.cache_num_pipes = num_pipes; in dml_get_voltage_level()
79 return mode_lib->vba.VoltageLevel; in dml_get_voltage_level()
88 dml_get_attr_func(clk_dcf_deepsleep, mode_lib->vba.DCFCLKDeepSleep);
[all …]
H A Ddisplay_mode_lib.c291 for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { in dml_log_mode_support_params()
294 …dml_print("DML SUPPORT: Mode Supported : %s\n", mode_lib->vba.ModeSupport[i][0] ?… in dml_log_mode_support_params()
295 …dml_print("DML SUPPORT: Mode Supported (pipe split) : %s\n", mode_lib->vba.ModeSupport[i][1] ?… in dml_log_mode_support_params()
296 …dml_print("DML SUPPORT: Scale Ratio And Taps : %s\n", mode_lib->vba.ScaleRatioA… in dml_log_mode_support_params()
297 …dml_print("DML SUPPORT: Source Format Pixel And Scan : %s\n", mode_lib->vba.SourceForma… in dml_log_mode_support_params()
298 … : [%s, %s]\n", mode_lib->vba.ViewportSizeSupport[i][0] ? "Supported" : "NOT Supported… in dml_log_mode_support_params()
299 …dml_print("DML SUPPORT: DIO Support : %s\n", mode_lib->vba.DIOSupport[… in dml_log_mode_support_params()
300 …dml_print("DML SUPPORT: ODM Combine 4To1 Support Check : %s\n", mode_lib->vba.ODMCombine4… in dml_log_mode_support_params()
301 …dml_print("DML SUPPORT: DSC Units : %s\n", mode_lib->vba.NotEnoughDS… in dml_log_mode_support_params()
302 …dml_print("DML SUPPORT: DSCCLK Required : %s\n", mode_lib->vba.DSCCLKRequi… in dml_log_mode_support_params()
[all …]
H A Ddisplay_mode_lib.h89 struct vba_vars_st vba; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
489 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn31_calculate_wm_and_dlg_fp()
562 …context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_d… in dcn31_calculate_wm_and_dlg_fp()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1639 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn30_internal_validate_bw() local
1645 context->bw_ctx.dml.vba.maxMpcComb = 0; in dcn30_internal_validate_bw()
1646 context->bw_ctx.dml.vba.VoltageLevel = 0; in dcn30_internal_validate_bw()
1647 context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dcn30_internal_validate_bw()
1673 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported)) { in dcn30_internal_validate_bw()
1708 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn30_internal_validate_bw()
1777 odm = vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled; in dcn30_internal_validate_bw()
1863 vba->ValidationStatus[vba->soc.num_states] = DML_FAIL_DSC_VALIDATION_FAILURE; in dcn30_internal_validate_bw()
1869 context->bw_ctx.dml.vba.VoltageLevel = vlevel; in dcn30_internal_validate_bw()
2085 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn30_validate_bandwidth()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c824 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn21_fast_validate_bw() local
830 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn21_fast_validate_bw()
854 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn21_fast_validate_bw()
878 …dcn20_fpu_adjust_dppclk(&context->bw_ctx.dml.vba, vlevel, context->bw_ctx.dml.vba.maxMpcComb, pipe… in dcn21_fast_validate_bw()
882 if (context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn21_fast_validate_bw()
904 context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] = in dcn21_fast_validate_bw()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c635 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in set_p_state_switch_method() local
638 if (!dc->ctx || !dc->ctx->dmub_srv || !pipe_ctx || !vba) in set_p_state_switch_method()
642 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] != in set_p_state_switch_method()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c711 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn32_subvp_vblank_admissable() local
744 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vblank_w_mall_sub_vp) in dcn32_subvp_vblank_admissable()
H A Ddcn32_resource.c1797 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dml1_validate()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1826 struct vba_vars_st *v = &context->bw_ctx.dml.vba; in dcn20_validate_apply_pipe_split_flags()
2054 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn20_fast_validate_bw()
2073 && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) in dcn20_fast_validate_bw()
2083 …dcn20_fpu_adjust_dppclk(&context->bw_ctx.dml.vba, vlevel, context->bw_ctx.dml.vba.maxMpcComb, pipe… in dcn20_fast_validate_bw()
2087 if (context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn20_fast_validate_bw()
2110 context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] = in dcn20_fast_validate_bw()
/linux/mm/
H A Dmemory.c4029 pgoff_t vba, vea, zba, zea; in unmap_mapping_range_tree() local
4032 vba = vma->vm_pgoff; in unmap_mapping_range_tree()
4033 vea = vba + vma_pages(vma) - 1; in unmap_mapping_range_tree()
4034 zba = max(first_index, vba); in unmap_mapping_range_tree()
4038 ((zba - vba) << PAGE_SHIFT) + vma->vm_start, in unmap_mapping_range_tree()
4039 ((zea - vba + 1) << PAGE_SHIFT) + vma->vm_start, in unmap_mapping_range_tree()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c1744 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn314_validate_bandwidth()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c1806 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn31_validate_bandwidth()