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Searched refs:v_sync_width (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/video/fbdev/
H A Dacornfb.h67 u_int v_sync_width; member
H A Dacornfb.c129 vidc.v_sync_width = var->vsync_len - 1; in acornfb_set_timing()
130 vidc.v_border_start = vidc.v_sync_width + var->upper_margin; in acornfb_set_timing()
172 vidc_writel(0x91000000 | vidc.v_sync_width); in acornfb_set_timing()
233 printk(KERN_DEBUG " V-sync-width : %d\n", vidc.v_sync_width); in acornfb_set_timing()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddcn314_fpu.c302 v_back_porch = v_blank - timing->v_front_porch - timing->v_sync_width; in get_vertical_back_porch()
347 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn314_populate_dml_pipes_from_context_fpu()
/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator_v.c351 timing->v_sync_width, in dce110_timing_generator_v_program_blanking()
392 if ((timing->v_sync_width + timing->v_front_porch) <= 3) { in dce110_timing_generator_v_enable_advanced_request()
H A Ddce110_timing_generator.c318 bp_params.v_sync_width = patched_crtc_timing.v_sync_width; in dce110_timing_generator_program_timing_generator()
1432 if ((timing->v_sync_width + timing->v_front_porch) <= 3) { in dce110_timing_generator_enable_advanced_request()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn201/
H A Ddcn201_optc.c107 timing->v_sync_width < optc1->min_v_sync_width) in optc201_validate_timing()
/linux/drivers/gpu/drm/amd/display/dc/dce80/
H A Ddce80_timing_generator.c147 if ((timing->v_sync_width + timing->v_front_porch) <= 3) { in dce80_timing_generator_enable_advanced_request()
/linux/drivers/gpu/drm/amd/display/include/
H A Dbios_parser_types.h185 uint32_t v_sync_width; member
/linux/drivers/gpu/drm/amd/display/dc/hpo/dcn31/
H A Ddcn31_hpo_dp_stream_encoder.c422 MSA_DATA_LANE_1, vsp | (hw_crtc_timing.v_sync_width >> 8), in dcn31_hpo_dp_stream_enc_set_stream_attribute()
428 MSA_DATA_LANE_1, hw_crtc_timing.v_sync_width & 0xff, in dcn31_hpo_dp_stream_enc_set_stream_attribute()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c430 v_back_porch = v_blank - timing->v_front_porch - timing->v_sync_width; in get_vertical_back_porch()
479 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn35_populate_dml_pipes_from_context_fpu()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.c232 v_sync_end = patched_crtc_timing.v_sync_width; in optc1_program_timing()
634 timing->v_sync_width < optc1->min_v_sync_width) in optc1_validate_timing()
1325 hw_crtc_timing->v_sync_width = s.v_sync_a_end - s.v_sync_a_start; in optc1_get_hw_timing()
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_catalog.c973 u32 v_sync_width; in msm_dp_catalog_panel_tpg_enable() local
994 v_sync_width = drm_mode->vsync_end - drm_mode->vsync_start; in msm_dp_catalog_panel_tpg_enable()
1004 msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, v_sync_width * in msm_dp_catalog_panel_tpg_enable()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_mall_phantom.c692 …th_time = (phantom_stream->timing.v_front_porch + phantom_stream->timing.v_sync_width) * line_time; in set_phantom_stream_timing()
710 phantom_stream->timing.v_sync_width + in set_phantom_stream_timing()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_hw_types.h964 uint32_t v_sync_width; member
/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table2.c602 params.v_syncwidth = cpu_to_le16((uint16_t)bp_params->v_sync_width); in set_crtc_using_dtd_timing_v3()
H A Dcommand_table.c1844 cpu_to_le16((uint16_t)(bp_params->v_sync_width)); in set_crtc_timing_v1()
1929 params.usV_SyncWidth = cpu_to_le16((uint16_t)bp_params->v_sync_width); in set_crtc_using_dtd_timing_v3()
/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c122 timing->v_sync_width < tg110->min_v_sync_width) in dce120_timing_generator_validate_timing()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c1797 if (crtc_timing->v_sync_width != hw_crtc_timing.v_sync_width) in dc_validate_boot_timing()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c543 phantom_stream->timing.v_sync_width + in dcn32_set_phantom_stream_timing()