1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4 */
5
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9
10 #include "pinctrl-msm.h"
11
12 #define REG_SIZE 0x1000
13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
14 { \
15 .grp = PINCTRL_PINGROUP("gpio" #id, \
16 gpio##id##_pins, \
17 ARRAY_SIZE(gpio##id##_pins)), \
18 .ctl_reg = REG_SIZE * id, \
19 .io_reg = 0x4 + REG_SIZE * id, \
20 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
21 .intr_status_reg = 0xc + REG_SIZE * id, \
22 .mux_bit = 2, \
23 .pull_bit = 0, \
24 .drv_bit = 6, \
25 .egpio_enable = 12, \
26 .egpio_present = 11, \
27 .oe_bit = 9, \
28 .in_bit = 0, \
29 .out_bit = 1, \
30 .intr_enable_bit = 0, \
31 .intr_status_bit = 0, \
32 .intr_wakeup_present_bit = 6, \
33 .intr_wakeup_enable_bit = 7, \
34 .intr_target_bit = 8, \
35 .intr_target_kpss_val = 3, \
36 .intr_raw_status_bit = 4, \
37 .intr_polarity_bit = 1, \
38 .intr_detection_bit = 2, \
39 .intr_detection_width = 2, \
40 .funcs = (int[]){ \
41 msm_mux_gpio, /* gpio mode */ \
42 msm_mux_##f1, \
43 msm_mux_##f2, \
44 msm_mux_##f3, \
45 msm_mux_##f4, \
46 msm_mux_##f5, \
47 msm_mux_##f6, \
48 msm_mux_##f7, \
49 msm_mux_##f8, \
50 msm_mux_##f9, \
51 msm_mux_##f10, \
52 msm_mux_##f11 /* egpio mode */ \
53 }, \
54 .nfuncs = 12, \
55 }
56
57 #define UFS_RESET(pg_name, ctl, io) \
58 { \
59 .grp = PINCTRL_PINGROUP(#pg_name, \
60 pg_name##_pins, \
61 ARRAY_SIZE(pg_name##_pins)), \
62 .ctl_reg = ctl, \
63 .io_reg = io, \
64 .intr_cfg_reg = 0, \
65 .intr_status_reg = 0, \
66 .mux_bit = -1, \
67 .pull_bit = 3, \
68 .drv_bit = 0, \
69 .oe_bit = -1, \
70 .in_bit = -1, \
71 .out_bit = 0, \
72 .intr_enable_bit = -1, \
73 .intr_status_bit = -1, \
74 .intr_target_bit = -1, \
75 .intr_raw_status_bit = -1, \
76 .intr_polarity_bit = -1, \
77 .intr_detection_bit = -1, \
78 .intr_detection_width = -1, \
79 }
80
81 static const struct pinctrl_pin_desc nord_pins[] = {
82 PINCTRL_PIN(0, "GPIO_0"),
83 PINCTRL_PIN(1, "GPIO_1"),
84 PINCTRL_PIN(2, "GPIO_2"),
85 PINCTRL_PIN(3, "GPIO_3"),
86 PINCTRL_PIN(4, "GPIO_4"),
87 PINCTRL_PIN(5, "GPIO_5"),
88 PINCTRL_PIN(6, "GPIO_6"),
89 PINCTRL_PIN(7, "GPIO_7"),
90 PINCTRL_PIN(8, "GPIO_8"),
91 PINCTRL_PIN(9, "GPIO_9"),
92 PINCTRL_PIN(10, "GPIO_10"),
93 PINCTRL_PIN(11, "GPIO_11"),
94 PINCTRL_PIN(12, "GPIO_12"),
95 PINCTRL_PIN(13, "GPIO_13"),
96 PINCTRL_PIN(14, "GPIO_14"),
97 PINCTRL_PIN(15, "GPIO_15"),
98 PINCTRL_PIN(16, "GPIO_16"),
99 PINCTRL_PIN(17, "GPIO_17"),
100 PINCTRL_PIN(18, "GPIO_18"),
101 PINCTRL_PIN(19, "GPIO_19"),
102 PINCTRL_PIN(20, "GPIO_20"),
103 PINCTRL_PIN(21, "GPIO_21"),
104 PINCTRL_PIN(22, "GPIO_22"),
105 PINCTRL_PIN(23, "GPIO_23"),
106 PINCTRL_PIN(24, "GPIO_24"),
107 PINCTRL_PIN(25, "GPIO_25"),
108 PINCTRL_PIN(26, "GPIO_26"),
109 PINCTRL_PIN(27, "GPIO_27"),
110 PINCTRL_PIN(28, "GPIO_28"),
111 PINCTRL_PIN(29, "GPIO_29"),
112 PINCTRL_PIN(30, "GPIO_30"),
113 PINCTRL_PIN(31, "GPIO_31"),
114 PINCTRL_PIN(32, "GPIO_32"),
115 PINCTRL_PIN(33, "GPIO_33"),
116 PINCTRL_PIN(34, "GPIO_34"),
117 PINCTRL_PIN(35, "GPIO_35"),
118 PINCTRL_PIN(36, "GPIO_36"),
119 PINCTRL_PIN(37, "GPIO_37"),
120 PINCTRL_PIN(38, "GPIO_38"),
121 PINCTRL_PIN(39, "GPIO_39"),
122 PINCTRL_PIN(40, "GPIO_40"),
123 PINCTRL_PIN(41, "GPIO_41"),
124 PINCTRL_PIN(42, "GPIO_42"),
125 PINCTRL_PIN(43, "GPIO_43"),
126 PINCTRL_PIN(44, "GPIO_44"),
127 PINCTRL_PIN(45, "GPIO_45"),
128 PINCTRL_PIN(46, "GPIO_46"),
129 PINCTRL_PIN(47, "GPIO_47"),
130 PINCTRL_PIN(48, "GPIO_48"),
131 PINCTRL_PIN(49, "GPIO_49"),
132 PINCTRL_PIN(50, "GPIO_50"),
133 PINCTRL_PIN(51, "GPIO_51"),
134 PINCTRL_PIN(52, "GPIO_52"),
135 PINCTRL_PIN(53, "GPIO_53"),
136 PINCTRL_PIN(54, "GPIO_54"),
137 PINCTRL_PIN(55, "GPIO_55"),
138 PINCTRL_PIN(56, "GPIO_56"),
139 PINCTRL_PIN(57, "GPIO_57"),
140 PINCTRL_PIN(58, "GPIO_58"),
141 PINCTRL_PIN(59, "GPIO_59"),
142 PINCTRL_PIN(60, "GPIO_60"),
143 PINCTRL_PIN(61, "GPIO_61"),
144 PINCTRL_PIN(62, "GPIO_62"),
145 PINCTRL_PIN(63, "GPIO_63"),
146 PINCTRL_PIN(64, "GPIO_64"),
147 PINCTRL_PIN(65, "GPIO_65"),
148 PINCTRL_PIN(66, "GPIO_66"),
149 PINCTRL_PIN(67, "GPIO_67"),
150 PINCTRL_PIN(68, "GPIO_68"),
151 PINCTRL_PIN(69, "GPIO_69"),
152 PINCTRL_PIN(70, "GPIO_70"),
153 PINCTRL_PIN(71, "GPIO_71"),
154 PINCTRL_PIN(72, "GPIO_72"),
155 PINCTRL_PIN(73, "GPIO_73"),
156 PINCTRL_PIN(74, "GPIO_74"),
157 PINCTRL_PIN(75, "GPIO_75"),
158 PINCTRL_PIN(76, "GPIO_76"),
159 PINCTRL_PIN(77, "GPIO_77"),
160 PINCTRL_PIN(78, "GPIO_78"),
161 PINCTRL_PIN(79, "GPIO_79"),
162 PINCTRL_PIN(80, "GPIO_80"),
163 PINCTRL_PIN(81, "GPIO_81"),
164 PINCTRL_PIN(82, "GPIO_82"),
165 PINCTRL_PIN(83, "GPIO_83"),
166 PINCTRL_PIN(84, "GPIO_84"),
167 PINCTRL_PIN(85, "GPIO_85"),
168 PINCTRL_PIN(86, "GPIO_86"),
169 PINCTRL_PIN(87, "GPIO_87"),
170 PINCTRL_PIN(88, "GPIO_88"),
171 PINCTRL_PIN(89, "GPIO_89"),
172 PINCTRL_PIN(90, "GPIO_90"),
173 PINCTRL_PIN(91, "GPIO_91"),
174 PINCTRL_PIN(92, "GPIO_92"),
175 PINCTRL_PIN(93, "GPIO_93"),
176 PINCTRL_PIN(94, "GPIO_94"),
177 PINCTRL_PIN(95, "GPIO_95"),
178 PINCTRL_PIN(96, "GPIO_96"),
179 PINCTRL_PIN(97, "GPIO_97"),
180 PINCTRL_PIN(98, "GPIO_98"),
181 PINCTRL_PIN(99, "GPIO_99"),
182 PINCTRL_PIN(100, "GPIO_100"),
183 PINCTRL_PIN(101, "GPIO_101"),
184 PINCTRL_PIN(102, "GPIO_102"),
185 PINCTRL_PIN(103, "GPIO_103"),
186 PINCTRL_PIN(104, "GPIO_104"),
187 PINCTRL_PIN(105, "GPIO_105"),
188 PINCTRL_PIN(106, "GPIO_106"),
189 PINCTRL_PIN(107, "GPIO_107"),
190 PINCTRL_PIN(108, "GPIO_108"),
191 PINCTRL_PIN(109, "GPIO_109"),
192 PINCTRL_PIN(110, "GPIO_110"),
193 PINCTRL_PIN(111, "GPIO_111"),
194 PINCTRL_PIN(112, "GPIO_112"),
195 PINCTRL_PIN(113, "GPIO_113"),
196 PINCTRL_PIN(114, "GPIO_114"),
197 PINCTRL_PIN(115, "GPIO_115"),
198 PINCTRL_PIN(116, "GPIO_116"),
199 PINCTRL_PIN(117, "GPIO_117"),
200 PINCTRL_PIN(118, "GPIO_118"),
201 PINCTRL_PIN(119, "GPIO_119"),
202 PINCTRL_PIN(120, "GPIO_120"),
203 PINCTRL_PIN(121, "GPIO_121"),
204 PINCTRL_PIN(122, "GPIO_122"),
205 PINCTRL_PIN(123, "GPIO_123"),
206 PINCTRL_PIN(124, "GPIO_124"),
207 PINCTRL_PIN(125, "GPIO_125"),
208 PINCTRL_PIN(126, "GPIO_126"),
209 PINCTRL_PIN(127, "GPIO_127"),
210 PINCTRL_PIN(128, "GPIO_128"),
211 PINCTRL_PIN(129, "GPIO_129"),
212 PINCTRL_PIN(130, "GPIO_130"),
213 PINCTRL_PIN(131, "GPIO_131"),
214 PINCTRL_PIN(132, "GPIO_132"),
215 PINCTRL_PIN(133, "GPIO_133"),
216 PINCTRL_PIN(134, "GPIO_134"),
217 PINCTRL_PIN(135, "GPIO_135"),
218 PINCTRL_PIN(136, "GPIO_136"),
219 PINCTRL_PIN(137, "GPIO_137"),
220 PINCTRL_PIN(138, "GPIO_138"),
221 PINCTRL_PIN(139, "GPIO_139"),
222 PINCTRL_PIN(140, "GPIO_140"),
223 PINCTRL_PIN(141, "GPIO_141"),
224 PINCTRL_PIN(142, "GPIO_142"),
225 PINCTRL_PIN(143, "GPIO_143"),
226 PINCTRL_PIN(144, "GPIO_144"),
227 PINCTRL_PIN(145, "GPIO_145"),
228 PINCTRL_PIN(146, "GPIO_146"),
229 PINCTRL_PIN(147, "GPIO_147"),
230 PINCTRL_PIN(148, "GPIO_148"),
231 PINCTRL_PIN(149, "GPIO_149"),
232 PINCTRL_PIN(150, "GPIO_150"),
233 PINCTRL_PIN(151, "GPIO_151"),
234 PINCTRL_PIN(152, "GPIO_152"),
235 PINCTRL_PIN(153, "GPIO_153"),
236 PINCTRL_PIN(154, "GPIO_154"),
237 PINCTRL_PIN(155, "GPIO_155"),
238 PINCTRL_PIN(156, "GPIO_156"),
239 PINCTRL_PIN(157, "GPIO_157"),
240 PINCTRL_PIN(158, "GPIO_158"),
241 PINCTRL_PIN(159, "GPIO_159"),
242 PINCTRL_PIN(160, "GPIO_160"),
243 PINCTRL_PIN(161, "GPIO_161"),
244 PINCTRL_PIN(162, "GPIO_162"),
245 PINCTRL_PIN(163, "GPIO_163"),
246 PINCTRL_PIN(164, "GPIO_164"),
247 PINCTRL_PIN(165, "GPIO_165"),
248 PINCTRL_PIN(166, "GPIO_166"),
249 PINCTRL_PIN(167, "GPIO_167"),
250 PINCTRL_PIN(168, "GPIO_168"),
251 PINCTRL_PIN(169, "GPIO_169"),
252 PINCTRL_PIN(170, "GPIO_170"),
253 PINCTRL_PIN(171, "GPIO_171"),
254 PINCTRL_PIN(172, "GPIO_172"),
255 PINCTRL_PIN(173, "GPIO_173"),
256 PINCTRL_PIN(174, "GPIO_174"),
257 PINCTRL_PIN(175, "GPIO_175"),
258 PINCTRL_PIN(176, "GPIO_176"),
259 PINCTRL_PIN(177, "GPIO_177"),
260 PINCTRL_PIN(178, "GPIO_178"),
261 PINCTRL_PIN(179, "GPIO_179"),
262 PINCTRL_PIN(180, "GPIO_180"),
263 PINCTRL_PIN(181, "UFS_RESET"),
264 };
265
266 #define DECLARE_MSM_GPIO_PINS(pin) \
267 static const unsigned int gpio##pin##_pins[] = { pin }
268 DECLARE_MSM_GPIO_PINS(0);
269 DECLARE_MSM_GPIO_PINS(1);
270 DECLARE_MSM_GPIO_PINS(2);
271 DECLARE_MSM_GPIO_PINS(3);
272 DECLARE_MSM_GPIO_PINS(4);
273 DECLARE_MSM_GPIO_PINS(5);
274 DECLARE_MSM_GPIO_PINS(6);
275 DECLARE_MSM_GPIO_PINS(7);
276 DECLARE_MSM_GPIO_PINS(8);
277 DECLARE_MSM_GPIO_PINS(9);
278 DECLARE_MSM_GPIO_PINS(10);
279 DECLARE_MSM_GPIO_PINS(11);
280 DECLARE_MSM_GPIO_PINS(12);
281 DECLARE_MSM_GPIO_PINS(13);
282 DECLARE_MSM_GPIO_PINS(14);
283 DECLARE_MSM_GPIO_PINS(15);
284 DECLARE_MSM_GPIO_PINS(16);
285 DECLARE_MSM_GPIO_PINS(17);
286 DECLARE_MSM_GPIO_PINS(18);
287 DECLARE_MSM_GPIO_PINS(19);
288 DECLARE_MSM_GPIO_PINS(20);
289 DECLARE_MSM_GPIO_PINS(21);
290 DECLARE_MSM_GPIO_PINS(22);
291 DECLARE_MSM_GPIO_PINS(23);
292 DECLARE_MSM_GPIO_PINS(24);
293 DECLARE_MSM_GPIO_PINS(25);
294 DECLARE_MSM_GPIO_PINS(26);
295 DECLARE_MSM_GPIO_PINS(27);
296 DECLARE_MSM_GPIO_PINS(28);
297 DECLARE_MSM_GPIO_PINS(29);
298 DECLARE_MSM_GPIO_PINS(30);
299 DECLARE_MSM_GPIO_PINS(31);
300 DECLARE_MSM_GPIO_PINS(32);
301 DECLARE_MSM_GPIO_PINS(33);
302 DECLARE_MSM_GPIO_PINS(34);
303 DECLARE_MSM_GPIO_PINS(35);
304 DECLARE_MSM_GPIO_PINS(36);
305 DECLARE_MSM_GPIO_PINS(37);
306 DECLARE_MSM_GPIO_PINS(38);
307 DECLARE_MSM_GPIO_PINS(39);
308 DECLARE_MSM_GPIO_PINS(40);
309 DECLARE_MSM_GPIO_PINS(41);
310 DECLARE_MSM_GPIO_PINS(42);
311 DECLARE_MSM_GPIO_PINS(43);
312 DECLARE_MSM_GPIO_PINS(44);
313 DECLARE_MSM_GPIO_PINS(45);
314 DECLARE_MSM_GPIO_PINS(46);
315 DECLARE_MSM_GPIO_PINS(47);
316 DECLARE_MSM_GPIO_PINS(48);
317 DECLARE_MSM_GPIO_PINS(49);
318 DECLARE_MSM_GPIO_PINS(50);
319 DECLARE_MSM_GPIO_PINS(51);
320 DECLARE_MSM_GPIO_PINS(52);
321 DECLARE_MSM_GPIO_PINS(53);
322 DECLARE_MSM_GPIO_PINS(54);
323 DECLARE_MSM_GPIO_PINS(55);
324 DECLARE_MSM_GPIO_PINS(56);
325 DECLARE_MSM_GPIO_PINS(57);
326 DECLARE_MSM_GPIO_PINS(58);
327 DECLARE_MSM_GPIO_PINS(59);
328 DECLARE_MSM_GPIO_PINS(60);
329 DECLARE_MSM_GPIO_PINS(61);
330 DECLARE_MSM_GPIO_PINS(62);
331 DECLARE_MSM_GPIO_PINS(63);
332 DECLARE_MSM_GPIO_PINS(64);
333 DECLARE_MSM_GPIO_PINS(65);
334 DECLARE_MSM_GPIO_PINS(66);
335 DECLARE_MSM_GPIO_PINS(67);
336 DECLARE_MSM_GPIO_PINS(68);
337 DECLARE_MSM_GPIO_PINS(69);
338 DECLARE_MSM_GPIO_PINS(70);
339 DECLARE_MSM_GPIO_PINS(71);
340 DECLARE_MSM_GPIO_PINS(72);
341 DECLARE_MSM_GPIO_PINS(73);
342 DECLARE_MSM_GPIO_PINS(74);
343 DECLARE_MSM_GPIO_PINS(75);
344 DECLARE_MSM_GPIO_PINS(76);
345 DECLARE_MSM_GPIO_PINS(77);
346 DECLARE_MSM_GPIO_PINS(78);
347 DECLARE_MSM_GPIO_PINS(79);
348 DECLARE_MSM_GPIO_PINS(80);
349 DECLARE_MSM_GPIO_PINS(81);
350 DECLARE_MSM_GPIO_PINS(82);
351 DECLARE_MSM_GPIO_PINS(83);
352 DECLARE_MSM_GPIO_PINS(84);
353 DECLARE_MSM_GPIO_PINS(85);
354 DECLARE_MSM_GPIO_PINS(86);
355 DECLARE_MSM_GPIO_PINS(87);
356 DECLARE_MSM_GPIO_PINS(88);
357 DECLARE_MSM_GPIO_PINS(89);
358 DECLARE_MSM_GPIO_PINS(90);
359 DECLARE_MSM_GPIO_PINS(91);
360 DECLARE_MSM_GPIO_PINS(92);
361 DECLARE_MSM_GPIO_PINS(93);
362 DECLARE_MSM_GPIO_PINS(94);
363 DECLARE_MSM_GPIO_PINS(95);
364 DECLARE_MSM_GPIO_PINS(96);
365 DECLARE_MSM_GPIO_PINS(97);
366 DECLARE_MSM_GPIO_PINS(98);
367 DECLARE_MSM_GPIO_PINS(99);
368 DECLARE_MSM_GPIO_PINS(100);
369 DECLARE_MSM_GPIO_PINS(101);
370 DECLARE_MSM_GPIO_PINS(102);
371 DECLARE_MSM_GPIO_PINS(103);
372 DECLARE_MSM_GPIO_PINS(104);
373 DECLARE_MSM_GPIO_PINS(105);
374 DECLARE_MSM_GPIO_PINS(106);
375 DECLARE_MSM_GPIO_PINS(107);
376 DECLARE_MSM_GPIO_PINS(108);
377 DECLARE_MSM_GPIO_PINS(109);
378 DECLARE_MSM_GPIO_PINS(110);
379 DECLARE_MSM_GPIO_PINS(111);
380 DECLARE_MSM_GPIO_PINS(112);
381 DECLARE_MSM_GPIO_PINS(113);
382 DECLARE_MSM_GPIO_PINS(114);
383 DECLARE_MSM_GPIO_PINS(115);
384 DECLARE_MSM_GPIO_PINS(116);
385 DECLARE_MSM_GPIO_PINS(117);
386 DECLARE_MSM_GPIO_PINS(118);
387 DECLARE_MSM_GPIO_PINS(119);
388 DECLARE_MSM_GPIO_PINS(120);
389 DECLARE_MSM_GPIO_PINS(121);
390 DECLARE_MSM_GPIO_PINS(122);
391 DECLARE_MSM_GPIO_PINS(123);
392 DECLARE_MSM_GPIO_PINS(124);
393 DECLARE_MSM_GPIO_PINS(125);
394 DECLARE_MSM_GPIO_PINS(126);
395 DECLARE_MSM_GPIO_PINS(127);
396 DECLARE_MSM_GPIO_PINS(128);
397 DECLARE_MSM_GPIO_PINS(129);
398 DECLARE_MSM_GPIO_PINS(130);
399 DECLARE_MSM_GPIO_PINS(131);
400 DECLARE_MSM_GPIO_PINS(132);
401 DECLARE_MSM_GPIO_PINS(133);
402 DECLARE_MSM_GPIO_PINS(134);
403 DECLARE_MSM_GPIO_PINS(135);
404 DECLARE_MSM_GPIO_PINS(136);
405 DECLARE_MSM_GPIO_PINS(137);
406 DECLARE_MSM_GPIO_PINS(138);
407 DECLARE_MSM_GPIO_PINS(139);
408 DECLARE_MSM_GPIO_PINS(140);
409 DECLARE_MSM_GPIO_PINS(141);
410 DECLARE_MSM_GPIO_PINS(142);
411 DECLARE_MSM_GPIO_PINS(143);
412 DECLARE_MSM_GPIO_PINS(144);
413 DECLARE_MSM_GPIO_PINS(145);
414 DECLARE_MSM_GPIO_PINS(146);
415 DECLARE_MSM_GPIO_PINS(147);
416 DECLARE_MSM_GPIO_PINS(148);
417 DECLARE_MSM_GPIO_PINS(149);
418 DECLARE_MSM_GPIO_PINS(150);
419 DECLARE_MSM_GPIO_PINS(151);
420 DECLARE_MSM_GPIO_PINS(152);
421 DECLARE_MSM_GPIO_PINS(153);
422 DECLARE_MSM_GPIO_PINS(154);
423 DECLARE_MSM_GPIO_PINS(155);
424 DECLARE_MSM_GPIO_PINS(156);
425 DECLARE_MSM_GPIO_PINS(157);
426 DECLARE_MSM_GPIO_PINS(158);
427 DECLARE_MSM_GPIO_PINS(159);
428 DECLARE_MSM_GPIO_PINS(160);
429 DECLARE_MSM_GPIO_PINS(161);
430 DECLARE_MSM_GPIO_PINS(162);
431 DECLARE_MSM_GPIO_PINS(163);
432 DECLARE_MSM_GPIO_PINS(164);
433 DECLARE_MSM_GPIO_PINS(165);
434 DECLARE_MSM_GPIO_PINS(166);
435 DECLARE_MSM_GPIO_PINS(167);
436 DECLARE_MSM_GPIO_PINS(168);
437 DECLARE_MSM_GPIO_PINS(169);
438 DECLARE_MSM_GPIO_PINS(170);
439 DECLARE_MSM_GPIO_PINS(171);
440 DECLARE_MSM_GPIO_PINS(172);
441 DECLARE_MSM_GPIO_PINS(173);
442 DECLARE_MSM_GPIO_PINS(174);
443 DECLARE_MSM_GPIO_PINS(175);
444 DECLARE_MSM_GPIO_PINS(176);
445 DECLARE_MSM_GPIO_PINS(177);
446 DECLARE_MSM_GPIO_PINS(178);
447 DECLARE_MSM_GPIO_PINS(179);
448 DECLARE_MSM_GPIO_PINS(180);
449
450 static const unsigned int ufs_reset_pins[] = { 181 };
451
452 enum nord_functions {
453 msm_mux_gpio,
454 msm_mux_aoss_cti,
455 msm_mux_atest_char,
456 msm_mux_atest_usb20,
457 msm_mux_atest_usb21,
458 msm_mux_aud_intfc0_clk,
459 msm_mux_aud_intfc0_data,
460 msm_mux_aud_intfc0_ws,
461 msm_mux_aud_intfc10_clk,
462 msm_mux_aud_intfc10_data,
463 msm_mux_aud_intfc10_ws,
464 msm_mux_aud_intfc1_clk,
465 msm_mux_aud_intfc1_data,
466 msm_mux_aud_intfc1_ws,
467 msm_mux_aud_intfc2_clk,
468 msm_mux_aud_intfc2_data,
469 msm_mux_aud_intfc2_ws,
470 msm_mux_aud_intfc3_clk,
471 msm_mux_aud_intfc3_data,
472 msm_mux_aud_intfc3_ws,
473 msm_mux_aud_intfc4_clk,
474 msm_mux_aud_intfc4_data,
475 msm_mux_aud_intfc4_ws,
476 msm_mux_aud_intfc5_clk,
477 msm_mux_aud_intfc5_data,
478 msm_mux_aud_intfc5_ws,
479 msm_mux_aud_intfc6_clk,
480 msm_mux_aud_intfc6_data,
481 msm_mux_aud_intfc6_ws,
482 msm_mux_aud_intfc7_clk,
483 msm_mux_aud_intfc7_data,
484 msm_mux_aud_intfc7_ws,
485 msm_mux_aud_intfc8_clk,
486 msm_mux_aud_intfc8_data,
487 msm_mux_aud_intfc8_ws,
488 msm_mux_aud_intfc9_clk,
489 msm_mux_aud_intfc9_data,
490 msm_mux_aud_intfc9_ws,
491 msm_mux_aud_mclk0_mira,
492 msm_mux_aud_mclk0_mirb,
493 msm_mux_aud_mclk1_mira,
494 msm_mux_aud_mclk1_mirb,
495 msm_mux_aud_mclk2_mira,
496 msm_mux_aud_mclk2_mirb,
497 msm_mux_aud_refclk0,
498 msm_mux_aud_refclk1,
499 msm_mux_bist_done,
500 msm_mux_ccu_async_in,
501 msm_mux_ccu_i2c_scl,
502 msm_mux_ccu_i2c_sda,
503 msm_mux_ccu_timer,
504 msm_mux_clink_debug,
505 msm_mux_dbg_out,
506 msm_mux_dbg_out_clk,
507 msm_mux_ddr_bist_complete,
508 msm_mux_ddr_bist_fail,
509 msm_mux_ddr_bist_start,
510 msm_mux_ddr_bist_stop,
511 msm_mux_ddr_pxi,
512 msm_mux_dp_rx0,
513 msm_mux_dp_rx00,
514 msm_mux_dp_rx01,
515 msm_mux_dp_rx0_mute,
516 msm_mux_dp_rx1,
517 msm_mux_dp_rx10,
518 msm_mux_dp_rx11,
519 msm_mux_dp_rx1_mute,
520 msm_mux_edp0_hot,
521 msm_mux_edp0_lcd,
522 msm_mux_edp1_hot,
523 msm_mux_edp1_lcd,
524 msm_mux_edp2_hot,
525 msm_mux_edp2_lcd,
526 msm_mux_edp3_hot,
527 msm_mux_edp3_lcd,
528 msm_mux_emac0_mcg,
529 msm_mux_emac0_mdc,
530 msm_mux_emac0_mdio,
531 msm_mux_emac0_ptp,
532 msm_mux_emac1_mcg,
533 msm_mux_emac1_mdc,
534 msm_mux_emac1_mdio,
535 msm_mux_emac1_ptp,
536 msm_mux_gcc_gp1_clk,
537 msm_mux_gcc_gp2_clk,
538 msm_mux_gcc_gp3_clk,
539 msm_mux_gcc_gp4_clk,
540 msm_mux_gcc_gp5_clk,
541 msm_mux_gcc_gp6_clk,
542 msm_mux_gcc_gp7_clk,
543 msm_mux_gcc_gp8_clk,
544 msm_mux_jitter_bist,
545 msm_mux_lbist_pass,
546 msm_mux_mbist_pass,
547 msm_mux_mdp0_vsync_out,
548 msm_mux_mdp1_vsync_out,
549 msm_mux_mdp_vsync_e,
550 msm_mux_mdp_vsync_p,
551 msm_mux_mdp_vsync_s,
552 msm_mux_pcie0_clk_req_n,
553 msm_mux_pcie1_clk_req_n,
554 msm_mux_pcie2_clk_req_n,
555 msm_mux_pcie3_clk_req_n,
556 msm_mux_phase_flag,
557 msm_mux_pll_bist_sync,
558 msm_mux_pll_clk_aux,
559 msm_mux_prng_rosc0,
560 msm_mux_prng_rosc1,
561 msm_mux_pwrbrk_i_n,
562 msm_mux_qdss,
563 msm_mux_qdss_cti,
564 msm_mux_qspi,
565 msm_mux_qup0_se0,
566 msm_mux_qup0_se1,
567 msm_mux_qup0_se2,
568 msm_mux_qup0_se3,
569 msm_mux_qup0_se4,
570 msm_mux_qup0_se5,
571 msm_mux_qup1_se0,
572 msm_mux_qup1_se1,
573 msm_mux_qup1_se2_01,
574 msm_mux_qup1_se2_23,
575 msm_mux_qup1_se3_01,
576 msm_mux_qup1_se3_23,
577 msm_mux_qup1_se4,
578 msm_mux_qup1_se5,
579 msm_mux_qup1_se6,
580 msm_mux_qup2_se0,
581 msm_mux_qup2_se1,
582 msm_mux_qup2_se2,
583 msm_mux_qup2_se3,
584 msm_mux_qup2_se4,
585 msm_mux_qup2_se5,
586 msm_mux_qup2_se6,
587 msm_mux_qup3_se0_mira,
588 msm_mux_qup3_se0_mirb,
589 msm_mux_sailss_ospi,
590 msm_mux_sdc4_clk,
591 msm_mux_sdc4_cmd,
592 msm_mux_sdc4_data,
593 msm_mux_smb_alert,
594 msm_mux_smb_alert_n,
595 msm_mux_smb_clk,
596 msm_mux_smb_dat,
597 msm_mux_tb_trig_sdc4,
598 msm_mux_tmess_prng0,
599 msm_mux_tmess_prng1,
600 msm_mux_tsc_timer,
601 msm_mux_tsense_pwm,
602 msm_mux_usb0_hs,
603 msm_mux_usb0_phy_ps,
604 msm_mux_usb1_hs,
605 msm_mux_usb1_phy_ps,
606 msm_mux_usb2_hs,
607 msm_mux_usxgmii0_phy,
608 msm_mux_usxgmii1_phy,
609 msm_mux_vsense_trigger_mirnat,
610 msm_mux_wcn_sw,
611 msm_mux_wcn_sw_ctrl,
612 msm_mux__,
613 };
614
615 static const char *const gpio_groups[] = {
616 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
617 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11",
618 "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", "gpio17",
619 "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", "gpio23",
620 "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
621 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
622 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41",
623 "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47",
624 "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53",
625 "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", "gpio59",
626 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65",
627 "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", "gpio71",
628 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
629 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83",
630 "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89",
631 "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", "gpio95",
632 "gpio96", "gpio97", "gpio98", "gpio99", "gpio100", "gpio101",
633 "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107",
634 "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113",
635 "gpio114", "gpio115", "gpio116", "gpio117", "gpio118", "gpio119",
636 "gpio120", "gpio121", "gpio122", "gpio123", "gpio124", "gpio125",
637 "gpio126", "gpio127", "gpio128", "gpio129", "gpio130", "gpio131",
638 "gpio132", "gpio133", "gpio134", "gpio135", "gpio136", "gpio137",
639 "gpio138", "gpio139", "gpio140", "gpio141", "gpio142", "gpio143",
640 "gpio144", "gpio145", "gpio146", "gpio147", "gpio148", "gpio149",
641 "gpio150", "gpio151", "gpio152", "gpio153", "gpio154", "gpio155",
642 "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161",
643 "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167",
644 "gpio168", "gpio169", "gpio170", "gpio171", "gpio172", "gpio173",
645 "gpio174", "gpio175", "gpio176", "gpio177", "gpio178", "gpio179",
646 "gpio180",
647 };
648
649 static const char *const aoss_cti_groups[] = {
650 "gpio83",
651 "gpio84",
652 "gpio85",
653 "gpio86",
654 };
655
656 static const char *const atest_char_groups[] = {
657 "gpio176", "gpio177", "gpio178", "gpio179", "gpio180",
658 };
659
660 static const char *const atest_usb20_groups[] = {
661 "gpio126",
662 "gpio128",
663 "gpio130",
664 };
665
666 static const char *const atest_usb21_groups[] = {
667 "gpio127",
668 "gpio129",
669 "gpio131",
670 };
671
672 static const char *const aud_intfc0_clk_groups[] = {
673 "gpio57",
674 };
675
676 static const char *const aud_intfc0_data_groups[] = {
677 "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", "gpio66",
678 };
679
680 static const char *const aud_intfc0_ws_groups[] = {
681 "gpio58",
682 };
683
684 static const char *const aud_intfc10_clk_groups[] = {
685 "gpio61",
686 };
687
688 static const char *const aud_intfc10_data_groups[] = {
689 "gpio81", "gpio82",
690 };
691
692 static const char *const aud_intfc10_ws_groups[] = {
693 "gpio62",
694 };
695
696 static const char *const aud_intfc1_clk_groups[] = {
697 "gpio67",
698 };
699
700 static const char *const aud_intfc1_data_groups[] = {
701 "gpio69", "gpio70", "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76",
702 };
703
704 static const char *const aud_intfc1_ws_groups[] = {
705 "gpio68",
706 };
707
708 static const char *const aud_intfc2_clk_groups[] = {
709 "gpio77",
710 };
711
712 static const char *const aud_intfc2_data_groups[] = {
713 "gpio79", "gpio80", "gpio81", "gpio82",
714 };
715
716 static const char *const aud_intfc2_ws_groups[] = {
717 "gpio78",
718 };
719
720 static const char *const aud_intfc3_clk_groups[] = {
721 "gpio83",
722 };
723
724 static const char *const aud_intfc3_data_groups[] = {
725 "gpio85", "gpio86",
726 };
727
728 static const char *const aud_intfc3_ws_groups[] = {
729 "gpio84",
730 };
731
732 static const char *const aud_intfc4_clk_groups[] = {
733 "gpio87",
734 };
735
736 static const char *const aud_intfc4_data_groups[] = {
737 "gpio89", "gpio90",
738 };
739
740 static const char *const aud_intfc4_ws_groups[] = {
741 "gpio88",
742 };
743
744 static const char *const aud_intfc5_clk_groups[] = {
745 "gpio91",
746 };
747
748 static const char *const aud_intfc5_data_groups[] = {
749 "gpio93", "gpio94",
750 };
751
752 static const char *const aud_intfc5_ws_groups[] = {
753 "gpio92",
754 };
755
756 static const char *const aud_intfc6_clk_groups[] = {
757 "gpio95",
758 };
759
760 static const char *const aud_intfc6_data_groups[] = {
761 "gpio97", "gpio98",
762 };
763
764 static const char *const aud_intfc6_ws_groups[] = {
765 "gpio96",
766 };
767
768 static const char *const aud_intfc7_clk_groups[] = {
769 "gpio63",
770 };
771
772 static const char *const aud_intfc7_data_groups[] = {
773 "gpio65", "gpio66",
774 };
775
776 static const char *const aud_intfc7_ws_groups[] = {
777 "gpio64",
778 };
779
780 static const char *const aud_intfc8_clk_groups[] = {
781 "gpio73",
782 };
783
784 static const char *const aud_intfc8_data_groups[] = {
785 "gpio75", "gpio76",
786 };
787
788 static const char *const aud_intfc8_ws_groups[] = {
789 "gpio74",
790 };
791
792 static const char *const aud_intfc9_clk_groups[] = {
793 "gpio70",
794 };
795
796 static const char *const aud_intfc9_data_groups[] = {
797 "gpio72",
798 };
799
800 static const char *const aud_intfc9_ws_groups[] = {
801 "gpio71",
802 };
803
804 static const char *const aud_mclk0_mira_groups[] = {
805 "gpio99",
806 };
807
808 static const char *const aud_mclk0_mirb_groups[] = {
809 "gpio86",
810 };
811
812 static const char *const aud_mclk1_mira_groups[] = {
813 "gpio100",
814 };
815
816 static const char *const aud_mclk1_mirb_groups[] = {
817 "gpio90",
818 };
819
820 static const char *const aud_mclk2_mira_groups[] = {
821 "gpio101",
822 };
823
824 static const char *const aud_mclk2_mirb_groups[] = {
825 "gpio94",
826 };
827
828 static const char *const aud_refclk0_groups[] = {
829 "gpio100",
830 };
831
832 static const char *const aud_refclk1_groups[] = {
833 "gpio101",
834 };
835
836 static const char *const bist_done_groups[] = {
837 "gpio168",
838 };
839
840 static const char *const ccu_async_in_groups[] = {
841 "gpio45", "gpio176", "gpio177", "gpio178", "gpio179", "gpio180",
842 };
843
844 static const char *const ccu_i2c_scl_groups[] = {
845 "gpio16", "gpio18", "gpio20", "gpio22", "gpio24",
846 "gpio114", "gpio116", "gpio126", "gpio130", "gpio132",
847 };
848
849 static const char *const ccu_i2c_sda_groups[] = {
850 "gpio15", "gpio17", "gpio19", "gpio21", "gpio23",
851 "gpio113", "gpio115", "gpio125", "gpio129", "gpio131",
852 };
853
854 static const char *const ccu_timer_groups[] = {
855 "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30",
856 "gpio31", "gpio32", "gpio33", "gpio34", "gpio143", "gpio144",
857 "gpio150", "gpio151", "gpio152", "gpio153",
858 };
859
860 static const char *const clink_debug_groups[] = {
861 "gpio12", "gpio13", "gpio14", "gpio51",
862 "gpio52", "gpio53", "gpio54", "gpio55",
863 };
864
865 static const char *const dbg_out_groups[] = {
866 "gpio113",
867 };
868
869 static const char *const dbg_out_clk_groups[] = {
870 "gpio165",
871 };
872
873 static const char *const ddr_bist_complete_groups[] = {
874 "gpio37",
875 };
876
877 static const char *const ddr_bist_fail_groups[] = {
878 "gpio39",
879 };
880
881 static const char *const ddr_bist_start_groups[] = {
882 "gpio36",
883 };
884
885 static const char *const ddr_bist_stop_groups[] = {
886 "gpio38",
887 };
888
889 static const char *const ddr_pxi_groups[] = {
890 "gpio99", "gpio100", "gpio109", "gpio110", "gpio113", "gpio114",
891 "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", "gpio120",
892 "gpio121", "gpio122", "gpio126", "gpio127", "gpio128", "gpio129",
893 "gpio130", "gpio131", "gpio132", "gpio133", "gpio134", "gpio135",
894 "gpio136", "gpio137", "gpio138", "gpio139", "gpio162", "gpio163",
895 "gpio164", "gpio165",
896 };
897
898 static const char *const dp_rx0_groups[] = {
899 "gpio55", "gpio83", "gpio84", "gpio85", "gpio86",
900 "gpio88", "gpio89", "gpio137", "gpio138",
901 };
902
903 static const char *const dp_rx00_groups[] = {
904 "gpio99",
905 };
906
907 static const char *const dp_rx01_groups[] = {
908 "gpio100",
909 };
910
911 static const char *const dp_rx0_mute_groups[] = {
912 "gpio35",
913 };
914
915 static const char *const dp_rx1_groups[] = {
916 "gpio56", "gpio92", "gpio93", "gpio95", "gpio96",
917 "gpio97", "gpio98", "gpio158", "gpio159",
918 };
919
920 static const char *const dp_rx10_groups[] = {
921 "gpio121",
922 };
923
924 static const char *const dp_rx11_groups[] = {
925 "gpio122",
926 };
927
928 static const char *const dp_rx1_mute_groups[] = {
929 "gpio36",
930 };
931
932 static const char *const edp0_hot_groups[] = {
933 "gpio51",
934 };
935
936 static const char *const edp0_lcd_groups[] = {
937 "gpio47",
938 };
939
940 static const char *const edp1_hot_groups[] = {
941 "gpio52",
942 };
943
944 static const char *const edp1_lcd_groups[] = {
945 "gpio48",
946 };
947
948 static const char *const edp2_hot_groups[] = {
949 "gpio53",
950 };
951
952 static const char *const edp2_lcd_groups[] = {
953 "gpio49",
954 };
955
956 static const char *const edp3_hot_groups[] = {
957 "gpio54",
958 };
959
960 static const char *const edp3_lcd_groups[] = {
961 "gpio50",
962 };
963
964 static const char *const emac0_mcg_groups[] = {
965 "gpio16", "gpio17", "gpio18", "gpio19",
966 };
967
968 static const char *const emac0_mdc_groups[] = {
969 "gpio47",
970 };
971
972 static const char *const emac0_mdio_groups[] = {
973 "gpio48",
974 };
975
976 static const char *const emac0_ptp_groups[] = {
977 "gpio133", "gpio134", "gpio135", "gpio136",
978 "gpio139", "gpio140", "gpio141", "gpio142",
979 };
980
981 static const char *const emac1_mcg_groups[] = {
982 "gpio20", "gpio21", "gpio22", "gpio23",
983 };
984
985 static const char *const emac1_mdc_groups[] = {
986 "gpio49",
987 };
988
989 static const char *const emac1_mdio_groups[] = {
990 "gpio50",
991 };
992
993 static const char *const emac1_ptp_groups[] = {
994 "gpio37", "gpio38", "gpio39", "gpio40",
995 "gpio41", "gpio42", "gpio43", "gpio44",
996 };
997
998 static const char *const gcc_gp1_clk_groups[] = {
999 "gpio51",
1000 };
1001
1002 static const char *const gcc_gp2_clk_groups[] = {
1003 "gpio52",
1004 };
1005
1006 static const char *const gcc_gp3_clk_groups[] = {
1007 "gpio42",
1008 };
1009
1010 static const char *const gcc_gp4_clk_groups[] = {
1011 "gpio43",
1012 };
1013
1014 static const char *const gcc_gp5_clk_groups[] = {
1015 "gpio105",
1016 };
1017
1018 static const char *const gcc_gp6_clk_groups[] = {
1019 "gpio106",
1020 };
1021
1022 static const char *const gcc_gp7_clk_groups[] = {
1023 "gpio13",
1024 };
1025
1026 static const char *const gcc_gp8_clk_groups[] = {
1027 "gpio14",
1028 };
1029
1030 static const char *const jitter_bist_groups[] = {
1031 "gpio123",
1032 "gpio138",
1033 };
1034
1035 static const char *const lbist_pass_groups[] = {
1036 "gpio121",
1037 };
1038
1039 static const char *const mbist_pass_groups[] = {
1040 "gpio122",
1041 };
1042
1043 static const char *const mdp0_vsync_out_groups[] = {
1044 "gpio113", "gpio114", "gpio115", "gpio116", "gpio121", "gpio122",
1045 "gpio139", "gpio140", "gpio141", "gpio142", "gpio143",
1046 };
1047
1048 static const char *const mdp1_vsync_out_groups[] = {
1049 "gpio123", "gpio124", "gpio125", "gpio126", "gpio129", "gpio130",
1050 "gpio131", "gpio132", "gpio133", "gpio134", "gpio135",
1051 };
1052
1053 static const char *const mdp_vsync_e_groups[] = {
1054 "gpio109",
1055 };
1056
1057 static const char *const mdp_vsync_p_groups[] = {
1058 "gpio110",
1059 };
1060
1061 static const char *const mdp_vsync_s_groups[] = {
1062 "gpio144",
1063 };
1064
1065 static const char *const pcie0_clk_req_n_groups[] = {
1066 "gpio1",
1067 };
1068
1069 static const char *const pcie1_clk_req_n_groups[] = {
1070 "gpio4",
1071 };
1072
1073 static const char *const pcie2_clk_req_n_groups[] = {
1074 "gpio7",
1075 };
1076
1077 static const char *const pcie3_clk_req_n_groups[] = {
1078 "gpio10",
1079 };
1080
1081 static const char *const phase_flag_groups[] = {
1082 "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72", "gpio73", "gpio74",
1083 "gpio75", "gpio76", "gpio77", "gpio78", "gpio79", "gpio80", "gpio81", "gpio82",
1084 "gpio83", "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90",
1085 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio98", "gpio101",
1086 };
1087
1088 static const char *const pll_bist_sync_groups[] = {
1089 "gpio176",
1090 };
1091
1092 static const char *const pll_clk_aux_groups[] = {
1093 "gpio100",
1094 };
1095
1096 static const char *const prng_rosc0_groups[] = {
1097 "gpio117",
1098 };
1099
1100 static const char *const prng_rosc1_groups[] = {
1101 "gpio118",
1102 };
1103
1104 static const char *const pwrbrk_i_n_groups[] = {
1105 "gpio167",
1106 };
1107
1108 static const char *const qdss_cti_groups[] = {
1109 "gpio41", "gpio42", "gpio110", "gpio138",
1110 "gpio142", "gpio144", "gpio162", "gpio163",
1111 };
1112
1113 static const char *const qdss_groups[] = {
1114 "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72", "gpio73", "gpio74",
1115 "gpio75", "gpio76", "gpio77", "gpio78", "gpio79", "gpio80", "gpio81", "gpio82",
1116 "gpio83", "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90",
1117 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
1118 "gpio99", "gpio100", "gpio101", "gpio108",
1119 };
1120
1121 static const char *const qspi_groups[] = {
1122 "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", "gpio108",
1123 };
1124
1125 static const char *const qup0_se0_groups[] = {
1126 "gpio109", "gpio110", "gpio111", "gpio112",
1127 };
1128
1129 static const char *const qup0_se1_groups[] = {
1130 "gpio109", "gpio110", "gpio111", "gpio112",
1131 };
1132
1133 static const char *const qup0_se2_groups[] = {
1134 "gpio113", "gpio114", "gpio115", "gpio116",
1135 };
1136
1137 static const char *const qup0_se3_groups[] = {
1138 "gpio113", "gpio114", "gpio115", "gpio116",
1139 };
1140
1141 static const char *const qup0_se4_groups[] = {
1142 "gpio117", "gpio118", "gpio119", "gpio120",
1143 };
1144
1145 static const char *const qup0_se5_groups[] = {
1146 "gpio109", "gpio110", "gpio121", "gpio122",
1147 };
1148
1149 static const char *const qup1_se0_groups[] = {
1150 "gpio123", "gpio124", "gpio125", "gpio126",
1151 };
1152
1153 static const char *const qup1_se1_groups[] = {
1154 "gpio123", "gpio124", "gpio125", "gpio126",
1155 };
1156
1157 static const char *const qup1_se2_01_groups[] = {
1158 "gpio127", "gpio128",
1159 };
1160
1161 static const char *const qup1_se2_23_groups[] = {
1162 "gpio127", "gpio128",
1163 };
1164
1165 static const char *const qup1_se3_01_groups[] = {
1166 "gpio129", "gpio130",
1167 };
1168
1169 static const char *const qup1_se3_23_groups[] = {
1170 "gpio129", "gpio130",
1171 };
1172
1173 static const char *const qup1_se4_groups[] = {
1174 "gpio131", "gpio132", "gpio137", "gpio138",
1175 };
1176
1177 static const char *const qup1_se5_groups[] = {
1178 "gpio133", "gpio134", "gpio135", "gpio136",
1179 };
1180
1181 static const char *const qup1_se6_groups[] = {
1182 "gpio131", "gpio132", "gpio137", "gpio138",
1183 };
1184
1185 static const char *const qup2_se0_groups[] = {
1186 "gpio139", "gpio140", "gpio141", "gpio142",
1187 };
1188
1189 static const char *const qup2_se1_groups[] = {
1190 "gpio143", "gpio144", "gpio154", "gpio155",
1191 };
1192
1193 static const char *const qup2_se2_groups[] = {
1194 "gpio145", "gpio146", "gpio147", "gpio148", "gpio149",
1195 };
1196
1197 static const char *const qup2_se3_groups[] = {
1198 "gpio150", "gpio151", "gpio152", "gpio153",
1199 };
1200
1201 static const char *const qup2_se4_groups[] = {
1202 "gpio143", "gpio144", "gpio150", "gpio151",
1203 "gpio152", "gpio154", "gpio155",
1204 };
1205
1206 static const char *const qup2_se5_groups[] = {
1207 "gpio156", "gpio157", "gpio158", "gpio159",
1208 };
1209
1210 static const char *const qup2_se6_groups[] = {
1211 "gpio156", "gpio157", "gpio158", "gpio159",
1212 };
1213
1214 static const char *const qup3_se0_mira_groups[] = {
1215 "gpio102", "gpio103", "gpio104", "gpio105",
1216 "gpio106", "gpio107", "gpio108",
1217 };
1218
1219 static const char *const qup3_se0_mirb_groups[] = {
1220 "gpio102", "gpio103",
1221 };
1222
1223 static const char *const sailss_ospi_groups[] = {
1224 "gpio164",
1225 "gpio165",
1226 };
1227
1228 static const char *const sdc4_clk_groups[] = {
1229 "gpio175",
1230 };
1231
1232 static const char *const sdc4_cmd_groups[] = {
1233 "gpio174",
1234 };
1235
1236 static const char *const sdc4_data_groups[] = {
1237 "gpio170",
1238 "gpio171",
1239 "gpio172",
1240 "gpio173",
1241 };
1242
1243 static const char *const smb_alert_groups[] = {
1244 "gpio110",
1245 };
1246
1247 static const char *const smb_alert_n_groups[] = {
1248 "gpio109",
1249 };
1250
1251 static const char *const smb_clk_groups[] = {
1252 "gpio112",
1253 };
1254
1255 static const char *const smb_dat_groups[] = {
1256 "gpio111",
1257 };
1258
1259 static const char *const tb_trig_sdc4_groups[] = {
1260 "gpio169",
1261 };
1262
1263 static const char *const tmess_prng0_groups[] = {
1264 "gpio94",
1265 };
1266
1267 static const char *const tmess_prng1_groups[] = {
1268 "gpio95",
1269 };
1270
1271 static const char *const tsc_timer_groups[] = {
1272 "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
1273 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34",
1274 };
1275
1276 static const char *const tsense_pwm_groups[] = {
1277 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50",
1278 };
1279
1280 static const char *const usb0_hs_groups[] = {
1281 "gpio12",
1282 };
1283
1284 static const char *const usb0_phy_ps_groups[] = {
1285 "gpio164",
1286 };
1287
1288 static const char *const usb1_hs_groups[] = {
1289 "gpio13",
1290 };
1291
1292 static const char *const usb1_phy_ps_groups[] = {
1293 "gpio165",
1294 };
1295
1296 static const char *const usb2_hs_groups[] = {
1297 "gpio14",
1298 };
1299
1300 static const char *const usxgmii0_phy_groups[] = {
1301 "gpio45",
1302 };
1303
1304 static const char *const usxgmii1_phy_groups[] = {
1305 "gpio46",
1306 };
1307
1308 static const char *const vsense_trigger_mirnat_groups[] = {
1309 "gpio132",
1310 };
1311
1312 static const char *const wcn_sw_groups[] = {
1313 "gpio161",
1314 };
1315
1316 static const char *const wcn_sw_ctrl_groups[] = {
1317 "gpio160",
1318 };
1319
1320 static const struct pinfunction nord_functions[] = {
1321 MSM_GPIO_PIN_FUNCTION(gpio),
1322 MSM_PIN_FUNCTION(aoss_cti),
1323 MSM_PIN_FUNCTION(atest_char),
1324 MSM_PIN_FUNCTION(atest_usb20),
1325 MSM_PIN_FUNCTION(atest_usb21),
1326 MSM_PIN_FUNCTION(aud_intfc0_clk),
1327 MSM_PIN_FUNCTION(aud_intfc0_data),
1328 MSM_PIN_FUNCTION(aud_intfc0_ws),
1329 MSM_PIN_FUNCTION(aud_intfc10_clk),
1330 MSM_PIN_FUNCTION(aud_intfc10_data),
1331 MSM_PIN_FUNCTION(aud_intfc10_ws),
1332 MSM_PIN_FUNCTION(aud_intfc1_clk),
1333 MSM_PIN_FUNCTION(aud_intfc1_data),
1334 MSM_PIN_FUNCTION(aud_intfc1_ws),
1335 MSM_PIN_FUNCTION(aud_intfc2_clk),
1336 MSM_PIN_FUNCTION(aud_intfc2_data),
1337 MSM_PIN_FUNCTION(aud_intfc2_ws),
1338 MSM_PIN_FUNCTION(aud_intfc3_clk),
1339 MSM_PIN_FUNCTION(aud_intfc3_data),
1340 MSM_PIN_FUNCTION(aud_intfc3_ws),
1341 MSM_PIN_FUNCTION(aud_intfc4_clk),
1342 MSM_PIN_FUNCTION(aud_intfc4_data),
1343 MSM_PIN_FUNCTION(aud_intfc4_ws),
1344 MSM_PIN_FUNCTION(aud_intfc5_clk),
1345 MSM_PIN_FUNCTION(aud_intfc5_data),
1346 MSM_PIN_FUNCTION(aud_intfc5_ws),
1347 MSM_PIN_FUNCTION(aud_intfc6_clk),
1348 MSM_PIN_FUNCTION(aud_intfc6_data),
1349 MSM_PIN_FUNCTION(aud_intfc6_ws),
1350 MSM_PIN_FUNCTION(aud_intfc7_clk),
1351 MSM_PIN_FUNCTION(aud_intfc7_data),
1352 MSM_PIN_FUNCTION(aud_intfc7_ws),
1353 MSM_PIN_FUNCTION(aud_intfc8_clk),
1354 MSM_PIN_FUNCTION(aud_intfc8_data),
1355 MSM_PIN_FUNCTION(aud_intfc8_ws),
1356 MSM_PIN_FUNCTION(aud_intfc9_clk),
1357 MSM_PIN_FUNCTION(aud_intfc9_data),
1358 MSM_PIN_FUNCTION(aud_intfc9_ws),
1359 MSM_PIN_FUNCTION(aud_mclk0_mira),
1360 MSM_PIN_FUNCTION(aud_mclk0_mirb),
1361 MSM_PIN_FUNCTION(aud_mclk1_mira),
1362 MSM_PIN_FUNCTION(aud_mclk1_mirb),
1363 MSM_PIN_FUNCTION(aud_mclk2_mira),
1364 MSM_PIN_FUNCTION(aud_mclk2_mirb),
1365 MSM_PIN_FUNCTION(aud_refclk0),
1366 MSM_PIN_FUNCTION(aud_refclk1),
1367 MSM_PIN_FUNCTION(bist_done),
1368 MSM_PIN_FUNCTION(ccu_async_in),
1369 MSM_PIN_FUNCTION(ccu_i2c_scl),
1370 MSM_PIN_FUNCTION(ccu_i2c_sda),
1371 MSM_PIN_FUNCTION(ccu_timer),
1372 MSM_PIN_FUNCTION(clink_debug),
1373 MSM_PIN_FUNCTION(dbg_out),
1374 MSM_PIN_FUNCTION(dbg_out_clk),
1375 MSM_PIN_FUNCTION(ddr_bist_complete),
1376 MSM_PIN_FUNCTION(ddr_bist_fail),
1377 MSM_PIN_FUNCTION(ddr_bist_start),
1378 MSM_PIN_FUNCTION(ddr_bist_stop),
1379 MSM_PIN_FUNCTION(ddr_pxi),
1380 MSM_PIN_FUNCTION(dp_rx0),
1381 MSM_PIN_FUNCTION(dp_rx00),
1382 MSM_PIN_FUNCTION(dp_rx01),
1383 MSM_PIN_FUNCTION(dp_rx0_mute),
1384 MSM_PIN_FUNCTION(dp_rx1),
1385 MSM_PIN_FUNCTION(dp_rx10),
1386 MSM_PIN_FUNCTION(dp_rx11),
1387 MSM_PIN_FUNCTION(dp_rx1_mute),
1388 MSM_PIN_FUNCTION(edp0_hot),
1389 MSM_PIN_FUNCTION(edp0_lcd),
1390 MSM_PIN_FUNCTION(edp1_hot),
1391 MSM_PIN_FUNCTION(edp1_lcd),
1392 MSM_PIN_FUNCTION(edp2_hot),
1393 MSM_PIN_FUNCTION(edp2_lcd),
1394 MSM_PIN_FUNCTION(edp3_hot),
1395 MSM_PIN_FUNCTION(edp3_lcd),
1396 MSM_PIN_FUNCTION(emac0_mcg),
1397 MSM_PIN_FUNCTION(emac0_mdc),
1398 MSM_PIN_FUNCTION(emac0_mdio),
1399 MSM_PIN_FUNCTION(emac0_ptp),
1400 MSM_PIN_FUNCTION(emac1_mcg),
1401 MSM_PIN_FUNCTION(emac1_mdc),
1402 MSM_PIN_FUNCTION(emac1_mdio),
1403 MSM_PIN_FUNCTION(emac1_ptp),
1404 MSM_PIN_FUNCTION(gcc_gp1_clk),
1405 MSM_PIN_FUNCTION(gcc_gp2_clk),
1406 MSM_PIN_FUNCTION(gcc_gp3_clk),
1407 MSM_PIN_FUNCTION(gcc_gp4_clk),
1408 MSM_PIN_FUNCTION(gcc_gp5_clk),
1409 MSM_PIN_FUNCTION(gcc_gp6_clk),
1410 MSM_PIN_FUNCTION(gcc_gp7_clk),
1411 MSM_PIN_FUNCTION(gcc_gp8_clk),
1412 MSM_PIN_FUNCTION(jitter_bist),
1413 MSM_PIN_FUNCTION(lbist_pass),
1414 MSM_PIN_FUNCTION(mbist_pass),
1415 MSM_PIN_FUNCTION(mdp0_vsync_out),
1416 MSM_PIN_FUNCTION(mdp1_vsync_out),
1417 MSM_PIN_FUNCTION(mdp_vsync_e),
1418 MSM_PIN_FUNCTION(mdp_vsync_p),
1419 MSM_PIN_FUNCTION(mdp_vsync_s),
1420 MSM_PIN_FUNCTION(pcie0_clk_req_n),
1421 MSM_PIN_FUNCTION(pcie1_clk_req_n),
1422 MSM_PIN_FUNCTION(pcie2_clk_req_n),
1423 MSM_PIN_FUNCTION(pcie3_clk_req_n),
1424 MSM_PIN_FUNCTION(phase_flag),
1425 MSM_PIN_FUNCTION(pll_bist_sync),
1426 MSM_PIN_FUNCTION(pll_clk_aux),
1427 MSM_PIN_FUNCTION(prng_rosc0),
1428 MSM_PIN_FUNCTION(prng_rosc1),
1429 MSM_PIN_FUNCTION(pwrbrk_i_n),
1430 MSM_PIN_FUNCTION(qdss),
1431 MSM_PIN_FUNCTION(qdss_cti),
1432 MSM_PIN_FUNCTION(qspi),
1433 MSM_PIN_FUNCTION(qup0_se0),
1434 MSM_PIN_FUNCTION(qup0_se1),
1435 MSM_PIN_FUNCTION(qup0_se2),
1436 MSM_PIN_FUNCTION(qup0_se3),
1437 MSM_PIN_FUNCTION(qup0_se4),
1438 MSM_PIN_FUNCTION(qup0_se5),
1439 MSM_PIN_FUNCTION(qup1_se0),
1440 MSM_PIN_FUNCTION(qup1_se1),
1441 MSM_PIN_FUNCTION(qup1_se2_01),
1442 MSM_PIN_FUNCTION(qup1_se2_23),
1443 MSM_PIN_FUNCTION(qup1_se3_01),
1444 MSM_PIN_FUNCTION(qup1_se3_23),
1445 MSM_PIN_FUNCTION(qup1_se4),
1446 MSM_PIN_FUNCTION(qup1_se5),
1447 MSM_PIN_FUNCTION(qup1_se6),
1448 MSM_PIN_FUNCTION(qup2_se0),
1449 MSM_PIN_FUNCTION(qup2_se1),
1450 MSM_PIN_FUNCTION(qup2_se2),
1451 MSM_PIN_FUNCTION(qup2_se3),
1452 MSM_PIN_FUNCTION(qup2_se4),
1453 MSM_PIN_FUNCTION(qup2_se5),
1454 MSM_PIN_FUNCTION(qup2_se6),
1455 MSM_PIN_FUNCTION(qup3_se0_mira),
1456 MSM_PIN_FUNCTION(qup3_se0_mirb),
1457 MSM_PIN_FUNCTION(sailss_ospi),
1458 MSM_PIN_FUNCTION(sdc4_clk),
1459 MSM_PIN_FUNCTION(sdc4_cmd),
1460 MSM_PIN_FUNCTION(sdc4_data),
1461 MSM_PIN_FUNCTION(smb_alert),
1462 MSM_PIN_FUNCTION(smb_alert_n),
1463 MSM_PIN_FUNCTION(smb_clk),
1464 MSM_PIN_FUNCTION(smb_dat),
1465 MSM_PIN_FUNCTION(tb_trig_sdc4),
1466 MSM_PIN_FUNCTION(tmess_prng0),
1467 MSM_PIN_FUNCTION(tmess_prng1),
1468 MSM_PIN_FUNCTION(tsc_timer),
1469 MSM_PIN_FUNCTION(tsense_pwm),
1470 MSM_PIN_FUNCTION(usb0_hs),
1471 MSM_PIN_FUNCTION(usb0_phy_ps),
1472 MSM_PIN_FUNCTION(usb1_hs),
1473 MSM_PIN_FUNCTION(usb1_phy_ps),
1474 MSM_PIN_FUNCTION(usb2_hs),
1475 MSM_PIN_FUNCTION(usxgmii0_phy),
1476 MSM_PIN_FUNCTION(usxgmii1_phy),
1477 MSM_PIN_FUNCTION(vsense_trigger_mirnat),
1478 MSM_PIN_FUNCTION(wcn_sw),
1479 MSM_PIN_FUNCTION(wcn_sw_ctrl),
1480 };
1481
1482 /* Every pin is maintained as a single group, and missing or non-existing pin
1483 * would be maintained as dummy group to synchronize pin group index with
1484 * pin descriptor registered with pinctrl core.
1485 * Clients would not be able to request these dummy pin groups.
1486 */
1487 static const struct msm_pingroup nord_groups[] = {
1488 [0] = PINGROUP(0, _, _, _, _, _, _, _, _, _, _, _),
1489 [1] = PINGROUP(1, pcie0_clk_req_n, _, _, _, _, _, _, _, _, _, _),
1490 [2] = PINGROUP(2, _, _, _, _, _, _, _, _, _, _, _),
1491 [3] = PINGROUP(3, _, _, _, _, _, _, _, _, _, _, _),
1492 [4] = PINGROUP(4, pcie1_clk_req_n, _, _, _, _, _, _, _, _, _, _),
1493 [5] = PINGROUP(5, _, _, _, _, _, _, _, _, _, _, _),
1494 [6] = PINGROUP(6, _, _, _, _, _, _, _, _, _, _, _),
1495 [7] = PINGROUP(7, pcie2_clk_req_n, _, _, _, _, _, _, _, _, _, _),
1496 [8] = PINGROUP(8, _, _, _, _, _, _, _, _, _, _, _),
1497 [9] = PINGROUP(9, _, _, _, _, _, _, _, _, _, _, _),
1498 [10] = PINGROUP(10, pcie3_clk_req_n, _, _, _, _, _, _, _, _, _, _),
1499 [11] = PINGROUP(11, _, _, _, _, _, _, _, _, _, _, _),
1500 [12] = PINGROUP(12, usb0_hs, clink_debug, _, _, _, _, _, _, _, _, _),
1501 [13] = PINGROUP(13, usb1_hs, clink_debug, gcc_gp7_clk, _, _, _, _, _, _, _, _),
1502 [14] = PINGROUP(14, usb2_hs, clink_debug, gcc_gp8_clk, _, _, _, _, _, _, _, _),
1503 [15] = PINGROUP(15, ccu_i2c_sda, _, _, _, _, _, _, _, _, _, _),
1504 [16] = PINGROUP(16, ccu_i2c_scl, emac0_mcg, _, _, _, _, _, _, _, _, _),
1505 [17] = PINGROUP(17, ccu_i2c_sda, emac0_mcg, _, _, _, _, _, _, _, _, _),
1506 [18] = PINGROUP(18, ccu_i2c_scl, emac0_mcg, _, _, _, _, _, _, _, _, _),
1507 [19] = PINGROUP(19, ccu_i2c_sda, emac0_mcg, _, _, _, _, _, _, _, _, _),
1508 [20] = PINGROUP(20, ccu_i2c_scl, emac1_mcg, _, _, _, _, _, _, _, _, _),
1509 [21] = PINGROUP(21, ccu_i2c_sda, emac1_mcg, _, _, _, _, _, _, _, _, _),
1510 [22] = PINGROUP(22, ccu_i2c_scl, emac1_mcg, _, _, _, _, _, _, _, _, _),
1511 [23] = PINGROUP(23, ccu_i2c_sda, emac1_mcg, _, _, _, _, _, _, _, _, _),
1512 [24] = PINGROUP(24, ccu_i2c_scl, _, _, _, _, _, _, _, _, _, _),
1513 [25] = PINGROUP(25, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1514 [26] = PINGROUP(26, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1515 [27] = PINGROUP(27, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1516 [28] = PINGROUP(28, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1517 [29] = PINGROUP(29, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1518 [30] = PINGROUP(30, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1519 [31] = PINGROUP(31, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1520 [32] = PINGROUP(32, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1521 [33] = PINGROUP(33, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1522 [34] = PINGROUP(34, ccu_timer, tsc_timer, _, _, _, _, _, _, _, _, _),
1523 [35] = PINGROUP(35, dp_rx0_mute, _, _, _, _, _, _, _, _, _, _),
1524 [36] = PINGROUP(36, dp_rx1_mute, ddr_bist_start, _, _, _, _, _, _, _, _, _),
1525 [37] = PINGROUP(37, emac1_ptp, ddr_bist_complete, _, _, _, _, _, _, _, _, _),
1526 [38] = PINGROUP(38, emac1_ptp, ddr_bist_stop, _, _, _, _, _, _, _, _, _),
1527 [39] = PINGROUP(39, emac1_ptp, ddr_bist_fail, _, _, _, _, _, _, _, _, _),
1528 [40] = PINGROUP(40, emac1_ptp, _, _, _, _, _, _, _, _, _, _),
1529 [41] = PINGROUP(41, emac1_ptp, qdss_cti, _, _, _, _, _, _, _, _, _),
1530 [42] = PINGROUP(42, emac1_ptp, qdss_cti, gcc_gp3_clk, _, _, _, _, _, _, _, _),
1531 [43] = PINGROUP(43, emac1_ptp, gcc_gp4_clk, tsense_pwm, _, _, _, _, _, _, _, _),
1532 [44] = PINGROUP(44, emac1_ptp, tsense_pwm, _, _, _, _, _, _, _, _, _),
1533 [45] = PINGROUP(45, usxgmii0_phy, ccu_async_in, tsense_pwm, _, _, _, _, _, _, _, _),
1534 [46] = PINGROUP(46, usxgmii1_phy, tsense_pwm, _, _, _, _, _, _, _, _, _),
1535 [47] = PINGROUP(47, emac0_mdc, edp0_lcd, tsense_pwm, _, _, _, _, _, _, _, _),
1536 [48] = PINGROUP(48, emac0_mdio, edp1_lcd, tsense_pwm, _, _, _, _, _, _, _, _),
1537 [49] = PINGROUP(49, emac1_mdc, edp2_lcd, tsense_pwm, _, _, _, _, _, _, _, _),
1538 [50] = PINGROUP(50, emac1_mdio, edp3_lcd, tsense_pwm, _, _, _, _, _, _, _, _),
1539 [51] = PINGROUP(51, edp0_hot, clink_debug, gcc_gp1_clk, _, _, _, _, _, _, _, _),
1540 [52] = PINGROUP(52, edp1_hot, clink_debug, gcc_gp2_clk, _, _, _, _, _, _, _, _),
1541 [53] = PINGROUP(53, edp2_hot, clink_debug, _, _, _, _, _, _, _, _, _),
1542 [54] = PINGROUP(54, edp3_hot, clink_debug, _, _, _, _, _, _, _, _, _),
1543 [55] = PINGROUP(55, dp_rx0, clink_debug, _, _, _, _, _, _, _, _, _),
1544 [56] = PINGROUP(56, dp_rx1, _, _, _, _, _, _, _, _, _, _),
1545 [57] = PINGROUP(57, aud_intfc0_clk, _, _, _, _, _, _, _, _, _, _),
1546 [58] = PINGROUP(58, aud_intfc0_ws, _, _, _, _, _, _, _, _, _, _),
1547 [59] = PINGROUP(59, aud_intfc0_data, _, _, _, _, _, _, _, _, _, _),
1548 [60] = PINGROUP(60, aud_intfc0_data, _, _, _, _, _, _, _, _, _, _),
1549 [61] = PINGROUP(61, aud_intfc0_data, aud_intfc10_clk, _, _, _, _, _, _, _, _, _),
1550 [62] = PINGROUP(62, aud_intfc0_data, aud_intfc10_ws, _, _, _, _, _, _, _, _, _),
1551 [63] = PINGROUP(63, aud_intfc0_data, aud_intfc7_clk, _, _, _, _, _, _, _, _, _),
1552 [64] = PINGROUP(64, aud_intfc0_data, aud_intfc7_ws, _, _, _, _, _, _, _, _, _),
1553 [65] = PINGROUP(65, aud_intfc0_data, aud_intfc7_data, _, _, _, _, _, _, _, _, _),
1554 [66] = PINGROUP(66, aud_intfc0_data, aud_intfc7_data, _, _, _, _, _, _, _, _, _),
1555 [67] = PINGROUP(67, aud_intfc1_clk, phase_flag, _, qdss, _, _, _, _, _, _, _),
1556 [68] = PINGROUP(68, aud_intfc1_ws, phase_flag, _, qdss, _, _, _, _, _, _, _),
1557 [69] = PINGROUP(69, aud_intfc1_data, phase_flag, _, qdss, _, _, _, _, _, _, _),
1558 [70] = PINGROUP(70, aud_intfc1_data, aud_intfc9_clk, phase_flag,
1559 _, qdss, _, _, _, _, _, _),
1560 [71] = PINGROUP(71, aud_intfc1_data, aud_intfc9_ws, phase_flag,
1561 _, qdss, _, _, _, _, _, _),
1562 [72] = PINGROUP(72, aud_intfc1_data, aud_intfc9_data, phase_flag,
1563 _, qdss, _, _, _, _, _, _),
1564 [73] = PINGROUP(73, aud_intfc1_data, aud_intfc8_clk, phase_flag,
1565 _, qdss, _, _, _, _, _, _),
1566 [74] = PINGROUP(74, aud_intfc1_data, aud_intfc8_ws, phase_flag,
1567 _, qdss, _, _, _, _, _, _),
1568 [75] = PINGROUP(75, aud_intfc1_data, aud_intfc8_data, phase_flag,
1569 _, qdss, _, _, _, _, _, _),
1570 [76] = PINGROUP(76, aud_intfc1_data, aud_intfc8_data, phase_flag,
1571 _, qdss, _, _, _, _, _, _),
1572 [77] = PINGROUP(77, aud_intfc2_clk, phase_flag, _, qdss, _, _, _, _, _, _, _),
1573 [78] = PINGROUP(78, aud_intfc2_ws, phase_flag, _, qdss, _, _, _, _, _, _, _),
1574 [79] = PINGROUP(79, aud_intfc2_data, phase_flag, _, qdss, _, _, _, _, _, _, _),
1575 [80] = PINGROUP(80, aud_intfc2_data, phase_flag, _, _, qdss, _, _, _, _, _, _),
1576 [81] = PINGROUP(81, aud_intfc2_data, aud_intfc10_data, phase_flag,
1577 _, _, qdss, _, _, _, _, _),
1578 [82] = PINGROUP(82, aud_intfc2_data, aud_intfc10_data, phase_flag,
1579 _, qdss, _, _, _, _, _, _),
1580 [83] = PINGROUP(83, aud_intfc3_clk, dp_rx0, aoss_cti, phase_flag, _, qdss,
1581 _, _, _, _, _),
1582 [84] = PINGROUP(84, aud_intfc3_ws, dp_rx0, aoss_cti, phase_flag, _, qdss,
1583 _, _, _, _, _),
1584 [85] = PINGROUP(85, aud_intfc3_data, dp_rx0, aoss_cti, phase_flag,
1585 _, qdss, _, _, _, _, _),
1586 [86] = PINGROUP(86, aud_intfc3_data, aud_mclk0_mirb, dp_rx0, aoss_cti, phase_flag,
1587 _, qdss, _, _, _, _),
1588 [87] = PINGROUP(87, aud_intfc4_clk, phase_flag, _, qdss, _, _, _, _, _, _, _),
1589 [88] = PINGROUP(88, aud_intfc4_ws, dp_rx0, phase_flag, _, qdss, _, _, _, _, _, _),
1590 [89] = PINGROUP(89, aud_intfc4_data, dp_rx0, phase_flag, _, qdss,
1591 _, _, _, _, _, _),
1592 [90] = PINGROUP(90, aud_intfc4_data, aud_mclk1_mirb, phase_flag,
1593 _, qdss, _, _, _, _, _, _),
1594 [91] = PINGROUP(91, aud_intfc5_clk, phase_flag, _, qdss, _, _, _, _, _, _, _),
1595 [92] = PINGROUP(92, aud_intfc5_ws, dp_rx1, phase_flag, _, qdss, _, _, _, _, _, _),
1596 [93] = PINGROUP(93, aud_intfc5_data, dp_rx1, phase_flag, _, qdss,
1597 _, _, _, _, _, _),
1598 [94] = PINGROUP(94, aud_intfc5_data, aud_mclk2_mirb, phase_flag, tmess_prng0,
1599 _, qdss, _, _, _, _, _),
1600 [95] = PINGROUP(95, aud_intfc6_clk, dp_rx1, phase_flag, tmess_prng1,
1601 _, qdss, _, _, _, _, _),
1602 [96] = PINGROUP(96, aud_intfc6_ws, dp_rx1, phase_flag, _, qdss,
1603 _, _, _, _, _, _),
1604 [97] = PINGROUP(97, aud_intfc6_data, dp_rx1, qdss, _, _, _, _, _, _, _, _),
1605 [98] = PINGROUP(98, aud_intfc6_data, dp_rx1, phase_flag, _, qdss,
1606 _, _, _, _, _, _),
1607 [99] = PINGROUP(99, aud_mclk0_mira, qdss, dp_rx00, ddr_pxi, _, _, _, _, _, _, _),
1608 [100] = PINGROUP(100, aud_mclk1_mira, aud_refclk0, pll_clk_aux,
1609 qdss, dp_rx01, ddr_pxi, _, _, _, _, _),
1610 [101] = PINGROUP(101, aud_mclk2_mira, aud_refclk1, phase_flag, _, qdss,
1611 _, _, _, _, _, _),
1612 [102] = PINGROUP(102, qspi, qup3_se0_mira, qup3_se0_mirb, _, _, _, _, _, _, _, _),
1613 [103] = PINGROUP(103, qspi, qup3_se0_mira, qup3_se0_mirb, _, _, _, _, _, _, _, _),
1614 [104] = PINGROUP(104, qspi, qup3_se0_mira, _, _, _, _, _, _, _, _, _),
1615 [105] = PINGROUP(105, qspi, qup3_se0_mira, gcc_gp5_clk, _, _, _, _, _, _, _, _),
1616 [106] = PINGROUP(106, qspi, qup3_se0_mira, gcc_gp6_clk, _, _, _, _, _, _, _, _),
1617 [107] = PINGROUP(107, qspi, qup3_se0_mira, _, _, _, _, _, _, _, _, _),
1618 [108] = PINGROUP(108, qspi, qup3_se0_mira, qdss, _, _, _, _, _, _, _, _),
1619 [109] = PINGROUP(109, qup0_se0, qup0_se1, qup0_se5, mdp_vsync_e,
1620 smb_alert_n, _, ddr_pxi, _, _, _, _),
1621 [110] = PINGROUP(110, qup0_se0, qup0_se1, qup0_se5, qdss_cti,
1622 mdp_vsync_p, smb_alert, _, ddr_pxi, _, _, _),
1623 [111] = PINGROUP(111, qup0_se1, qup0_se0, smb_dat, _, _, _, _, _, _, _, _),
1624 [112] = PINGROUP(112, qup0_se1, qup0_se0, smb_clk, _, _, _, _, _, _, _, _),
1625 [113] = PINGROUP(113, qup0_se2, qup0_se3, ccu_i2c_sda, mdp0_vsync_out,
1626 dbg_out, ddr_pxi, _, _, _, _, _),
1627 [114] = PINGROUP(114, qup0_se2, qup0_se3, ccu_i2c_scl, mdp0_vsync_out,
1628 _, ddr_pxi, _, _, _, _, _),
1629 [115] = PINGROUP(115, qup0_se3, qup0_se2, ccu_i2c_sda, mdp0_vsync_out,
1630 _, ddr_pxi, _, _, _, _, _),
1631 [116] = PINGROUP(116, qup0_se3, qup0_se2, ccu_i2c_scl, mdp0_vsync_out,
1632 _, ddr_pxi, _, _, _, _, _),
1633 [117] = PINGROUP(117, qup0_se4, prng_rosc0, _, ddr_pxi, _, _, _, _, _, _, _),
1634 [118] = PINGROUP(118, qup0_se4, prng_rosc1, _, ddr_pxi, _, _, _, _, _, _, _),
1635 [119] = PINGROUP(119, qup0_se4, _, ddr_pxi, _, _, _, _, _, _, _, _),
1636 [120] = PINGROUP(120, qup0_se4, _, ddr_pxi, _, _, _, _, _, _, _, _),
1637 [121] = PINGROUP(121, qup0_se5, lbist_pass, mdp0_vsync_out, _, dp_rx10, ddr_pxi,
1638 _, _, _, _, _),
1639 [122] = PINGROUP(122, qup0_se5, mbist_pass, mdp0_vsync_out, _, dp_rx11, ddr_pxi,
1640 _, _, _, _, _),
1641 [123] = PINGROUP(123, qup1_se0, qup1_se1, mdp1_vsync_out, jitter_bist,
1642 _, _, _, _, _, _, _),
1643 [124] = PINGROUP(124, qup1_se0, qup1_se1, mdp1_vsync_out, _, _, _, _, _, _, _, _),
1644 [125] = PINGROUP(125, qup1_se1, qup1_se0, ccu_i2c_sda, mdp1_vsync_out,
1645 _, _, _, _, _, _, _),
1646 [126] = PINGROUP(126, qup1_se1, qup1_se0, ccu_i2c_scl, mdp1_vsync_out,
1647 _, atest_usb20, ddr_pxi, _, _, _, _),
1648 [127] = PINGROUP(127, qup1_se2_23, qup1_se2_01, _, atest_usb21, ddr_pxi,
1649 _, _, _, _, _, _),
1650 [128] = PINGROUP(128, qup1_se2_23, qup1_se2_01, _, atest_usb20, ddr_pxi,
1651 _, _, _, _, _, _),
1652 [129] = PINGROUP(129, qup1_se3_23, qup1_se3_01, ccu_i2c_sda, mdp1_vsync_out,
1653 _, atest_usb21, ddr_pxi, _, _, _, _),
1654 [130] = PINGROUP(130, qup1_se3_23, qup1_se3_01, ccu_i2c_scl, mdp1_vsync_out,
1655 _, atest_usb20, ddr_pxi, _, _, _, _),
1656 [131] = PINGROUP(131, qup1_se4, qup1_se6, ccu_i2c_sda, mdp1_vsync_out,
1657 _, atest_usb21, ddr_pxi, _, _, _, _),
1658 [132] = PINGROUP(132, qup1_se4, qup1_se6, ccu_i2c_scl, mdp1_vsync_out,
1659 _, vsense_trigger_mirnat, ddr_pxi, _, _, _, _),
1660 [133] = PINGROUP(133, qup1_se5, emac0_ptp, mdp1_vsync_out, _, ddr_pxi,
1661 _, _, _, _, _, _),
1662 [134] = PINGROUP(134, qup1_se5, emac0_ptp, mdp1_vsync_out, _, ddr_pxi,
1663 _, _, _, _, _, _),
1664 [135] = PINGROUP(135, qup1_se5, emac0_ptp, mdp1_vsync_out, _, ddr_pxi,
1665 _, _, _, _, _, _),
1666 [136] = PINGROUP(136, qup1_se5, emac0_ptp, _, ddr_pxi, _, _, _, _, _, _, _),
1667 [137] = PINGROUP(137, qup1_se6, qup1_se4, dp_rx0, _, ddr_pxi, _, _, _, _, _, _),
1668 [138] = PINGROUP(138, qup1_se6, qup1_se4, dp_rx0, qdss_cti, jitter_bist, ddr_pxi,
1669 _, _, _, _, _),
1670 [139] = PINGROUP(139, qup2_se0, emac0_ptp, mdp0_vsync_out, ddr_pxi,
1671 _, _, _, _, _, _, _),
1672 [140] = PINGROUP(140, qup2_se0, emac0_ptp, mdp0_vsync_out, _, _, _, _, _, _, _, _),
1673 [141] = PINGROUP(141, qup2_se0, emac0_ptp, mdp0_vsync_out, _, _, _, _, _, _, _, _),
1674 [142] = PINGROUP(142, qup2_se0, emac0_ptp, qdss_cti, mdp0_vsync_out, _, _, _, _, _, _, _),
1675 [143] = PINGROUP(143, qup2_se1, qup2_se4, ccu_timer, mdp0_vsync_out,
1676 _, _, _, _, _, _, _),
1677 [144] = PINGROUP(144, qup2_se1, qup2_se4, ccu_timer, qdss_cti, mdp_vsync_s,
1678 _, _, _, _, _, _),
1679 [145] = PINGROUP(145, qup2_se2, _, _, _, _, _, _, _, _, _, _),
1680 [146] = PINGROUP(146, qup2_se2, _, _, _, _, _, _, _, _, _, _),
1681 [147] = PINGROUP(147, qup2_se2, _, _, _, _, _, _, _, _, _, _),
1682 [148] = PINGROUP(148, qup2_se2, _, _, _, _, _, _, _, _, _, _),
1683 [149] = PINGROUP(149, qup2_se2, _, _, _, _, _, _, _, _, _, _),
1684 [150] = PINGROUP(150, qup2_se3, qup2_se4, ccu_timer, _, _, _, _, _, _, _, _),
1685 [151] = PINGROUP(151, qup2_se3, qup2_se4, ccu_timer, _, _, _, _, _, _, _, _),
1686 [152] = PINGROUP(152, qup2_se3, qup2_se4, ccu_timer, _, _, _, _, _, _, _, _),
1687 [153] = PINGROUP(153, qup2_se3, ccu_timer, _, _, _, _, _, _, _, _, _),
1688 [154] = PINGROUP(154, qup2_se4, qup2_se1, _, _, _, _, _, _, _, _, _),
1689 [155] = PINGROUP(155, qup2_se4, qup2_se1, _, _, _, _, _, _, _, _, _),
1690 [156] = PINGROUP(156, qup2_se5, qup2_se6, _, _, _, _, _, _, _, _, _),
1691 [157] = PINGROUP(157, qup2_se5, qup2_se6, _, _, _, _, _, _, _, _, _),
1692 [158] = PINGROUP(158, qup2_se6, qup2_se5, dp_rx1, _, _, _, _, _, _, _, _),
1693 [159] = PINGROUP(159, qup2_se6, qup2_se5, dp_rx1, _, _, _, _, _, _, _, _),
1694 [160] = PINGROUP(160, wcn_sw_ctrl, _, _, _, _, _, _, _, _, _, _),
1695 [161] = PINGROUP(161, wcn_sw, _, _, _, _, _, _, _, _, _, _),
1696 [162] = PINGROUP(162, qdss_cti, _, ddr_pxi, _, _, _, _, _, _, _, _),
1697 [163] = PINGROUP(163, qdss_cti, _, ddr_pxi, _, _, _, _, _, _, _, _),
1698 [164] = PINGROUP(164, usb0_phy_ps, _, sailss_ospi, ddr_pxi, _, _, _, _, _, _, _),
1699 [165] = PINGROUP(165, usb1_phy_ps, dbg_out_clk, sailss_ospi, ddr_pxi,
1700 _, _, _, _, _, _, _),
1701 [166] = PINGROUP(166, _, _, _, _, _, _, _, _, _, _, _),
1702 [167] = PINGROUP(167, pwrbrk_i_n, _, _, _, _, _, _, _, _, _, _),
1703 [168] = PINGROUP(168, bist_done, _, _, _, _, _, _, _, _, _, _),
1704 [169] = PINGROUP(169, tb_trig_sdc4, _, _, _, _, _, _, _, _, _, _),
1705 [170] = PINGROUP(170, sdc4_data, _, _, _, _, _, _, _, _, _, _),
1706 [171] = PINGROUP(171, sdc4_data, _, _, _, _, _, _, _, _, _, _),
1707 [172] = PINGROUP(172, sdc4_data, _, _, _, _, _, _, _, _, _, _),
1708 [173] = PINGROUP(173, sdc4_data, _, _, _, _, _, _, _, _, _, _),
1709 [174] = PINGROUP(174, sdc4_cmd, _, _, _, _, _, _, _, _, _, _),
1710 [175] = PINGROUP(175, sdc4_clk, _, _, _, _, _, _, _, _, _, _),
1711 [176] = PINGROUP(176, ccu_async_in, pll_bist_sync, atest_char,
1712 _, _, _, _, _, _, _, _),
1713 [177] = PINGROUP(177, ccu_async_in, atest_char, _, _, _, _, _, _, _, _, _),
1714 [178] = PINGROUP(178, ccu_async_in, atest_char, _, _, _, _, _, _, _, _, _),
1715 [179] = PINGROUP(179, ccu_async_in, atest_char, _, _, _, _, _, _, _, _, _),
1716 [180] = PINGROUP(180, ccu_async_in, atest_char, _, _, _, _, _, _, _, _, _),
1717 [181] = UFS_RESET(ufs_reset, 0xbd004, 0xbe000),
1718 };
1719
1720 static const struct msm_gpio_wakeirq_map nord_pdc_map[] = {
1721 { 0, 67 }, { 1, 68 }, { 2, 82 }, { 3, 69 }, { 4, 70 },
1722 { 5, 83 }, { 6, 71 }, { 7, 72 }, { 8, 84 }, { 9, 73 },
1723 { 10, 119 }, { 11, 85 }, { 45, 107 }, { 46, 98 }, { 102, 77 },
1724 { 108, 78 }, { 110, 120 }, { 114, 80 }, { 116, 81 }, { 120, 117 },
1725 { 124, 108 }, { 126, 99 }, { 128, 100 }, { 132, 101 }, { 138, 87 },
1726 { 142, 88 }, { 144, 89 }, { 153, 90 }, { 157, 91 }, { 159, 118 },
1727 { 160, 110 }, { 161, 79 }, { 166, 109 }, { 168, 111 },
1728 };
1729
1730 static const struct msm_pinctrl_soc_data nord_tlmm = {
1731 .pins = nord_pins,
1732 .npins = ARRAY_SIZE(nord_pins),
1733 .functions = nord_functions,
1734 .nfunctions = ARRAY_SIZE(nord_functions),
1735 .groups = nord_groups,
1736 .ngroups = ARRAY_SIZE(nord_groups),
1737 .ngpios = 182,
1738 .wakeirq_map = nord_pdc_map,
1739 .nwakeirq_map = ARRAY_SIZE(nord_pdc_map),
1740 .egpio_func = 11,
1741 };
1742
1743 static const struct of_device_id nord_tlmm_of_match[] = {
1744 { .compatible = "qcom,nord-tlmm", .data = &nord_tlmm },
1745 {},
1746 };
1747
nord_tlmm_probe(struct platform_device * pdev)1748 static int nord_tlmm_probe(struct platform_device *pdev)
1749 {
1750 const struct msm_pinctrl_soc_data *pinctrl_data;
1751 struct device *dev = &pdev->dev;
1752
1753 pinctrl_data = device_get_match_data(dev);
1754 if (!pinctrl_data)
1755 return -EINVAL;
1756
1757 return msm_pinctrl_probe(pdev, &nord_tlmm);
1758 }
1759
1760 static struct platform_driver nord_tlmm_driver = {
1761 .driver = {
1762 .name = "nord-tlmm",
1763 .of_match_table = nord_tlmm_of_match,
1764 },
1765 .probe = nord_tlmm_probe,
1766 };
1767
nord_tlmm_init(void)1768 static int __init nord_tlmm_init(void)
1769 {
1770 return platform_driver_register(&nord_tlmm_driver);
1771 }
1772 arch_initcall(nord_tlmm_init);
1773
nord_tlmm_exit(void)1774 static void __exit nord_tlmm_exit(void)
1775 {
1776 platform_driver_unregister(&nord_tlmm_driver);
1777 }
1778 module_exit(nord_tlmm_exit);
1779
1780 MODULE_DESCRIPTION("QTI Nord TLMM driver");
1781 MODULE_LICENSE("GPL");
1782 MODULE_DEVICE_TABLE(of, nord_tlmm_of_match);
1783