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Searched refs:up_hyst_offset (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c2564 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in fiji_update_dpm_settings() local
2591 up_hyst_offset = array + (sizeof(SMU73_Discrete_GraphicsLevel) * i) in fiji_update_dpm_settings()
2595 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2597 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
2626 up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2630 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2632 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
H A Dpolaris10_smumgr.c2602 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in polaris10_update_dpm_settings() local
2629 up_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i) in polaris10_update_dpm_settings()
2633 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2635 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
2664 up_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2668 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2670 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
H A Dtonga_smumgr.c3163 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in tonga_update_dpm_settings() local
3190 up_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i) in tonga_update_dpm_settings()
3194 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3196 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
3225 up_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
3229 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3231 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
H A Dci_smumgr.c2785 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in ci_update_dpm_settings() local
2812 up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
2816 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2818 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
2847 up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
2851 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2853 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()