1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Admin Function driver
3 *
4 * Copyright (C) 2019 Marvell.
5 *
6 */
7
8 #ifdef CONFIG_DEBUG_FS
9
10 #include <linux/fs.h>
11 #include <linux/debugfs.h>
12 #include <linux/module.h>
13 #include <linux/pci.h>
14
15 #include "rvu_struct.h"
16 #include "rvu_reg.h"
17 #include "rvu.h"
18 #include "cgx.h"
19 #include "lmac_common.h"
20 #include "npc.h"
21 #include "rvu_npc_hash.h"
22 #include "mcs.h"
23
24 #include "cn20k/reg.h"
25 #include "cn20k/debugfs.h"
26 #include "cn20k/npc.h"
27
28 #define DEBUGFS_DIR_NAME "octeontx2"
29
30 enum {
31 CGX_STAT0,
32 CGX_STAT1,
33 CGX_STAT2,
34 CGX_STAT3,
35 CGX_STAT4,
36 CGX_STAT5,
37 CGX_STAT6,
38 CGX_STAT7,
39 CGX_STAT8,
40 CGX_STAT9,
41 CGX_STAT10,
42 CGX_STAT11,
43 CGX_STAT12,
44 CGX_STAT13,
45 CGX_STAT14,
46 CGX_STAT15,
47 CGX_STAT16,
48 CGX_STAT17,
49 CGX_STAT18,
50 };
51
52 static char *cgx_rx_stats_fields[] = {
53 [CGX_STAT0] = "Received packets",
54 [CGX_STAT1] = "Octets of received packets",
55 [CGX_STAT2] = "Received PAUSE packets",
56 [CGX_STAT3] = "Received PAUSE and control packets",
57 [CGX_STAT4] = "Filtered DMAC0 (NIX-bound) packets",
58 [CGX_STAT5] = "Filtered DMAC0 (NIX-bound) octets",
59 [CGX_STAT6] = "Packets dropped due to RX FIFO full",
60 [CGX_STAT7] = "Octets dropped due to RX FIFO full",
61 [CGX_STAT8] = "Error packets",
62 [CGX_STAT9] = "Filtered DMAC1 (NCSI-bound) packets",
63 [CGX_STAT10] = "Filtered DMAC1 (NCSI-bound) octets",
64 [CGX_STAT11] = "NCSI-bound packets dropped",
65 [CGX_STAT12] = "NCSI-bound octets dropped",
66 };
67
68 static char *cgx_tx_stats_fields[] = {
69 [CGX_STAT0] = "Packets dropped due to excessive collisions",
70 [CGX_STAT1] = "Packets dropped due to excessive deferral",
71 [CGX_STAT2] = "Multiple collisions before successful transmission",
72 [CGX_STAT3] = "Single collisions before successful transmission",
73 [CGX_STAT4] = "Total octets sent on the interface",
74 [CGX_STAT5] = "Total frames sent on the interface",
75 [CGX_STAT6] = "Packets sent with an octet count < 64",
76 [CGX_STAT7] = "Packets sent with an octet count == 64",
77 [CGX_STAT8] = "Packets sent with an octet count of 65-127",
78 [CGX_STAT9] = "Packets sent with an octet count of 128-255",
79 [CGX_STAT10] = "Packets sent with an octet count of 256-511",
80 [CGX_STAT11] = "Packets sent with an octet count of 512-1023",
81 [CGX_STAT12] = "Packets sent with an octet count of 1024-1518",
82 [CGX_STAT13] = "Packets sent with an octet count of > 1518",
83 [CGX_STAT14] = "Packets sent to a broadcast DMAC",
84 [CGX_STAT15] = "Packets sent to the multicast DMAC",
85 [CGX_STAT16] = "Transmit underflow and were truncated",
86 [CGX_STAT17] = "Control/PAUSE packets sent",
87 };
88
89 static char *rpm_rx_stats_fields[] = {
90 "Octets of received packets",
91 "Octets of received packets with out error",
92 "Received packets with alignment errors",
93 "Control/PAUSE packets received",
94 "Packets received with Frame too long Errors",
95 "Packets received with a1nrange length Errors",
96 "Received packets",
97 "Packets received with FrameCheckSequenceErrors",
98 "Packets received with VLAN header",
99 "Error packets",
100 "Packets received with unicast DMAC",
101 "Packets received with multicast DMAC",
102 "Packets received with broadcast DMAC",
103 "Dropped packets",
104 "Total frames received on interface",
105 "Packets received with an octet count < 64",
106 "Packets received with an octet count == 64",
107 "Packets received with an octet count of 65-127",
108 "Packets received with an octet count of 128-255",
109 "Packets received with an octet count of 256-511",
110 "Packets received with an octet count of 512-1023",
111 "Packets received with an octet count of 1024-1518",
112 "Packets received with an octet count of > 1518",
113 "Oversized Packets",
114 "Jabber Packets",
115 "Fragmented Packets",
116 "CBFC(class based flow control) pause frames received for class 0",
117 "CBFC pause frames received for class 1",
118 "CBFC pause frames received for class 2",
119 "CBFC pause frames received for class 3",
120 "CBFC pause frames received for class 4",
121 "CBFC pause frames received for class 5",
122 "CBFC pause frames received for class 6",
123 "CBFC pause frames received for class 7",
124 "CBFC pause frames received for class 8",
125 "CBFC pause frames received for class 9",
126 "CBFC pause frames received for class 10",
127 "CBFC pause frames received for class 11",
128 "CBFC pause frames received for class 12",
129 "CBFC pause frames received for class 13",
130 "CBFC pause frames received for class 14",
131 "CBFC pause frames received for class 15",
132 "MAC control packets received",
133 };
134
135 static char *rpm_tx_stats_fields[] = {
136 "Total octets sent on the interface",
137 "Total octets transmitted OK",
138 "Control/Pause frames sent",
139 "Total frames transmitted OK",
140 "Total frames sent with VLAN header",
141 "Error Packets",
142 "Packets sent to unicast DMAC",
143 "Packets sent to the multicast DMAC",
144 "Packets sent to a broadcast DMAC",
145 "Packets sent with an octet count == 64",
146 "Packets sent with an octet count of 65-127",
147 "Packets sent with an octet count of 128-255",
148 "Packets sent with an octet count of 256-511",
149 "Packets sent with an octet count of 512-1023",
150 "Packets sent with an octet count of 1024-1518",
151 "Packets sent with an octet count of > 1518",
152 "CBFC(class based flow control) pause frames transmitted for class 0",
153 "CBFC pause frames transmitted for class 1",
154 "CBFC pause frames transmitted for class 2",
155 "CBFC pause frames transmitted for class 3",
156 "CBFC pause frames transmitted for class 4",
157 "CBFC pause frames transmitted for class 5",
158 "CBFC pause frames transmitted for class 6",
159 "CBFC pause frames transmitted for class 7",
160 "CBFC pause frames transmitted for class 8",
161 "CBFC pause frames transmitted for class 9",
162 "CBFC pause frames transmitted for class 10",
163 "CBFC pause frames transmitted for class 11",
164 "CBFC pause frames transmitted for class 12",
165 "CBFC pause frames transmitted for class 13",
166 "CBFC pause frames transmitted for class 14",
167 "CBFC pause frames transmitted for class 15",
168 "MAC control packets sent",
169 "Total frames sent on the interface"
170 };
171
172 enum cpt_eng_type {
173 CPT_AE_TYPE = 1,
174 CPT_SE_TYPE = 2,
175 CPT_IE_TYPE = 3,
176 };
177
178 #define rvu_dbg_NULL NULL
179 #define rvu_dbg_open_NULL NULL
180
181 #define RVU_DEBUG_SEQ_FOPS(name, read_op, write_op) \
182 static int rvu_dbg_open_##name(struct inode *inode, struct file *file) \
183 { \
184 return single_open(file, rvu_dbg_##read_op, inode->i_private); \
185 } \
186 static const struct file_operations rvu_dbg_##name##_fops = { \
187 .owner = THIS_MODULE, \
188 .open = rvu_dbg_open_##name, \
189 .read = seq_read, \
190 .write = rvu_dbg_##write_op, \
191 .llseek = seq_lseek, \
192 .release = single_release, \
193 }
194
195 #define RVU_DEBUG_FOPS(name, read_op, write_op) \
196 static const struct file_operations rvu_dbg_##name##_fops = { \
197 .owner = THIS_MODULE, \
198 .open = simple_open, \
199 .read = rvu_dbg_##read_op, \
200 .write = rvu_dbg_##write_op \
201 }
202
203 static void print_nix_qsize(struct seq_file *filp, struct rvu_pfvf *pfvf);
204
rvu_dbg_mcs_port_stats_display(struct seq_file * filp,void * unused,int dir)205 static int rvu_dbg_mcs_port_stats_display(struct seq_file *filp, void *unused, int dir)
206 {
207 struct mcs *mcs = filp->private;
208 struct mcs_port_stats stats;
209 int lmac;
210
211 seq_puts(filp, "\n port stats\n");
212 mutex_lock(&mcs->stats_lock);
213 for_each_set_bit(lmac, &mcs->hw->lmac_bmap, mcs->hw->lmac_cnt) {
214 mcs_get_port_stats(mcs, &stats, lmac, dir);
215 seq_printf(filp, "port%d: Tcam Miss: %lld\n", lmac, stats.tcam_miss_cnt);
216 seq_printf(filp, "port%d: Parser errors: %lld\n", lmac, stats.parser_err_cnt);
217
218 if (dir == MCS_RX && mcs->hw->mcs_blks > 1)
219 seq_printf(filp, "port%d: Preempt error: %lld\n", lmac,
220 stats.preempt_err_cnt);
221 if (dir == MCS_TX)
222 seq_printf(filp, "port%d: Sectag insert error: %lld\n", lmac,
223 stats.sectag_insert_err_cnt);
224 }
225 mutex_unlock(&mcs->stats_lock);
226 return 0;
227 }
228
rvu_dbg_mcs_rx_port_stats_display(struct seq_file * filp,void * unused)229 static int rvu_dbg_mcs_rx_port_stats_display(struct seq_file *filp, void *unused)
230 {
231 return rvu_dbg_mcs_port_stats_display(filp, unused, MCS_RX);
232 }
233
234 RVU_DEBUG_SEQ_FOPS(mcs_rx_port_stats, mcs_rx_port_stats_display, NULL);
235
rvu_dbg_mcs_tx_port_stats_display(struct seq_file * filp,void * unused)236 static int rvu_dbg_mcs_tx_port_stats_display(struct seq_file *filp, void *unused)
237 {
238 return rvu_dbg_mcs_port_stats_display(filp, unused, MCS_TX);
239 }
240
241 RVU_DEBUG_SEQ_FOPS(mcs_tx_port_stats, mcs_tx_port_stats_display, NULL);
242
rvu_dbg_mcs_sa_stats_display(struct seq_file * filp,void * unused,int dir)243 static int rvu_dbg_mcs_sa_stats_display(struct seq_file *filp, void *unused, int dir)
244 {
245 struct mcs *mcs = filp->private;
246 struct mcs_sa_stats stats;
247 struct rsrc_bmap *map;
248 int sa_id;
249
250 if (dir == MCS_TX) {
251 map = &mcs->tx.sa;
252 mutex_lock(&mcs->stats_lock);
253 for_each_set_bit(sa_id, map->bmap, mcs->hw->sa_entries) {
254 seq_puts(filp, "\n TX SA stats\n");
255 mcs_get_sa_stats(mcs, &stats, sa_id, MCS_TX);
256 seq_printf(filp, "sa%d: Pkts encrypted: %lld\n", sa_id,
257 stats.pkt_encrypt_cnt);
258
259 seq_printf(filp, "sa%d: Pkts protected: %lld\n", sa_id,
260 stats.pkt_protected_cnt);
261 }
262 mutex_unlock(&mcs->stats_lock);
263 return 0;
264 }
265
266 /* RX stats */
267 map = &mcs->rx.sa;
268 mutex_lock(&mcs->stats_lock);
269 for_each_set_bit(sa_id, map->bmap, mcs->hw->sa_entries) {
270 seq_puts(filp, "\n RX SA stats\n");
271 mcs_get_sa_stats(mcs, &stats, sa_id, MCS_RX);
272 seq_printf(filp, "sa%d: Invalid pkts: %lld\n", sa_id, stats.pkt_invalid_cnt);
273 seq_printf(filp, "sa%d: Pkts no sa error: %lld\n", sa_id, stats.pkt_nosaerror_cnt);
274 seq_printf(filp, "sa%d: Pkts not valid: %lld\n", sa_id, stats.pkt_notvalid_cnt);
275 seq_printf(filp, "sa%d: Pkts ok: %lld\n", sa_id, stats.pkt_ok_cnt);
276 seq_printf(filp, "sa%d: Pkts no sa: %lld\n", sa_id, stats.pkt_nosa_cnt);
277 }
278 mutex_unlock(&mcs->stats_lock);
279 return 0;
280 }
281
rvu_dbg_mcs_rx_sa_stats_display(struct seq_file * filp,void * unused)282 static int rvu_dbg_mcs_rx_sa_stats_display(struct seq_file *filp, void *unused)
283 {
284 return rvu_dbg_mcs_sa_stats_display(filp, unused, MCS_RX);
285 }
286
287 RVU_DEBUG_SEQ_FOPS(mcs_rx_sa_stats, mcs_rx_sa_stats_display, NULL);
288
rvu_dbg_mcs_tx_sa_stats_display(struct seq_file * filp,void * unused)289 static int rvu_dbg_mcs_tx_sa_stats_display(struct seq_file *filp, void *unused)
290 {
291 return rvu_dbg_mcs_sa_stats_display(filp, unused, MCS_TX);
292 }
293
294 RVU_DEBUG_SEQ_FOPS(mcs_tx_sa_stats, mcs_tx_sa_stats_display, NULL);
295
rvu_dbg_mcs_tx_sc_stats_display(struct seq_file * filp,void * unused)296 static int rvu_dbg_mcs_tx_sc_stats_display(struct seq_file *filp, void *unused)
297 {
298 struct mcs *mcs = filp->private;
299 struct mcs_sc_stats stats;
300 struct rsrc_bmap *map;
301 int sc_id;
302
303 map = &mcs->tx.sc;
304 seq_puts(filp, "\n SC stats\n");
305
306 mutex_lock(&mcs->stats_lock);
307 for_each_set_bit(sc_id, map->bmap, mcs->hw->sc_entries) {
308 mcs_get_sc_stats(mcs, &stats, sc_id, MCS_TX);
309 seq_printf(filp, "\n=======sc%d======\n\n", sc_id);
310 seq_printf(filp, "sc%d: Pkts encrypted: %lld\n", sc_id, stats.pkt_encrypt_cnt);
311 seq_printf(filp, "sc%d: Pkts protected: %lld\n", sc_id, stats.pkt_protected_cnt);
312
313 if (mcs->hw->mcs_blks == 1) {
314 seq_printf(filp, "sc%d: Octets encrypted: %lld\n", sc_id,
315 stats.octet_encrypt_cnt);
316 seq_printf(filp, "sc%d: Octets protected: %lld\n", sc_id,
317 stats.octet_protected_cnt);
318 }
319 }
320 mutex_unlock(&mcs->stats_lock);
321 return 0;
322 }
323
324 RVU_DEBUG_SEQ_FOPS(mcs_tx_sc_stats, mcs_tx_sc_stats_display, NULL);
325
rvu_dbg_mcs_rx_sc_stats_display(struct seq_file * filp,void * unused)326 static int rvu_dbg_mcs_rx_sc_stats_display(struct seq_file *filp, void *unused)
327 {
328 struct mcs *mcs = filp->private;
329 struct mcs_sc_stats stats;
330 struct rsrc_bmap *map;
331 int sc_id;
332
333 map = &mcs->rx.sc;
334 seq_puts(filp, "\n SC stats\n");
335
336 mutex_lock(&mcs->stats_lock);
337 for_each_set_bit(sc_id, map->bmap, mcs->hw->sc_entries) {
338 mcs_get_sc_stats(mcs, &stats, sc_id, MCS_RX);
339 seq_printf(filp, "\n=======sc%d======\n\n", sc_id);
340 seq_printf(filp, "sc%d: Cam hits: %lld\n", sc_id, stats.hit_cnt);
341 seq_printf(filp, "sc%d: Invalid pkts: %lld\n", sc_id, stats.pkt_invalid_cnt);
342 seq_printf(filp, "sc%d: Late pkts: %lld\n", sc_id, stats.pkt_late_cnt);
343 seq_printf(filp, "sc%d: Notvalid pkts: %lld\n", sc_id, stats.pkt_notvalid_cnt);
344 seq_printf(filp, "sc%d: Unchecked pkts: %lld\n", sc_id, stats.pkt_unchecked_cnt);
345
346 if (mcs->hw->mcs_blks > 1) {
347 seq_printf(filp, "sc%d: Delay pkts: %lld\n", sc_id, stats.pkt_delay_cnt);
348 seq_printf(filp, "sc%d: Pkts ok: %lld\n", sc_id, stats.pkt_ok_cnt);
349 }
350 if (mcs->hw->mcs_blks == 1) {
351 seq_printf(filp, "sc%d: Octets decrypted: %lld\n", sc_id,
352 stats.octet_decrypt_cnt);
353 seq_printf(filp, "sc%d: Octets validated: %lld\n", sc_id,
354 stats.octet_validate_cnt);
355 }
356 }
357 mutex_unlock(&mcs->stats_lock);
358 return 0;
359 }
360
361 RVU_DEBUG_SEQ_FOPS(mcs_rx_sc_stats, mcs_rx_sc_stats_display, NULL);
362
rvu_dbg_mcs_flowid_stats_display(struct seq_file * filp,void * unused,int dir)363 static int rvu_dbg_mcs_flowid_stats_display(struct seq_file *filp, void *unused, int dir)
364 {
365 struct mcs *mcs = filp->private;
366 struct mcs_flowid_stats stats;
367 struct rsrc_bmap *map;
368 int flow_id;
369
370 seq_puts(filp, "\n Flowid stats\n");
371
372 if (dir == MCS_RX)
373 map = &mcs->rx.flow_ids;
374 else
375 map = &mcs->tx.flow_ids;
376
377 mutex_lock(&mcs->stats_lock);
378 for_each_set_bit(flow_id, map->bmap, mcs->hw->tcam_entries) {
379 mcs_get_flowid_stats(mcs, &stats, flow_id, dir);
380 seq_printf(filp, "Flowid%d: Hit:%lld\n", flow_id, stats.tcam_hit_cnt);
381 }
382 mutex_unlock(&mcs->stats_lock);
383 return 0;
384 }
385
rvu_dbg_mcs_tx_flowid_stats_display(struct seq_file * filp,void * unused)386 static int rvu_dbg_mcs_tx_flowid_stats_display(struct seq_file *filp, void *unused)
387 {
388 return rvu_dbg_mcs_flowid_stats_display(filp, unused, MCS_TX);
389 }
390
391 RVU_DEBUG_SEQ_FOPS(mcs_tx_flowid_stats, mcs_tx_flowid_stats_display, NULL);
392
rvu_dbg_mcs_rx_flowid_stats_display(struct seq_file * filp,void * unused)393 static int rvu_dbg_mcs_rx_flowid_stats_display(struct seq_file *filp, void *unused)
394 {
395 return rvu_dbg_mcs_flowid_stats_display(filp, unused, MCS_RX);
396 }
397
398 RVU_DEBUG_SEQ_FOPS(mcs_rx_flowid_stats, mcs_rx_flowid_stats_display, NULL);
399
rvu_dbg_mcs_tx_secy_stats_display(struct seq_file * filp,void * unused)400 static int rvu_dbg_mcs_tx_secy_stats_display(struct seq_file *filp, void *unused)
401 {
402 struct mcs *mcs = filp->private;
403 struct mcs_secy_stats stats;
404 struct rsrc_bmap *map;
405 int secy_id;
406
407 map = &mcs->tx.secy;
408 seq_puts(filp, "\n MCS TX secy stats\n");
409
410 mutex_lock(&mcs->stats_lock);
411 for_each_set_bit(secy_id, map->bmap, mcs->hw->secy_entries) {
412 mcs_get_tx_secy_stats(mcs, &stats, secy_id);
413 seq_printf(filp, "\n=======Secy%d======\n\n", secy_id);
414 seq_printf(filp, "secy%d: Ctrl bcast pkts: %lld\n", secy_id,
415 stats.ctl_pkt_bcast_cnt);
416 seq_printf(filp, "secy%d: Ctrl Mcast pkts: %lld\n", secy_id,
417 stats.ctl_pkt_mcast_cnt);
418 seq_printf(filp, "secy%d: Ctrl ucast pkts: %lld\n", secy_id,
419 stats.ctl_pkt_ucast_cnt);
420 seq_printf(filp, "secy%d: Ctrl octets: %lld\n", secy_id, stats.ctl_octet_cnt);
421 seq_printf(filp, "secy%d: Unctrl bcast cnt: %lld\n", secy_id,
422 stats.unctl_pkt_bcast_cnt);
423 seq_printf(filp, "secy%d: Unctrl mcast pkts: %lld\n", secy_id,
424 stats.unctl_pkt_mcast_cnt);
425 seq_printf(filp, "secy%d: Unctrl ucast pkts: %lld\n", secy_id,
426 stats.unctl_pkt_ucast_cnt);
427 seq_printf(filp, "secy%d: Unctrl octets: %lld\n", secy_id, stats.unctl_octet_cnt);
428 seq_printf(filp, "secy%d: Octet encrypted: %lld\n", secy_id,
429 stats.octet_encrypted_cnt);
430 seq_printf(filp, "secy%d: octet protected: %lld\n", secy_id,
431 stats.octet_protected_cnt);
432 seq_printf(filp, "secy%d: Pkts on active sa: %lld\n", secy_id,
433 stats.pkt_noactivesa_cnt);
434 seq_printf(filp, "secy%d: Pkts too long: %lld\n", secy_id, stats.pkt_toolong_cnt);
435 seq_printf(filp, "secy%d: Pkts untagged: %lld\n", secy_id, stats.pkt_untagged_cnt);
436 }
437 mutex_unlock(&mcs->stats_lock);
438 return 0;
439 }
440
441 RVU_DEBUG_SEQ_FOPS(mcs_tx_secy_stats, mcs_tx_secy_stats_display, NULL);
442
rvu_dbg_mcs_rx_secy_stats_display(struct seq_file * filp,void * unused)443 static int rvu_dbg_mcs_rx_secy_stats_display(struct seq_file *filp, void *unused)
444 {
445 struct mcs *mcs = filp->private;
446 struct mcs_secy_stats stats;
447 struct rsrc_bmap *map;
448 int secy_id;
449
450 map = &mcs->rx.secy;
451 seq_puts(filp, "\n MCS secy stats\n");
452
453 mutex_lock(&mcs->stats_lock);
454 for_each_set_bit(secy_id, map->bmap, mcs->hw->secy_entries) {
455 mcs_get_rx_secy_stats(mcs, &stats, secy_id);
456 seq_printf(filp, "\n=======Secy%d======\n\n", secy_id);
457 seq_printf(filp, "secy%d: Ctrl bcast pkts: %lld\n", secy_id,
458 stats.ctl_pkt_bcast_cnt);
459 seq_printf(filp, "secy%d: Ctrl Mcast pkts: %lld\n", secy_id,
460 stats.ctl_pkt_mcast_cnt);
461 seq_printf(filp, "secy%d: Ctrl ucast pkts: %lld\n", secy_id,
462 stats.ctl_pkt_ucast_cnt);
463 seq_printf(filp, "secy%d: Ctrl octets: %lld\n", secy_id, stats.ctl_octet_cnt);
464 seq_printf(filp, "secy%d: Unctrl bcast cnt: %lld\n", secy_id,
465 stats.unctl_pkt_bcast_cnt);
466 seq_printf(filp, "secy%d: Unctrl mcast pkts: %lld\n", secy_id,
467 stats.unctl_pkt_mcast_cnt);
468 seq_printf(filp, "secy%d: Unctrl ucast pkts: %lld\n", secy_id,
469 stats.unctl_pkt_ucast_cnt);
470 seq_printf(filp, "secy%d: Unctrl octets: %lld\n", secy_id, stats.unctl_octet_cnt);
471 seq_printf(filp, "secy%d: Octet decrypted: %lld\n", secy_id,
472 stats.octet_decrypted_cnt);
473 seq_printf(filp, "secy%d: octet validated: %lld\n", secy_id,
474 stats.octet_validated_cnt);
475 seq_printf(filp, "secy%d: Pkts on disable port: %lld\n", secy_id,
476 stats.pkt_port_disabled_cnt);
477 seq_printf(filp, "secy%d: Pkts with badtag: %lld\n", secy_id, stats.pkt_badtag_cnt);
478 seq_printf(filp, "secy%d: Pkts with no SA(sectag.tci.c=0): %lld\n", secy_id,
479 stats.pkt_nosa_cnt);
480 seq_printf(filp, "secy%d: Pkts with nosaerror: %lld\n", secy_id,
481 stats.pkt_nosaerror_cnt);
482 seq_printf(filp, "secy%d: Tagged ctrl pkts: %lld\n", secy_id,
483 stats.pkt_tagged_ctl_cnt);
484 seq_printf(filp, "secy%d: Untaged pkts: %lld\n", secy_id, stats.pkt_untaged_cnt);
485 if (mcs->hw->mcs_blks > 1)
486 seq_printf(filp, "secy%d: pkts notag: %lld\n", secy_id,
487 stats.pkt_notag_cnt);
488 else
489 seq_printf(filp, "secy%d: Ctrl pkts: %lld\n", secy_id, stats.pkt_ctl_cnt);
490 }
491 mutex_unlock(&mcs->stats_lock);
492 return 0;
493 }
494
495 RVU_DEBUG_SEQ_FOPS(mcs_rx_secy_stats, mcs_rx_secy_stats_display, NULL);
496
rvu_dbg_mcs_init(struct rvu * rvu)497 static void rvu_dbg_mcs_init(struct rvu *rvu)
498 {
499 struct mcs *mcs;
500 char dname[10];
501 int i;
502
503 if (!rvu->mcs_blk_cnt)
504 return;
505
506 rvu->rvu_dbg.mcs_root = debugfs_create_dir("mcs", rvu->rvu_dbg.root);
507
508 for (i = 0; i < rvu->mcs_blk_cnt; i++) {
509 mcs = mcs_get_pdata(i);
510
511 sprintf(dname, "mcs%d", i);
512 rvu->rvu_dbg.mcs = debugfs_create_dir(dname,
513 rvu->rvu_dbg.mcs_root);
514
515 rvu->rvu_dbg.mcs_rx = debugfs_create_dir("rx_stats", rvu->rvu_dbg.mcs);
516
517 debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_rx, mcs,
518 &rvu_dbg_mcs_rx_flowid_stats_fops);
519
520 debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_rx, mcs,
521 &rvu_dbg_mcs_rx_secy_stats_fops);
522
523 debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_rx, mcs,
524 &rvu_dbg_mcs_rx_sc_stats_fops);
525
526 debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_rx, mcs,
527 &rvu_dbg_mcs_rx_sa_stats_fops);
528
529 debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_rx, mcs,
530 &rvu_dbg_mcs_rx_port_stats_fops);
531
532 rvu->rvu_dbg.mcs_tx = debugfs_create_dir("tx_stats", rvu->rvu_dbg.mcs);
533
534 debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_tx, mcs,
535 &rvu_dbg_mcs_tx_flowid_stats_fops);
536
537 debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_tx, mcs,
538 &rvu_dbg_mcs_tx_secy_stats_fops);
539
540 debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_tx, mcs,
541 &rvu_dbg_mcs_tx_sc_stats_fops);
542
543 debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_tx, mcs,
544 &rvu_dbg_mcs_tx_sa_stats_fops);
545
546 debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_tx, mcs,
547 &rvu_dbg_mcs_tx_port_stats_fops);
548 }
549 }
550
551 #define LMT_MAPTBL_ENTRY_SIZE 16
552 /* Dump LMTST map table */
rvu_dbg_lmtst_map_table_display(struct file * filp,char __user * buffer,size_t count,loff_t * ppos)553 static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp,
554 char __user *buffer,
555 size_t count, loff_t *ppos)
556 {
557 struct rvu *rvu = filp->private_data;
558 u64 lmt_addr, val, tbl_base;
559 int pf, vf, num_vfs, hw_vfs;
560 void __iomem *lmt_map_base;
561 int apr_pfs, apr_vfs;
562 int buf_size = 10240;
563 size_t off = 0;
564 int index = 0;
565 char *buf;
566 int ret;
567
568 /* don't allow partial reads */
569 if (*ppos != 0)
570 return 0;
571
572 buf = kzalloc(buf_size, GFP_KERNEL);
573 if (!buf)
574 return -ENOMEM;
575
576 tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);
577 val = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);
578 apr_vfs = 1 << (val & 0xF);
579 apr_pfs = 1 << ((val >> 4) & 0x7);
580
581 lmt_map_base = ioremap_wc(tbl_base, apr_pfs * apr_vfs *
582 LMT_MAPTBL_ENTRY_SIZE);
583 if (!lmt_map_base) {
584 dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");
585 kfree(buf);
586 return false;
587 }
588
589 off += scnprintf(&buf[off], buf_size - 1 - off,
590 "\n\t\t\t\t\tLmtst Map Table Entries");
591 off += scnprintf(&buf[off], buf_size - 1 - off,
592 "\n\t\t\t\t\t=======================");
593 off += scnprintf(&buf[off], buf_size - 1 - off, "\nPcifunc\t\t\t");
594 off += scnprintf(&buf[off], buf_size - 1 - off, "Table Index\t\t");
595 off += scnprintf(&buf[off], buf_size - 1 - off,
596 "Lmtline Base (word 0)\t\t");
597 off += scnprintf(&buf[off], buf_size - 1 - off,
598 "Lmt Map Entry (word 1)");
599 off += scnprintf(&buf[off], buf_size - 1 - off, "\n");
600 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
601 off += scnprintf(&buf[off], buf_size - 1 - off, "PF%d \t\t\t",
602 pf);
603
604 index = pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE;
605 off += scnprintf(&buf[off], buf_size - 1 - off, " 0x%llx\t\t",
606 (tbl_base + index));
607 lmt_addr = readq(lmt_map_base + index);
608 off += scnprintf(&buf[off], buf_size - 1 - off,
609 " 0x%016llx\t\t", lmt_addr);
610 index += 8;
611 val = readq(lmt_map_base + index);
612 off += scnprintf(&buf[off], buf_size - 1 - off, " 0x%016llx\n",
613 val);
614 /* Reading num of VFs per PF */
615 rvu_get_pf_numvfs(rvu, pf, &num_vfs, &hw_vfs);
616 for (vf = 0; vf < num_vfs; vf++) {
617 index = (pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE) +
618 ((vf + 1) * LMT_MAPTBL_ENTRY_SIZE);
619 off += scnprintf(&buf[off], buf_size - 1 - off,
620 "PF%d:VF%d \t\t", pf, vf);
621 off += scnprintf(&buf[off], buf_size - 1 - off,
622 " 0x%llx\t\t", (tbl_base + index));
623 lmt_addr = readq(lmt_map_base + index);
624 off += scnprintf(&buf[off], buf_size - 1 - off,
625 " 0x%016llx\t\t", lmt_addr);
626 index += 8;
627 val = readq(lmt_map_base + index);
628 off += scnprintf(&buf[off], buf_size - 1 - off,
629 " 0x%016llx\n", val);
630 }
631 }
632 off += scnprintf(&buf[off], buf_size - 1 - off, "\n");
633
634 ret = min(off, count);
635 if (copy_to_user(buffer, buf, ret))
636 ret = -EFAULT;
637 kfree(buf);
638
639 iounmap(lmt_map_base);
640 if (ret < 0)
641 return ret;
642
643 *ppos = ret;
644 return ret;
645 }
646
647 RVU_DEBUG_FOPS(lmtst_map_table, lmtst_map_table_display, NULL);
648
get_lf_str_list(const struct rvu_block * block,int pcifunc,char * lfs)649 static void get_lf_str_list(const struct rvu_block *block, int pcifunc,
650 char *lfs)
651 {
652 int lf = 0, seq = 0, len = 0, prev_lf = block->lf.max;
653
654 for_each_set_bit(lf, block->lf.bmap, block->lf.max) {
655 if (lf >= block->lf.max)
656 break;
657
658 if (block->fn_map[lf] != pcifunc)
659 continue;
660
661 if (lf == prev_lf + 1) {
662 prev_lf = lf;
663 seq = 1;
664 continue;
665 }
666
667 if (seq)
668 len += sprintf(lfs + len, "-%d,%d", prev_lf, lf);
669 else
670 len += (len ? sprintf(lfs + len, ",%d", lf) :
671 sprintf(lfs + len, "%d", lf));
672
673 prev_lf = lf;
674 seq = 0;
675 }
676
677 if (seq)
678 len += sprintf(lfs + len, "-%d", prev_lf);
679
680 lfs[len] = '\0';
681 }
682
get_max_column_width(struct rvu * rvu)683 static int get_max_column_width(struct rvu *rvu)
684 {
685 int index, pf, vf, lf_str_size = 12, buf_size = 256;
686 struct rvu_block block;
687 u16 pcifunc;
688 char *buf;
689
690 buf = kzalloc(buf_size, GFP_KERNEL);
691 if (!buf)
692 return -ENOMEM;
693
694 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
695 for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
696 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);
697 if (!pcifunc)
698 continue;
699
700 for (index = 0; index < BLK_COUNT; index++) {
701 block = rvu->hw->block[index];
702 if (!strlen(block.name))
703 continue;
704
705 get_lf_str_list(&block, pcifunc, buf);
706 if (lf_str_size <= strlen(buf))
707 lf_str_size = strlen(buf) + 1;
708 }
709 }
710 }
711
712 kfree(buf);
713 return lf_str_size;
714 }
715
716 /* Dumps current provisioning status of all RVU block LFs */
rvu_dbg_rsrc_attach_status(struct file * filp,char __user * buffer,size_t count,loff_t * ppos)717 static ssize_t rvu_dbg_rsrc_attach_status(struct file *filp,
718 char __user *buffer,
719 size_t count, loff_t *ppos)
720 {
721 int index, off = 0, flag = 0, len = 0, i = 0;
722 struct rvu *rvu = filp->private_data;
723 int bytes_not_copied = 0;
724 struct rvu_block block;
725 int pf, vf, pcifunc;
726 int buf_size = 2048;
727 int lf_str_size;
728 char *lfs;
729 char *buf;
730
731 /* don't allow partial reads */
732 if (*ppos != 0)
733 return 0;
734
735 buf = kzalloc(buf_size, GFP_KERNEL);
736 if (!buf)
737 return -ENOMEM;
738
739 /* Get the maximum width of a column */
740 lf_str_size = get_max_column_width(rvu);
741
742 lfs = kzalloc(lf_str_size, GFP_KERNEL);
743 if (!lfs) {
744 kfree(buf);
745 return -ENOMEM;
746 }
747 off += scnprintf(&buf[off], buf_size - 1 - off, "%-*s", lf_str_size,
748 "pcifunc");
749 for (index = 0; index < BLK_COUNT; index++)
750 if (strlen(rvu->hw->block[index].name)) {
751 off += scnprintf(&buf[off], buf_size - 1 - off,
752 "%-*s", lf_str_size,
753 rvu->hw->block[index].name);
754 }
755
756 off += scnprintf(&buf[off], buf_size - 1 - off, "\n");
757 bytes_not_copied = copy_to_user(buffer + (i * off), buf, off);
758 if (bytes_not_copied)
759 goto out;
760
761 i++;
762 *ppos += off;
763 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
764 for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {
765 off = 0;
766 flag = 0;
767 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);
768 if (!pcifunc)
769 continue;
770
771 if (vf) {
772 sprintf(lfs, "PF%d:VF%d", pf, vf - 1);
773 off = scnprintf(&buf[off],
774 buf_size - 1 - off,
775 "%-*s", lf_str_size, lfs);
776 } else {
777 sprintf(lfs, "PF%d", pf);
778 off = scnprintf(&buf[off],
779 buf_size - 1 - off,
780 "%-*s", lf_str_size, lfs);
781 }
782
783 for (index = 0; index < BLK_COUNT; index++) {
784 block = rvu->hw->block[index];
785 if (!strlen(block.name))
786 continue;
787 len = 0;
788 lfs[len] = '\0';
789 get_lf_str_list(&block, pcifunc, lfs);
790 if (strlen(lfs))
791 flag = 1;
792
793 off += scnprintf(&buf[off], buf_size - 1 - off,
794 "%-*s", lf_str_size, lfs);
795 }
796 if (flag) {
797 off += scnprintf(&buf[off],
798 buf_size - 1 - off, "\n");
799 bytes_not_copied = copy_to_user(buffer +
800 (i * off),
801 buf, off);
802 if (bytes_not_copied)
803 goto out;
804
805 i++;
806 *ppos += off;
807 }
808 }
809 }
810
811 out:
812 kfree(lfs);
813 kfree(buf);
814 if (bytes_not_copied)
815 return -EFAULT;
816
817 return *ppos;
818 }
819
820 RVU_DEBUG_FOPS(rsrc_status, rsrc_attach_status, NULL);
821
rvu_dbg_rvu_pf_cgx_map_display(struct seq_file * filp,void * unused)822 static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file *filp, void *unused)
823 {
824 char cgx[10], lmac[10], chan[10];
825 struct rvu *rvu = filp->private;
826 struct pci_dev *pdev = NULL;
827 struct mac_ops *mac_ops;
828 struct rvu_pfvf *pfvf;
829 int pf, domain, blkid;
830 u8 cgx_id, lmac_id;
831 u16 pcifunc;
832 u8 start;
833
834 domain = pci_domain_nr(rvu->pdev->bus);
835 mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
836 /* There can be no CGX devices at all */
837 if (!mac_ops)
838 return 0;
839 seq_printf(filp, "PCI dev\t\tRVU PF Func\tNIX block\t%s\tLMAC\tCHAN\n",
840 mac_ops->name);
841
842 /* All the PF devices are on contiguous PCI bus numbers, but the PF0(AF)
843 * may not start from 1 always. Hence get domain and bus from PCI device.
844 */
845 start = rvu->pdev->bus->number;
846 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
847 if (!is_pf_cgxmapped(rvu, pf))
848 continue;
849
850 pdev = pci_get_domain_bus_and_slot(domain, pf + start, 0);
851 if (!pdev)
852 continue;
853
854 cgx[0] = 0;
855 lmac[0] = 0;
856 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
857 pfvf = rvu_get_pfvf(rvu, pcifunc);
858
859 if (pfvf->nix_blkaddr == BLKADDR_NIX0)
860 blkid = 0;
861 else
862 blkid = 1;
863
864 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id,
865 &lmac_id);
866 sprintf(cgx, "%s%d", mac_ops->name, cgx_id);
867 sprintf(lmac, "LMAC%d", lmac_id);
868 sprintf(chan, "%d",
869 rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0));
870 seq_printf(filp, "%s\t0x%x\t\tNIX%d\t\t%s\t%s\t%s\n",
871 dev_name(&pdev->dev), pcifunc, blkid, cgx, lmac,
872 chan);
873
874 pci_dev_put(pdev);
875 }
876 return 0;
877 }
878
879 RVU_DEBUG_SEQ_FOPS(rvu_pf_cgx_map, rvu_pf_cgx_map_display, NULL);
880
rvu_dbg_rvu_fwdata_display(struct seq_file * s,void * unused)881 static int rvu_dbg_rvu_fwdata_display(struct seq_file *s, void *unused)
882 {
883 struct rvu *rvu = s->private;
884 struct rvu_fwdata *fwdata;
885 u8 mac[ETH_ALEN];
886 int count = 0, i;
887
888 if (!rvu->fwdata)
889 return -EAGAIN;
890
891 fwdata = rvu->fwdata;
892 seq_puts(s, "\nRVU Firmware Data:\n");
893 seq_puts(s, "\n\t\tPTP INFORMATION\n");
894 seq_puts(s, "\t\t===============\n");
895 seq_printf(s, "\t\texternal clockrate \t :%x\n",
896 fwdata->ptp_ext_clk_rate);
897 seq_printf(s, "\t\texternal timestamp \t :%x\n",
898 fwdata->ptp_ext_tstamp);
899 seq_puts(s, "\n");
900
901 seq_puts(s, "\n\t\tSDP CHANNEL INFORMATION\n");
902 seq_puts(s, "\t\t=======================\n");
903 seq_printf(s, "\t\tValid \t\t\t :%x\n", fwdata->channel_data.valid);
904 seq_printf(s, "\t\tNode ID \t\t :%x\n",
905 fwdata->channel_data.info.node_id);
906 seq_printf(s, "\t\tNumber of VFs \t\t :%x\n",
907 fwdata->channel_data.info.max_vfs);
908 seq_printf(s, "\t\tNumber of PF-Rings \t :%x\n",
909 fwdata->channel_data.info.num_pf_rings);
910 seq_printf(s, "\t\tPF SRN \t\t\t :%x\n",
911 fwdata->channel_data.info.pf_srn);
912 seq_puts(s, "\n");
913
914 seq_puts(s, "\n\t\tPF-INDEX MACADDRESS\n");
915 seq_puts(s, "\t\t====================\n");
916 for (i = 0; i < PF_MACNUM_MAX; i++) {
917 u64_to_ether_addr(fwdata->pf_macs[i], mac);
918 if (!is_zero_ether_addr(mac)) {
919 seq_printf(s, "\t\t %d %pM\n", i, mac);
920 count++;
921 }
922 }
923
924 if (!count)
925 seq_puts(s, "\t\tNo valid address found\n");
926
927 seq_puts(s, "\n\t\tVF-INDEX MACADDRESS\n");
928 seq_puts(s, "\t\t====================\n");
929 count = 0;
930 for (i = 0; i < VF_MACNUM_MAX; i++) {
931 u64_to_ether_addr(fwdata->vf_macs[i], mac);
932 if (!is_zero_ether_addr(mac)) {
933 seq_printf(s, "\t\t %d %pM\n", i, mac);
934 count++;
935 }
936 }
937
938 if (!count)
939 seq_puts(s, "\t\tNo valid address found\n");
940
941 return 0;
942 }
943
944 RVU_DEBUG_SEQ_FOPS(rvu_fwdata, rvu_fwdata_display, NULL);
945
rvu_dbg_is_valid_lf(struct rvu * rvu,int blkaddr,int lf,u16 * pcifunc)946 static bool rvu_dbg_is_valid_lf(struct rvu *rvu, int blkaddr, int lf,
947 u16 *pcifunc)
948 {
949 struct rvu_block *block;
950 struct rvu_hwinfo *hw;
951
952 hw = rvu->hw;
953 block = &hw->block[blkaddr];
954
955 if (lf < 0 || lf >= block->lf.max) {
956 dev_warn(rvu->dev, "Invalid LF: valid range: 0-%d\n",
957 block->lf.max - 1);
958 return false;
959 }
960
961 *pcifunc = block->fn_map[lf];
962 if (!*pcifunc) {
963 dev_warn(rvu->dev,
964 "This LF is not attached to any RVU PFFUNC\n");
965 return false;
966 }
967 return true;
968 }
969
print_npa_qsize(struct seq_file * m,struct rvu_pfvf * pfvf)970 static void print_npa_qsize(struct seq_file *m, struct rvu_pfvf *pfvf)
971 {
972 if (!pfvf->aura_ctx) {
973 seq_puts(m, "Aura context is not initialized\n");
974 } else {
975 seq_printf(m, "Aura count : %d\n", pfvf->aura_ctx->qsize);
976 seq_printf(m, "Aura context ena/dis bitmap : %*pb\n",
977 pfvf->aura_ctx->qsize, pfvf->aura_bmap);
978 }
979
980 if (!pfvf->pool_ctx) {
981 seq_puts(m, "Pool context is not initialized\n");
982 } else {
983 seq_printf(m, "Pool count : %d\n", pfvf->pool_ctx->qsize);
984 seq_printf(m, "Pool context ena/dis bitmap : %*pb\n",
985 pfvf->pool_ctx->qsize, pfvf->pool_bmap);
986 }
987 }
988
989 /* The 'qsize' entry dumps current Aura/Pool context Qsize
990 * and each context's current enable/disable status in a bitmap.
991 */
rvu_dbg_qsize_display(struct seq_file * s,void * unsused,int blktype)992 static int rvu_dbg_qsize_display(struct seq_file *s, void *unsused,
993 int blktype)
994 {
995 void (*print_qsize)(struct seq_file *s,
996 struct rvu_pfvf *pfvf) = NULL;
997 struct rvu_pfvf *pfvf;
998 struct rvu *rvu;
999 int qsize_id;
1000 u16 pcifunc;
1001 int blkaddr;
1002
1003 rvu = s->private;
1004 switch (blktype) {
1005 case BLKTYPE_NPA:
1006 qsize_id = rvu->rvu_dbg.npa_qsize_id;
1007 print_qsize = print_npa_qsize;
1008 break;
1009
1010 case BLKTYPE_NIX:
1011 qsize_id = rvu->rvu_dbg.nix_qsize_id;
1012 print_qsize = print_nix_qsize;
1013 break;
1014
1015 default:
1016 return -EINVAL;
1017 }
1018
1019 if (blktype == BLKTYPE_NPA)
1020 blkaddr = BLKADDR_NPA;
1021 else
1022 blkaddr = debugfs_get_aux_num(s->file);
1023
1024 if (!rvu_dbg_is_valid_lf(rvu, blkaddr, qsize_id, &pcifunc))
1025 return -EINVAL;
1026
1027 pfvf = rvu_get_pfvf(rvu, pcifunc);
1028 print_qsize(s, pfvf);
1029
1030 return 0;
1031 }
1032
rvu_dbg_qsize_write(struct file * file,const char __user * buffer,size_t count,loff_t * ppos,int blktype)1033 static ssize_t rvu_dbg_qsize_write(struct file *file,
1034 const char __user *buffer, size_t count,
1035 loff_t *ppos, int blktype)
1036 {
1037 char *blk_string = (blktype == BLKTYPE_NPA) ? "npa" : "nix";
1038 struct seq_file *seqfile = file->private_data;
1039 char *cmd_buf, *cmd_buf_tmp, *subtoken;
1040 struct rvu *rvu = seqfile->private;
1041 int blkaddr;
1042 u16 pcifunc;
1043 int ret, lf;
1044
1045 cmd_buf = memdup_user_nul(buffer, count);
1046 if (IS_ERR(cmd_buf))
1047 return -ENOMEM;
1048
1049 cmd_buf_tmp = strchr(cmd_buf, '\n');
1050 if (cmd_buf_tmp) {
1051 *cmd_buf_tmp = '\0';
1052 count = cmd_buf_tmp - cmd_buf + 1;
1053 }
1054
1055 cmd_buf_tmp = cmd_buf;
1056 subtoken = strsep(&cmd_buf, " ");
1057 ret = subtoken ? kstrtoint(subtoken, 10, &lf) : -EINVAL;
1058 if (cmd_buf)
1059 ret = -EINVAL;
1060
1061 if (ret < 0 || !strncmp(subtoken, "help", 4)) {
1062 dev_info(rvu->dev, "Use echo <%s-lf > qsize\n", blk_string);
1063 goto qsize_write_done;
1064 }
1065
1066 if (blktype == BLKTYPE_NPA)
1067 blkaddr = BLKADDR_NPA;
1068 else
1069 blkaddr = debugfs_get_aux_num(file);
1070
1071 if (!rvu_dbg_is_valid_lf(rvu, blkaddr, lf, &pcifunc)) {
1072 ret = -EINVAL;
1073 goto qsize_write_done;
1074 }
1075 if (blktype == BLKTYPE_NPA)
1076 rvu->rvu_dbg.npa_qsize_id = lf;
1077 else
1078 rvu->rvu_dbg.nix_qsize_id = lf;
1079
1080 qsize_write_done:
1081 kfree(cmd_buf_tmp);
1082 return ret ? ret : count;
1083 }
1084
rvu_dbg_npa_qsize_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1085 static ssize_t rvu_dbg_npa_qsize_write(struct file *filp,
1086 const char __user *buffer,
1087 size_t count, loff_t *ppos)
1088 {
1089 return rvu_dbg_qsize_write(filp, buffer, count, ppos,
1090 BLKTYPE_NPA);
1091 }
1092
rvu_dbg_npa_qsize_display(struct seq_file * filp,void * unused)1093 static int rvu_dbg_npa_qsize_display(struct seq_file *filp, void *unused)
1094 {
1095 return rvu_dbg_qsize_display(filp, unused, BLKTYPE_NPA);
1096 }
1097
1098 RVU_DEBUG_SEQ_FOPS(npa_qsize, npa_qsize_display, npa_qsize_write);
1099
1100 /* Dumps given NPA Aura's context */
print_npa_aura_ctx(struct seq_file * m,struct npa_aq_enq_rsp * rsp)1101 static void print_npa_aura_ctx(struct seq_file *m, struct npa_aq_enq_rsp *rsp)
1102 {
1103 struct npa_aura_s *aura = &rsp->aura;
1104 struct rvu *rvu = m->private;
1105
1106 if (is_cn20k(rvu->pdev)) {
1107 print_npa_cn20k_aura_ctx(m, (struct npa_cn20k_aq_enq_rsp *)rsp);
1108 return;
1109 }
1110
1111 seq_printf(m, "W0: Pool addr\t\t%llx\n", aura->pool_addr);
1112
1113 seq_printf(m, "W1: ena\t\t\t%d\nW1: pool caching\t%d\n",
1114 aura->ena, aura->pool_caching);
1115 seq_printf(m, "W1: pool way mask\t%d\nW1: avg con\t\t%d\n",
1116 aura->pool_way_mask, aura->avg_con);
1117 seq_printf(m, "W1: pool drop ena\t%d\nW1: aura drop ena\t%d\n",
1118 aura->pool_drop_ena, aura->aura_drop_ena);
1119 seq_printf(m, "W1: bp_ena\t\t%d\nW1: aura drop\t\t%d\n",
1120 aura->bp_ena, aura->aura_drop);
1121 seq_printf(m, "W1: aura shift\t\t%d\nW1: avg_level\t\t%d\n",
1122 aura->shift, aura->avg_level);
1123
1124 seq_printf(m, "W2: count\t\t%llu\nW2: nix0_bpid\t\t%d\nW2: nix1_bpid\t\t%d\n",
1125 (u64)aura->count, aura->nix0_bpid, aura->nix1_bpid);
1126
1127 seq_printf(m, "W3: limit\t\t%llu\nW3: bp\t\t\t%d\nW3: fc_ena\t\t%d\n",
1128 (u64)aura->limit, aura->bp, aura->fc_ena);
1129
1130 if (!is_rvu_otx2(rvu))
1131 seq_printf(m, "W3: fc_be\t\t%d\n", aura->fc_be);
1132 seq_printf(m, "W3: fc_up_crossing\t%d\nW3: fc_stype\t\t%d\n",
1133 aura->fc_up_crossing, aura->fc_stype);
1134 seq_printf(m, "W3: fc_hyst_bits\t%d\n", aura->fc_hyst_bits);
1135
1136 seq_printf(m, "W4: fc_addr\t\t%llx\n", aura->fc_addr);
1137
1138 seq_printf(m, "W5: pool_drop\t\t%d\nW5: update_time\t\t%d\n",
1139 aura->pool_drop, aura->update_time);
1140 seq_printf(m, "W5: err_int \t\t%d\nW5: err_int_ena\t\t%d\n",
1141 aura->err_int, aura->err_int_ena);
1142 seq_printf(m, "W5: thresh_int\t\t%d\nW5: thresh_int_ena \t%d\n",
1143 aura->thresh_int, aura->thresh_int_ena);
1144 seq_printf(m, "W5: thresh_up\t\t%d\nW5: thresh_qint_idx\t%d\n",
1145 aura->thresh_up, aura->thresh_qint_idx);
1146 seq_printf(m, "W5: err_qint_idx \t%d\n", aura->err_qint_idx);
1147
1148 seq_printf(m, "W6: thresh\t\t%llu\n", (u64)aura->thresh);
1149 if (!is_rvu_otx2(rvu))
1150 seq_printf(m, "W6: fc_msh_dst\t\t%d\n", aura->fc_msh_dst);
1151 }
1152
1153 /* Dumps given NPA Pool's context */
print_npa_pool_ctx(struct seq_file * m,struct npa_aq_enq_rsp * rsp)1154 static void print_npa_pool_ctx(struct seq_file *m, struct npa_aq_enq_rsp *rsp)
1155 {
1156 struct npa_pool_s *pool = &rsp->pool;
1157 struct rvu *rvu = m->private;
1158
1159 if (is_cn20k(rvu->pdev)) {
1160 print_npa_cn20k_pool_ctx(m, (struct npa_cn20k_aq_enq_rsp *)rsp);
1161 return;
1162 }
1163
1164 seq_printf(m, "W0: Stack base\t\t%llx\n", pool->stack_base);
1165
1166 seq_printf(m, "W1: ena \t\t%d\nW1: nat_align \t\t%d\n",
1167 pool->ena, pool->nat_align);
1168 seq_printf(m, "W1: stack_caching\t%d\nW1: stack_way_mask\t%d\n",
1169 pool->stack_caching, pool->stack_way_mask);
1170 seq_printf(m, "W1: buf_offset\t\t%d\nW1: buf_size\t\t%d\n",
1171 pool->buf_offset, pool->buf_size);
1172
1173 seq_printf(m, "W2: stack_max_pages \t%d\nW2: stack_pages\t\t%d\n",
1174 pool->stack_max_pages, pool->stack_pages);
1175
1176 seq_printf(m, "W3: op_pc \t\t%llu\n", (u64)pool->op_pc);
1177
1178 seq_printf(m, "W4: stack_offset\t%d\nW4: shift\t\t%d\nW4: avg_level\t\t%d\n",
1179 pool->stack_offset, pool->shift, pool->avg_level);
1180 seq_printf(m, "W4: avg_con \t\t%d\nW4: fc_ena\t\t%d\nW4: fc_stype\t\t%d\n",
1181 pool->avg_con, pool->fc_ena, pool->fc_stype);
1182 seq_printf(m, "W4: fc_hyst_bits\t%d\nW4: fc_up_crossing\t%d\n",
1183 pool->fc_hyst_bits, pool->fc_up_crossing);
1184 if (!is_rvu_otx2(rvu))
1185 seq_printf(m, "W4: fc_be\t\t%d\n", pool->fc_be);
1186 seq_printf(m, "W4: update_time\t\t%d\n", pool->update_time);
1187
1188 seq_printf(m, "W5: fc_addr\t\t%llx\n", pool->fc_addr);
1189
1190 seq_printf(m, "W6: ptr_start\t\t%llx\n", pool->ptr_start);
1191
1192 seq_printf(m, "W7: ptr_end\t\t%llx\n", pool->ptr_end);
1193
1194 seq_printf(m, "W8: err_int\t\t%d\nW8: err_int_ena\t\t%d\n",
1195 pool->err_int, pool->err_int_ena);
1196 seq_printf(m, "W8: thresh_int\t\t%d\n", pool->thresh_int);
1197 seq_printf(m, "W8: thresh_int_ena\t%d\nW8: thresh_up\t\t%d\n",
1198 pool->thresh_int_ena, pool->thresh_up);
1199 seq_printf(m, "W8: thresh_qint_idx\t%d\nW8: err_qint_idx\t%d\n",
1200 pool->thresh_qint_idx, pool->err_qint_idx);
1201 if (!is_rvu_otx2(rvu))
1202 seq_printf(m, "W8: fc_msh_dst\t\t%d\n", pool->fc_msh_dst);
1203 }
1204
1205 /* Reads aura/pool's ctx from admin queue */
rvu_dbg_npa_ctx_display(struct seq_file * m,void * unused,int ctype)1206 static int rvu_dbg_npa_ctx_display(struct seq_file *m, void *unused, int ctype)
1207 {
1208 void (*print_npa_ctx)(struct seq_file *m, struct npa_aq_enq_rsp *rsp);
1209 struct npa_aq_enq_req aq_req;
1210 struct npa_aq_enq_rsp rsp;
1211 struct rvu_pfvf *pfvf;
1212 int aura, rc, max_id;
1213 int npalf, id, all;
1214 struct rvu *rvu;
1215 u16 pcifunc;
1216
1217 rvu = m->private;
1218
1219 switch (ctype) {
1220 case NPA_AQ_CTYPE_AURA:
1221 npalf = rvu->rvu_dbg.npa_aura_ctx.lf;
1222 id = rvu->rvu_dbg.npa_aura_ctx.id;
1223 all = rvu->rvu_dbg.npa_aura_ctx.all;
1224 break;
1225
1226 case NPA_AQ_CTYPE_POOL:
1227 npalf = rvu->rvu_dbg.npa_pool_ctx.lf;
1228 id = rvu->rvu_dbg.npa_pool_ctx.id;
1229 all = rvu->rvu_dbg.npa_pool_ctx.all;
1230 break;
1231 default:
1232 return -EINVAL;
1233 }
1234
1235 if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))
1236 return -EINVAL;
1237
1238 pfvf = rvu_get_pfvf(rvu, pcifunc);
1239 if (ctype == NPA_AQ_CTYPE_AURA && !pfvf->aura_ctx) {
1240 seq_puts(m, "Aura context is not initialized\n");
1241 return -EINVAL;
1242 } else if (ctype == NPA_AQ_CTYPE_POOL && !pfvf->pool_ctx) {
1243 seq_puts(m, "Pool context is not initialized\n");
1244 return -EINVAL;
1245 }
1246
1247 memset(&aq_req, 0, sizeof(struct npa_aq_enq_req));
1248 aq_req.hdr.pcifunc = pcifunc;
1249 aq_req.ctype = ctype;
1250 aq_req.op = NPA_AQ_INSTOP_READ;
1251 if (ctype == NPA_AQ_CTYPE_AURA) {
1252 max_id = pfvf->aura_ctx->qsize;
1253 print_npa_ctx = print_npa_aura_ctx;
1254 } else {
1255 max_id = pfvf->pool_ctx->qsize;
1256 print_npa_ctx = print_npa_pool_ctx;
1257 }
1258
1259 if (id < 0 || id >= max_id) {
1260 seq_printf(m, "Invalid %s, valid range is 0-%d\n",
1261 (ctype == NPA_AQ_CTYPE_AURA) ? "aura" : "pool",
1262 max_id - 1);
1263 return -EINVAL;
1264 }
1265
1266 if (all)
1267 id = 0;
1268 else
1269 max_id = id + 1;
1270
1271 for (aura = id; aura < max_id; aura++) {
1272 aq_req.aura_id = aura;
1273
1274 /* Skip if queue is uninitialized */
1275 if (ctype == NPA_AQ_CTYPE_POOL && !test_bit(aura, pfvf->pool_bmap))
1276 continue;
1277
1278 seq_printf(m, "======%s : %d=======\n",
1279 (ctype == NPA_AQ_CTYPE_AURA) ? "AURA" : "POOL",
1280 aq_req.aura_id);
1281 rc = rvu_npa_aq_enq_inst(rvu, &aq_req, &rsp);
1282 if (rc) {
1283 seq_puts(m, "Failed to read context\n");
1284 return -EINVAL;
1285 }
1286 print_npa_ctx(m, &rsp);
1287 }
1288 return 0;
1289 }
1290
write_npa_ctx(struct rvu * rvu,bool all,int npalf,int id,int ctype)1291 static int write_npa_ctx(struct rvu *rvu, bool all,
1292 int npalf, int id, int ctype)
1293 {
1294 struct rvu_pfvf *pfvf;
1295 int max_id = 0;
1296 u16 pcifunc;
1297
1298 if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))
1299 return -EINVAL;
1300
1301 pfvf = rvu_get_pfvf(rvu, pcifunc);
1302
1303 if (ctype == NPA_AQ_CTYPE_AURA) {
1304 if (!pfvf->aura_ctx) {
1305 dev_warn(rvu->dev, "Aura context is not initialized\n");
1306 return -EINVAL;
1307 }
1308 max_id = pfvf->aura_ctx->qsize;
1309 } else if (ctype == NPA_AQ_CTYPE_POOL) {
1310 if (!pfvf->pool_ctx) {
1311 dev_warn(rvu->dev, "Pool context is not initialized\n");
1312 return -EINVAL;
1313 }
1314 max_id = pfvf->pool_ctx->qsize;
1315 }
1316
1317 if (id < 0 || id >= max_id) {
1318 dev_warn(rvu->dev, "Invalid %s, valid range is 0-%d\n",
1319 (ctype == NPA_AQ_CTYPE_AURA) ? "aura" : "pool",
1320 max_id - 1);
1321 return -EINVAL;
1322 }
1323
1324 switch (ctype) {
1325 case NPA_AQ_CTYPE_AURA:
1326 rvu->rvu_dbg.npa_aura_ctx.lf = npalf;
1327 rvu->rvu_dbg.npa_aura_ctx.id = id;
1328 rvu->rvu_dbg.npa_aura_ctx.all = all;
1329 break;
1330
1331 case NPA_AQ_CTYPE_POOL:
1332 rvu->rvu_dbg.npa_pool_ctx.lf = npalf;
1333 rvu->rvu_dbg.npa_pool_ctx.id = id;
1334 rvu->rvu_dbg.npa_pool_ctx.all = all;
1335 break;
1336 default:
1337 return -EINVAL;
1338 }
1339 return 0;
1340 }
1341
parse_cmd_buffer_ctx(char * cmd_buf,size_t * count,const char __user * buffer,int * npalf,int * id,bool * all)1342 static int parse_cmd_buffer_ctx(char *cmd_buf, size_t *count,
1343 const char __user *buffer, int *npalf,
1344 int *id, bool *all)
1345 {
1346 int bytes_not_copied;
1347 char *cmd_buf_tmp;
1348 char *subtoken;
1349 int ret;
1350
1351 bytes_not_copied = copy_from_user(cmd_buf, buffer, *count);
1352 if (bytes_not_copied)
1353 return -EFAULT;
1354
1355 cmd_buf[*count] = '\0';
1356 cmd_buf_tmp = strchr(cmd_buf, '\n');
1357
1358 if (cmd_buf_tmp) {
1359 *cmd_buf_tmp = '\0';
1360 *count = cmd_buf_tmp - cmd_buf + 1;
1361 }
1362
1363 subtoken = strsep(&cmd_buf, " ");
1364 ret = subtoken ? kstrtoint(subtoken, 10, npalf) : -EINVAL;
1365 if (ret < 0)
1366 return ret;
1367 subtoken = strsep(&cmd_buf, " ");
1368 if (subtoken && strcmp(subtoken, "all") == 0) {
1369 *all = true;
1370 } else {
1371 ret = subtoken ? kstrtoint(subtoken, 10, id) : -EINVAL;
1372 if (ret < 0)
1373 return ret;
1374 }
1375 if (cmd_buf)
1376 return -EINVAL;
1377 return ret;
1378 }
1379
rvu_dbg_npa_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos,int ctype)1380 static ssize_t rvu_dbg_npa_ctx_write(struct file *filp,
1381 const char __user *buffer,
1382 size_t count, loff_t *ppos, int ctype)
1383 {
1384 char *cmd_buf, *ctype_string = (ctype == NPA_AQ_CTYPE_AURA) ?
1385 "aura" : "pool";
1386 struct seq_file *seqfp = filp->private_data;
1387 struct rvu *rvu = seqfp->private;
1388 int npalf, id = 0, ret;
1389 bool all = false;
1390
1391 if ((*ppos != 0) || !count)
1392 return -EINVAL;
1393
1394 cmd_buf = kzalloc(count + 1, GFP_KERNEL);
1395 if (!cmd_buf)
1396 return count;
1397 ret = parse_cmd_buffer_ctx(cmd_buf, &count, buffer,
1398 &npalf, &id, &all);
1399 if (ret < 0) {
1400 dev_info(rvu->dev,
1401 "Usage: echo <npalf> [%s number/all] > %s_ctx\n",
1402 ctype_string, ctype_string);
1403 goto done;
1404 } else {
1405 ret = write_npa_ctx(rvu, all, npalf, id, ctype);
1406 }
1407 done:
1408 kfree(cmd_buf);
1409 return ret ? ret : count;
1410 }
1411
rvu_dbg_npa_aura_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1412 static ssize_t rvu_dbg_npa_aura_ctx_write(struct file *filp,
1413 const char __user *buffer,
1414 size_t count, loff_t *ppos)
1415 {
1416 return rvu_dbg_npa_ctx_write(filp, buffer, count, ppos,
1417 NPA_AQ_CTYPE_AURA);
1418 }
1419
rvu_dbg_npa_aura_ctx_display(struct seq_file * filp,void * unused)1420 static int rvu_dbg_npa_aura_ctx_display(struct seq_file *filp, void *unused)
1421 {
1422 return rvu_dbg_npa_ctx_display(filp, unused, NPA_AQ_CTYPE_AURA);
1423 }
1424
1425 RVU_DEBUG_SEQ_FOPS(npa_aura_ctx, npa_aura_ctx_display, npa_aura_ctx_write);
1426
rvu_dbg_npa_pool_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1427 static ssize_t rvu_dbg_npa_pool_ctx_write(struct file *filp,
1428 const char __user *buffer,
1429 size_t count, loff_t *ppos)
1430 {
1431 return rvu_dbg_npa_ctx_write(filp, buffer, count, ppos,
1432 NPA_AQ_CTYPE_POOL);
1433 }
1434
rvu_dbg_npa_pool_ctx_display(struct seq_file * filp,void * unused)1435 static int rvu_dbg_npa_pool_ctx_display(struct seq_file *filp, void *unused)
1436 {
1437 return rvu_dbg_npa_ctx_display(filp, unused, NPA_AQ_CTYPE_POOL);
1438 }
1439
1440 RVU_DEBUG_SEQ_FOPS(npa_pool_ctx, npa_pool_ctx_display, npa_pool_ctx_write);
1441
ndc_cache_stats(struct seq_file * s,int blk_addr,int ctype,int transaction)1442 static void ndc_cache_stats(struct seq_file *s, int blk_addr,
1443 int ctype, int transaction)
1444 {
1445 u64 req, out_req, lat, cant_alloc;
1446 struct nix_hw *nix_hw;
1447 struct rvu *rvu;
1448 int port;
1449
1450 if (blk_addr == BLKADDR_NDC_NPA0) {
1451 rvu = s->private;
1452 } else {
1453 nix_hw = s->private;
1454 rvu = nix_hw->rvu;
1455 }
1456
1457 for (port = 0; port < NDC_MAX_PORT; port++) {
1458 req = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_REQ_PC
1459 (port, ctype, transaction));
1460 lat = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_LAT_PC
1461 (port, ctype, transaction));
1462 out_req = rvu_read64(rvu, blk_addr,
1463 NDC_AF_PORTX_RTX_RWX_OSTDN_PC
1464 (port, ctype, transaction));
1465 cant_alloc = rvu_read64(rvu, blk_addr,
1466 NDC_AF_PORTX_RTX_CANT_ALLOC_PC
1467 (port, transaction));
1468 seq_printf(s, "\nPort:%d\n", port);
1469 seq_printf(s, "\tTotal Requests:\t\t%lld\n", req);
1470 seq_printf(s, "\tTotal Time Taken:\t%lld cycles\n", lat);
1471 seq_printf(s, "\tAvg Latency:\t\t%lld cycles\n", lat / req);
1472 seq_printf(s, "\tOutstanding Requests:\t%lld\n", out_req);
1473 seq_printf(s, "\tCant Alloc Requests:\t%lld\n", cant_alloc);
1474 }
1475 }
1476
ndc_blk_cache_stats(struct seq_file * s,int idx,int blk_addr)1477 static int ndc_blk_cache_stats(struct seq_file *s, int idx, int blk_addr)
1478 {
1479 seq_puts(s, "\n***** CACHE mode read stats *****\n");
1480 ndc_cache_stats(s, blk_addr, CACHING, NDC_READ_TRANS);
1481 seq_puts(s, "\n***** CACHE mode write stats *****\n");
1482 ndc_cache_stats(s, blk_addr, CACHING, NDC_WRITE_TRANS);
1483 seq_puts(s, "\n***** BY-PASS mode read stats *****\n");
1484 ndc_cache_stats(s, blk_addr, BYPASS, NDC_READ_TRANS);
1485 seq_puts(s, "\n***** BY-PASS mode write stats *****\n");
1486 ndc_cache_stats(s, blk_addr, BYPASS, NDC_WRITE_TRANS);
1487 return 0;
1488 }
1489
rvu_dbg_npa_ndc_cache_display(struct seq_file * filp,void * unused)1490 static int rvu_dbg_npa_ndc_cache_display(struct seq_file *filp, void *unused)
1491 {
1492 return ndc_blk_cache_stats(filp, NPA0_U, BLKADDR_NDC_NPA0);
1493 }
1494
1495 RVU_DEBUG_SEQ_FOPS(npa_ndc_cache, npa_ndc_cache_display, NULL);
1496
ndc_blk_hits_miss_stats(struct seq_file * s,int idx,int blk_addr)1497 static int ndc_blk_hits_miss_stats(struct seq_file *s, int idx, int blk_addr)
1498 {
1499 struct nix_hw *nix_hw;
1500 struct rvu *rvu;
1501 int bank, max_bank;
1502 u64 ndc_af_const;
1503
1504 if (blk_addr == BLKADDR_NDC_NPA0) {
1505 rvu = s->private;
1506 } else {
1507 nix_hw = s->private;
1508 rvu = nix_hw->rvu;
1509 }
1510
1511 ndc_af_const = rvu_read64(rvu, blk_addr, NDC_AF_CONST);
1512 max_bank = FIELD_GET(NDC_AF_BANK_MASK, ndc_af_const);
1513 for (bank = 0; bank < max_bank; bank++) {
1514 seq_printf(s, "BANK:%d\n", bank);
1515 seq_printf(s, "\tHits:\t%lld\n",
1516 (u64)rvu_read64(rvu, blk_addr,
1517 NDC_AF_BANKX_HIT_PC(bank)));
1518 seq_printf(s, "\tMiss:\t%lld\n",
1519 (u64)rvu_read64(rvu, blk_addr,
1520 NDC_AF_BANKX_MISS_PC(bank)));
1521 }
1522 return 0;
1523 }
1524
rvu_dbg_nix_ndc_rx_cache_display(struct seq_file * filp,void * unused)1525 static int rvu_dbg_nix_ndc_rx_cache_display(struct seq_file *filp, void *unused)
1526 {
1527 struct nix_hw *nix_hw = filp->private;
1528 int blkaddr = 0;
1529 int ndc_idx = 0;
1530
1531 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1532 BLKADDR_NDC_NIX1_RX : BLKADDR_NDC_NIX0_RX);
1533 ndc_idx = (nix_hw->blkaddr == BLKADDR_NIX1 ? NIX1_RX : NIX0_RX);
1534
1535 return ndc_blk_cache_stats(filp, ndc_idx, blkaddr);
1536 }
1537
1538 RVU_DEBUG_SEQ_FOPS(nix_ndc_rx_cache, nix_ndc_rx_cache_display, NULL);
1539
rvu_dbg_nix_ndc_tx_cache_display(struct seq_file * filp,void * unused)1540 static int rvu_dbg_nix_ndc_tx_cache_display(struct seq_file *filp, void *unused)
1541 {
1542 struct nix_hw *nix_hw = filp->private;
1543 int blkaddr = 0;
1544 int ndc_idx = 0;
1545
1546 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1547 BLKADDR_NDC_NIX1_TX : BLKADDR_NDC_NIX0_TX);
1548 ndc_idx = (nix_hw->blkaddr == BLKADDR_NIX1 ? NIX1_TX : NIX0_TX);
1549
1550 return ndc_blk_cache_stats(filp, ndc_idx, blkaddr);
1551 }
1552
1553 RVU_DEBUG_SEQ_FOPS(nix_ndc_tx_cache, nix_ndc_tx_cache_display, NULL);
1554
rvu_dbg_npa_ndc_hits_miss_display(struct seq_file * filp,void * unused)1555 static int rvu_dbg_npa_ndc_hits_miss_display(struct seq_file *filp,
1556 void *unused)
1557 {
1558 return ndc_blk_hits_miss_stats(filp, NPA0_U, BLKADDR_NDC_NPA0);
1559 }
1560
1561 RVU_DEBUG_SEQ_FOPS(npa_ndc_hits_miss, npa_ndc_hits_miss_display, NULL);
1562
rvu_dbg_nix_ndc_rx_hits_miss_display(struct seq_file * filp,void * unused)1563 static int rvu_dbg_nix_ndc_rx_hits_miss_display(struct seq_file *filp,
1564 void *unused)
1565 {
1566 struct nix_hw *nix_hw = filp->private;
1567 int ndc_idx = NPA0_U;
1568 int blkaddr = 0;
1569
1570 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1571 BLKADDR_NDC_NIX1_RX : BLKADDR_NDC_NIX0_RX);
1572
1573 return ndc_blk_hits_miss_stats(filp, ndc_idx, blkaddr);
1574 }
1575
1576 RVU_DEBUG_SEQ_FOPS(nix_ndc_rx_hits_miss, nix_ndc_rx_hits_miss_display, NULL);
1577
rvu_dbg_nix_ndc_tx_hits_miss_display(struct seq_file * filp,void * unused)1578 static int rvu_dbg_nix_ndc_tx_hits_miss_display(struct seq_file *filp,
1579 void *unused)
1580 {
1581 struct nix_hw *nix_hw = filp->private;
1582 int ndc_idx = NPA0_U;
1583 int blkaddr = 0;
1584
1585 blkaddr = (nix_hw->blkaddr == BLKADDR_NIX1 ?
1586 BLKADDR_NDC_NIX1_TX : BLKADDR_NDC_NIX0_TX);
1587
1588 return ndc_blk_hits_miss_stats(filp, ndc_idx, blkaddr);
1589 }
1590
1591 RVU_DEBUG_SEQ_FOPS(nix_ndc_tx_hits_miss, nix_ndc_tx_hits_miss_display, NULL);
1592
print_nix_cn10k_sq_ctx(struct seq_file * m,struct nix_cn10k_sq_ctx_s * sq_ctx)1593 static void print_nix_cn10k_sq_ctx(struct seq_file *m,
1594 struct nix_cn10k_sq_ctx_s *sq_ctx)
1595 {
1596 seq_printf(m, "W0: ena \t\t\t%d\nW0: qint_idx \t\t\t%d\n",
1597 sq_ctx->ena, sq_ctx->qint_idx);
1598 seq_printf(m, "W0: substream \t\t\t0x%03x\nW0: sdp_mcast \t\t\t%d\n",
1599 sq_ctx->substream, sq_ctx->sdp_mcast);
1600 seq_printf(m, "W0: cq \t\t\t\t%d\nW0: sqe_way_mask \t\t%d\n\n",
1601 sq_ctx->cq, sq_ctx->sqe_way_mask);
1602
1603 seq_printf(m, "W1: smq \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: xoff\t\t\t%d\n",
1604 sq_ctx->smq, sq_ctx->cq_ena, sq_ctx->xoff);
1605 seq_printf(m, "W1: sso_ena \t\t\t%d\nW1: smq_rr_weight\t\t%d\n",
1606 sq_ctx->sso_ena, sq_ctx->smq_rr_weight);
1607 seq_printf(m, "W1: default_chan\t\t%d\nW1: sqb_count\t\t\t%d\n\n",
1608 sq_ctx->default_chan, sq_ctx->sqb_count);
1609
1610 seq_printf(m, "W2: smq_rr_count_lb \t\t%d\n", sq_ctx->smq_rr_count_lb);
1611 seq_printf(m, "W2: smq_rr_count_ub \t\t%d\n", sq_ctx->smq_rr_count_ub);
1612 seq_printf(m, "W2: sqb_aura \t\t\t%d\nW2: sq_int \t\t\t%d\n",
1613 sq_ctx->sqb_aura, sq_ctx->sq_int);
1614 seq_printf(m, "W2: sq_int_ena \t\t\t%d\nW2: sqe_stype \t\t\t%d\n",
1615 sq_ctx->sq_int_ena, sq_ctx->sqe_stype);
1616
1617 seq_printf(m, "W3: max_sqe_size\t\t%d\nW3: cq_limit\t\t\t%d\n",
1618 sq_ctx->max_sqe_size, sq_ctx->cq_limit);
1619 seq_printf(m, "W3: lmt_dis \t\t\t%d\nW3: mnq_dis \t\t\t%d\n",
1620 sq_ctx->mnq_dis, sq_ctx->lmt_dis);
1621 seq_printf(m, "W3: smq_next_sq\t\t\t%d\nW3: smq_lso_segnum\t\t%d\n",
1622 sq_ctx->smq_next_sq, sq_ctx->smq_lso_segnum);
1623 seq_printf(m, "W3: tail_offset \t\t%d\nW3: smenq_offset\t\t%d\n",
1624 sq_ctx->tail_offset, sq_ctx->smenq_offset);
1625 seq_printf(m, "W3: head_offset\t\t\t%d\nW3: smenq_next_sqb_vld\t\t%d\n\n",
1626 sq_ctx->head_offset, sq_ctx->smenq_next_sqb_vld);
1627
1628 seq_printf(m, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d\n",
1629 sq_ctx->smq_next_sq_vld, sq_ctx->smq_pend);
1630 seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);
1631 seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);
1632 seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);
1633 seq_printf(m, "W7: smenq_next_sqb \t\t%llx\n\n",
1634 sq_ctx->smenq_next_sqb);
1635
1636 seq_printf(m, "W8: head_sqb\t\t\t%llx\n\n", sq_ctx->head_sqb);
1637
1638 seq_printf(m, "W9: vfi_lso_total\t\t%d\n", sq_ctx->vfi_lso_total);
1639 seq_printf(m, "W9: vfi_lso_sizem1\t\t%d\nW9: vfi_lso_sb\t\t\t%d\n",
1640 sq_ctx->vfi_lso_sizem1, sq_ctx->vfi_lso_sb);
1641 seq_printf(m, "W9: vfi_lso_mps\t\t\t%d\nW9: vfi_lso_vlan0_ins_ena\t%d\n",
1642 sq_ctx->vfi_lso_mps, sq_ctx->vfi_lso_vlan0_ins_ena);
1643 seq_printf(m, "W9: vfi_lso_vlan1_ins_ena\t%d\nW9: vfi_lso_vld \t\t%d\n\n",
1644 sq_ctx->vfi_lso_vld, sq_ctx->vfi_lso_vlan1_ins_ena);
1645
1646 seq_printf(m, "W10: scm_lso_rem \t\t%llu\n\n",
1647 (u64)sq_ctx->scm_lso_rem);
1648 seq_printf(m, "W11: octs \t\t\t%llu\n\n", (u64)sq_ctx->octs);
1649 seq_printf(m, "W12: pkts \t\t\t%llu\n\n", (u64)sq_ctx->pkts);
1650 seq_printf(m, "W14: dropped_octs \t\t%llu\n\n",
1651 (u64)sq_ctx->dropped_octs);
1652 seq_printf(m, "W15: dropped_pkts \t\t%llu\n\n",
1653 (u64)sq_ctx->dropped_pkts);
1654 }
1655
print_tm_tree(struct seq_file * m,struct nix_aq_enq_rsp * rsp,u64 sq)1656 static void print_tm_tree(struct seq_file *m,
1657 struct nix_aq_enq_rsp *rsp, u64 sq)
1658 {
1659 struct nix_sq_ctx_s *sq_ctx = &rsp->sq;
1660 struct nix_hw *nix_hw = m->private;
1661 struct rvu *rvu = nix_hw->rvu;
1662 u16 p1, p2, p3, p4, schq;
1663 int blkaddr;
1664 u64 cfg;
1665
1666 if (!sq_ctx->ena)
1667 return;
1668
1669 blkaddr = nix_hw->blkaddr;
1670 schq = sq_ctx->smq;
1671
1672 cfg = rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq));
1673 p1 = FIELD_GET(NIX_AF_MDQ_PARENT_MASK, cfg);
1674
1675 cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(p1));
1676 p2 = FIELD_GET(NIX_AF_TL4_PARENT_MASK, cfg);
1677
1678 cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(p2));
1679 p3 = FIELD_GET(NIX_AF_TL3_PARENT_MASK, cfg);
1680
1681 cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(p3));
1682 p4 = FIELD_GET(NIX_AF_TL2_PARENT_MASK, cfg);
1683 seq_printf(m,
1684 "SQ(%llu) -> SMQ(%u) -> TL4(%u) -> TL3(%u) -> TL2(%u) -> TL1(%u)\n",
1685 sq, schq, p1, p2, p3, p4);
1686 }
1687
1688 /*dumps given tm_tree registers*/
rvu_dbg_nix_tm_tree_display(struct seq_file * m,void * unused)1689 static int rvu_dbg_nix_tm_tree_display(struct seq_file *m, void *unused)
1690 {
1691 int qidx, nixlf, rc, id, max_id = 0;
1692 struct nix_hw *nix_hw = m->private;
1693 struct rvu *rvu = nix_hw->rvu;
1694 struct nix_aq_enq_req aq_req;
1695 struct nix_aq_enq_rsp rsp;
1696 struct rvu_pfvf *pfvf;
1697 u16 pcifunc;
1698
1699 nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;
1700 id = rvu->rvu_dbg.nix_tm_ctx.id;
1701
1702 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
1703 return -EINVAL;
1704
1705 pfvf = rvu_get_pfvf(rvu, pcifunc);
1706
1707 if (!pfvf->sq_ctx) {
1708 seq_printf(m, "SQ context is not initialized for pcifunc 0x%x\n", pcifunc);
1709 return -EINVAL;
1710 }
1711
1712 max_id = pfvf->sq_ctx->qsize;
1713
1714 memset(&aq_req, 0, sizeof(struct nix_aq_enq_req));
1715 aq_req.hdr.pcifunc = pcifunc;
1716 aq_req.ctype = NIX_AQ_CTYPE_SQ;
1717 aq_req.op = NIX_AQ_INSTOP_READ;
1718 seq_printf(m, "pcifunc is 0x%x\n", pcifunc);
1719 for (qidx = id; qidx < max_id; qidx++) {
1720 aq_req.qidx = qidx;
1721
1722 /* Skip SQ's if not initialized */
1723 if (!test_bit(qidx, pfvf->sq_bmap))
1724 continue;
1725
1726 rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);
1727
1728 if (rc) {
1729 seq_printf(m, "Failed to read SQ(%d) context\n",
1730 aq_req.qidx);
1731 continue;
1732 }
1733 print_tm_tree(m, &rsp, aq_req.qidx);
1734 }
1735 return 0;
1736 }
1737
rvu_dbg_nix_tm_tree_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1738 static ssize_t rvu_dbg_nix_tm_tree_write(struct file *filp,
1739 const char __user *buffer,
1740 size_t count, loff_t *ppos)
1741 {
1742 struct seq_file *m = filp->private_data;
1743 struct nix_hw *nix_hw = m->private;
1744 struct rvu *rvu = nix_hw->rvu;
1745 struct rvu_pfvf *pfvf;
1746 u16 pcifunc;
1747 u64 nixlf;
1748 int ret;
1749
1750 ret = kstrtoull_from_user(buffer, count, 10, &nixlf);
1751 if (ret)
1752 return ret;
1753
1754 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
1755 return -EINVAL;
1756
1757 pfvf = rvu_get_pfvf(rvu, pcifunc);
1758 if (!pfvf->sq_ctx) {
1759 dev_warn(rvu->dev, "SQ context is not initialized\n");
1760 return -EINVAL;
1761 }
1762
1763 rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;
1764 return count;
1765 }
1766
1767 RVU_DEBUG_SEQ_FOPS(nix_tm_tree, nix_tm_tree_display, nix_tm_tree_write);
1768
print_tm_topo(struct seq_file * m,u64 schq,u32 lvl)1769 static void print_tm_topo(struct seq_file *m, u64 schq, u32 lvl)
1770 {
1771 struct nix_hw *nix_hw = m->private;
1772 struct rvu *rvu = nix_hw->rvu;
1773 int blkaddr, link, link_level;
1774 struct rvu_hwinfo *hw;
1775
1776 hw = rvu->hw;
1777 blkaddr = nix_hw->blkaddr;
1778 if (lvl == NIX_TXSCH_LVL_MDQ) {
1779 seq_printf(m, "NIX_AF_SMQ[%llu]_CFG =0x%llx\n", schq,
1780 rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(schq)));
1781 seq_printf(m, "NIX_AF_SMQ[%llu]_STATUS =0x%llx\n", schq,
1782 rvu_read64(rvu, blkaddr, NIX_AF_SMQX_STATUS(schq)));
1783 seq_printf(m, "NIX_AF_MDQ[%llu]_OUT_MD_COUNT =0x%llx\n", schq,
1784 rvu_read64(rvu, blkaddr,
1785 NIX_AF_MDQX_OUT_MD_COUNT(schq)));
1786 seq_printf(m, "NIX_AF_MDQ[%llu]_SCHEDULE =0x%llx\n", schq,
1787 rvu_read64(rvu, blkaddr,
1788 NIX_AF_MDQX_SCHEDULE(schq)));
1789 seq_printf(m, "NIX_AF_MDQ[%llu]_SHAPE =0x%llx\n", schq,
1790 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SHAPE(schq)));
1791 seq_printf(m, "NIX_AF_MDQ[%llu]_CIR =0x%llx\n", schq,
1792 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_CIR(schq)));
1793 seq_printf(m, "NIX_AF_MDQ[%llu]_PIR =0x%llx\n", schq,
1794 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PIR(schq)));
1795 seq_printf(m, "NIX_AF_MDQ[%llu]_SW_XOFF =0x%llx\n", schq,
1796 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SW_XOFF(schq)));
1797 seq_printf(m, "NIX_AF_MDQ[%llu]_PARENT =0x%llx\n", schq,
1798 rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq)));
1799 seq_puts(m, "\n");
1800 }
1801
1802 if (lvl == NIX_TXSCH_LVL_TL4) {
1803 seq_printf(m, "NIX_AF_TL4[%llu]_SDP_LINK_CFG =0x%llx\n", schq,
1804 rvu_read64(rvu, blkaddr,
1805 NIX_AF_TL4X_SDP_LINK_CFG(schq)));
1806 seq_printf(m, "NIX_AF_TL4[%llu]_SCHEDULE =0x%llx\n", schq,
1807 rvu_read64(rvu, blkaddr,
1808 NIX_AF_TL4X_SCHEDULE(schq)));
1809 seq_printf(m, "NIX_AF_TL4[%llu]_SHAPE =0x%llx\n", schq,
1810 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SHAPE(schq)));
1811 seq_printf(m, "NIX_AF_TL4[%llu]_CIR =0x%llx\n", schq,
1812 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_CIR(schq)));
1813 seq_printf(m, "NIX_AF_TL4[%llu]_PIR =0x%llx\n", schq,
1814 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PIR(schq)));
1815 seq_printf(m, "NIX_AF_TL4[%llu]_SW_XOFF =0x%llx\n", schq,
1816 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SW_XOFF(schq)));
1817 seq_printf(m, "NIX_AF_TL4[%llu]_TOPOLOGY =0x%llx\n", schq,
1818 rvu_read64(rvu, blkaddr,
1819 NIX_AF_TL4X_TOPOLOGY(schq)));
1820 seq_printf(m, "NIX_AF_TL4[%llu]_PARENT =0x%llx\n", schq,
1821 rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(schq)));
1822 seq_printf(m, "NIX_AF_TL4[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1823 rvu_read64(rvu, blkaddr,
1824 NIX_AF_TL4X_MD_DEBUG0(schq)));
1825 seq_printf(m, "NIX_AF_TL4[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1826 rvu_read64(rvu, blkaddr,
1827 NIX_AF_TL4X_MD_DEBUG1(schq)));
1828 seq_puts(m, "\n");
1829 }
1830
1831 if (lvl == NIX_TXSCH_LVL_TL3) {
1832 seq_printf(m, "NIX_AF_TL3[%llu]_SCHEDULE =0x%llx\n", schq,
1833 rvu_read64(rvu, blkaddr,
1834 NIX_AF_TL3X_SCHEDULE(schq)));
1835 seq_printf(m, "NIX_AF_TL3[%llu]_SHAPE =0x%llx\n", schq,
1836 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SHAPE(schq)));
1837 seq_printf(m, "NIX_AF_TL3[%llu]_CIR =0x%llx\n", schq,
1838 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_CIR(schq)));
1839 seq_printf(m, "NIX_AF_TL3[%llu]_PIR =0x%llx\n", schq,
1840 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PIR(schq)));
1841 seq_printf(m, "NIX_AF_TL3[%llu]_SW_XOFF =0x%llx\n", schq,
1842 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SW_XOFF(schq)));
1843 seq_printf(m, "NIX_AF_TL3[%llu]_TOPOLOGY =0x%llx\n", schq,
1844 rvu_read64(rvu, blkaddr,
1845 NIX_AF_TL3X_TOPOLOGY(schq)));
1846 seq_printf(m, "NIX_AF_TL3[%llu]_PARENT =0x%llx\n", schq,
1847 rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(schq)));
1848 seq_printf(m, "NIX_AF_TL3[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1849 rvu_read64(rvu, blkaddr,
1850 NIX_AF_TL3X_MD_DEBUG0(schq)));
1851 seq_printf(m, "NIX_AF_TL3[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1852 rvu_read64(rvu, blkaddr,
1853 NIX_AF_TL3X_MD_DEBUG1(schq)));
1854
1855 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)
1856 & 0x01 ? NIX_TXSCH_LVL_TL3 : NIX_TXSCH_LVL_TL2;
1857 if (lvl == link_level) {
1858 seq_printf(m,
1859 "NIX_AF_TL3_TL2[%llu]_BP_STATUS =0x%llx\n",
1860 schq, rvu_read64(rvu, blkaddr,
1861 NIX_AF_TL3_TL2X_BP_STATUS(schq)));
1862 for (link = 0; link < hw->cgx_links; link++)
1863 seq_printf(m,
1864 "NIX_AF_TL3_TL2[%llu]_LINK[%d]_CFG =0x%llx\n",
1865 schq, link,
1866 rvu_read64(rvu, blkaddr,
1867 NIX_AF_TL3_TL2X_LINKX_CFG(schq, link)));
1868 }
1869 seq_puts(m, "\n");
1870 }
1871
1872 if (lvl == NIX_TXSCH_LVL_TL2) {
1873 seq_printf(m, "NIX_AF_TL2[%llu]_SHAPE =0x%llx\n", schq,
1874 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SHAPE(schq)));
1875 seq_printf(m, "NIX_AF_TL2[%llu]_CIR =0x%llx\n", schq,
1876 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_CIR(schq)));
1877 seq_printf(m, "NIX_AF_TL2[%llu]_PIR =0x%llx\n", schq,
1878 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PIR(schq)));
1879 seq_printf(m, "NIX_AF_TL2[%llu]_SW_XOFF =0x%llx\n", schq,
1880 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SW_XOFF(schq)));
1881 seq_printf(m, "NIX_AF_TL2[%llu]_TOPOLOGY =0x%llx\n", schq,
1882 rvu_read64(rvu, blkaddr,
1883 NIX_AF_TL2X_TOPOLOGY(schq)));
1884 seq_printf(m, "NIX_AF_TL2[%llu]_PARENT =0x%llx\n", schq,
1885 rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(schq)));
1886 seq_printf(m, "NIX_AF_TL2[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1887 rvu_read64(rvu, blkaddr,
1888 NIX_AF_TL2X_MD_DEBUG0(schq)));
1889 seq_printf(m, "NIX_AF_TL2[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1890 rvu_read64(rvu, blkaddr,
1891 NIX_AF_TL2X_MD_DEBUG1(schq)));
1892
1893 link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)
1894 & 0x01 ? NIX_TXSCH_LVL_TL3 : NIX_TXSCH_LVL_TL2;
1895 if (lvl == link_level) {
1896 seq_printf(m,
1897 "NIX_AF_TL3_TL2[%llu]_BP_STATUS =0x%llx\n",
1898 schq, rvu_read64(rvu, blkaddr,
1899 NIX_AF_TL3_TL2X_BP_STATUS(schq)));
1900 for (link = 0; link < hw->cgx_links; link++)
1901 seq_printf(m,
1902 "NIX_AF_TL3_TL2[%llu]_LINK[%d]_CFG =0x%llx\n",
1903 schq, link, rvu_read64(rvu, blkaddr,
1904 NIX_AF_TL3_TL2X_LINKX_CFG(schq, link)));
1905 }
1906 seq_puts(m, "\n");
1907 }
1908
1909 if (lvl == NIX_TXSCH_LVL_TL1) {
1910 seq_printf(m, "NIX_AF_TX_LINK[%llu]_NORM_CREDIT =0x%llx\n",
1911 schq,
1912 rvu_read64(rvu, blkaddr,
1913 NIX_AF_TX_LINKX_NORM_CREDIT(schq)));
1914 seq_printf(m, "NIX_AF_TX_LINK[%llu]_HW_XOFF =0x%llx\n", schq,
1915 rvu_read64(rvu, blkaddr,
1916 NIX_AF_TX_LINKX_HW_XOFF(schq)));
1917 seq_printf(m, "NIX_AF_TL1[%llu]_SCHEDULE =0x%llx\n", schq,
1918 rvu_read64(rvu, blkaddr,
1919 NIX_AF_TL1X_SCHEDULE(schq)));
1920 seq_printf(m, "NIX_AF_TL1[%llu]_SHAPE =0x%llx\n", schq,
1921 rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SHAPE(schq)));
1922 seq_printf(m, "NIX_AF_TL1[%llu]_CIR =0x%llx\n", schq,
1923 rvu_read64(rvu, blkaddr, NIX_AF_TL1X_CIR(schq)));
1924 seq_printf(m, "NIX_AF_TL1[%llu]_SW_XOFF =0x%llx\n", schq,
1925 rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SW_XOFF(schq)));
1926 seq_printf(m, "NIX_AF_TL1[%llu]_TOPOLOGY =0x%llx\n", schq,
1927 rvu_read64(rvu, blkaddr,
1928 NIX_AF_TL1X_TOPOLOGY(schq)));
1929 seq_printf(m, "NIX_AF_TL1[%llu]_MD_DEBUG0 =0x%llx\n", schq,
1930 rvu_read64(rvu, blkaddr,
1931 NIX_AF_TL1X_MD_DEBUG0(schq)));
1932 seq_printf(m, "NIX_AF_TL1[%llu]_MD_DEBUG1 =0x%llx\n", schq,
1933 rvu_read64(rvu, blkaddr,
1934 NIX_AF_TL1X_MD_DEBUG1(schq)));
1935 seq_printf(m, "NIX_AF_TL1[%llu]_DROPPED_PACKETS =0x%llx\n",
1936 schq,
1937 rvu_read64(rvu, blkaddr,
1938 NIX_AF_TL1X_DROPPED_PACKETS(schq)));
1939 seq_printf(m, "NIX_AF_TL1[%llu]_DROPPED_BYTES =0x%llx\n", schq,
1940 rvu_read64(rvu, blkaddr,
1941 NIX_AF_TL1X_DROPPED_BYTES(schq)));
1942 seq_printf(m, "NIX_AF_TL1[%llu]_RED_PACKETS =0x%llx\n", schq,
1943 rvu_read64(rvu, blkaddr,
1944 NIX_AF_TL1X_RED_PACKETS(schq)));
1945 seq_printf(m, "NIX_AF_TL1[%llu]_RED_BYTES =0x%llx\n", schq,
1946 rvu_read64(rvu, blkaddr,
1947 NIX_AF_TL1X_RED_BYTES(schq)));
1948 seq_printf(m, "NIX_AF_TL1[%llu]_YELLOW_PACKETS =0x%llx\n", schq,
1949 rvu_read64(rvu, blkaddr,
1950 NIX_AF_TL1X_YELLOW_PACKETS(schq)));
1951 seq_printf(m, "NIX_AF_TL1[%llu]_YELLOW_BYTES =0x%llx\n", schq,
1952 rvu_read64(rvu, blkaddr,
1953 NIX_AF_TL1X_YELLOW_BYTES(schq)));
1954 seq_printf(m, "NIX_AF_TL1[%llu]_GREEN_PACKETS =0x%llx\n", schq,
1955 rvu_read64(rvu, blkaddr,
1956 NIX_AF_TL1X_GREEN_PACKETS(schq)));
1957 seq_printf(m, "NIX_AF_TL1[%llu]_GREEN_BYTES =0x%llx\n", schq,
1958 rvu_read64(rvu, blkaddr,
1959 NIX_AF_TL1X_GREEN_BYTES(schq)));
1960 seq_puts(m, "\n");
1961 }
1962 }
1963
1964 /*dumps given tm_topo registers*/
rvu_dbg_nix_tm_topo_display(struct seq_file * m,void * unused)1965 static int rvu_dbg_nix_tm_topo_display(struct seq_file *m, void *unused)
1966 {
1967 struct nix_hw *nix_hw = m->private;
1968 struct rvu *rvu = nix_hw->rvu;
1969 struct nix_aq_enq_req aq_req;
1970 struct nix_txsch *txsch;
1971 int nixlf, lvl, schq;
1972 u16 pcifunc;
1973
1974 nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;
1975
1976 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
1977 return -EINVAL;
1978
1979 memset(&aq_req, 0, sizeof(struct nix_aq_enq_req));
1980 aq_req.hdr.pcifunc = pcifunc;
1981 aq_req.ctype = NIX_AQ_CTYPE_SQ;
1982 aq_req.op = NIX_AQ_INSTOP_READ;
1983 seq_printf(m, "pcifunc is 0x%x\n", pcifunc);
1984
1985 for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
1986 txsch = &nix_hw->txsch[lvl];
1987 for (schq = 0; schq < txsch->schq.max; schq++) {
1988 if (TXSCH_MAP_FUNC(txsch->pfvf_map[schq]) == pcifunc)
1989 print_tm_topo(m, schq, lvl);
1990 }
1991 }
1992 return 0;
1993 }
1994
rvu_dbg_nix_tm_topo_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)1995 static ssize_t rvu_dbg_nix_tm_topo_write(struct file *filp,
1996 const char __user *buffer,
1997 size_t count, loff_t *ppos)
1998 {
1999 struct seq_file *m = filp->private_data;
2000 struct nix_hw *nix_hw = m->private;
2001 struct rvu *rvu = nix_hw->rvu;
2002 struct rvu_pfvf *pfvf;
2003 u16 pcifunc;
2004 u64 nixlf;
2005 int ret;
2006
2007 ret = kstrtoull_from_user(buffer, count, 10, &nixlf);
2008 if (ret)
2009 return ret;
2010
2011 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
2012 return -EINVAL;
2013
2014 pfvf = rvu_get_pfvf(rvu, pcifunc);
2015 if (!pfvf->sq_ctx) {
2016 dev_warn(rvu->dev, "SQ context is not initialized\n");
2017 return -EINVAL;
2018 }
2019
2020 rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;
2021 return count;
2022 }
2023
2024 RVU_DEBUG_SEQ_FOPS(nix_tm_topo, nix_tm_topo_display, nix_tm_topo_write);
2025
2026 /* Dumps given nix_sq's context */
print_nix_sq_ctx(struct seq_file * m,struct nix_aq_enq_rsp * rsp)2027 static void print_nix_sq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)
2028 {
2029 struct nix_sq_ctx_s *sq_ctx = &rsp->sq;
2030 struct nix_hw *nix_hw = m->private;
2031 struct rvu *rvu = nix_hw->rvu;
2032
2033 if (is_cn20k(rvu->pdev)) {
2034 print_nix_cn20k_sq_ctx(m, (struct nix_cn20k_sq_ctx_s *)sq_ctx);
2035 return;
2036 }
2037
2038 if (!is_rvu_otx2(rvu)) {
2039 print_nix_cn10k_sq_ctx(m, (struct nix_cn10k_sq_ctx_s *)sq_ctx);
2040 return;
2041 }
2042
2043 seq_printf(m, "W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d\n",
2044 sq_ctx->sqe_way_mask, sq_ctx->cq);
2045 seq_printf(m, "W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x\n",
2046 sq_ctx->sdp_mcast, sq_ctx->substream);
2047 seq_printf(m, "W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n\n",
2048 sq_ctx->qint_idx, sq_ctx->ena);
2049
2050 seq_printf(m, "W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d\n",
2051 sq_ctx->sqb_count, sq_ctx->default_chan);
2052 seq_printf(m, "W1: smq_rr_quantum \t\t%d\nW1: sso_ena \t\t\t%d\n",
2053 sq_ctx->smq_rr_quantum, sq_ctx->sso_ena);
2054 seq_printf(m, "W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n\n",
2055 sq_ctx->xoff, sq_ctx->cq_ena, sq_ctx->smq);
2056
2057 seq_printf(m, "W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d\n",
2058 sq_ctx->sqe_stype, sq_ctx->sq_int_ena);
2059 seq_printf(m, "W2: sq_int \t\t\t%d\nW2: sqb_aura \t\t\t%d\n",
2060 sq_ctx->sq_int, sq_ctx->sqb_aura);
2061 seq_printf(m, "W2: smq_rr_count \t\t%d\n\n", sq_ctx->smq_rr_count);
2062
2063 seq_printf(m, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d\n",
2064 sq_ctx->smq_next_sq_vld, sq_ctx->smq_pend);
2065 seq_printf(m, "W3: smenq_next_sqb_vld \t\t%d\nW3: head_offset\t\t\t%d\n",
2066 sq_ctx->smenq_next_sqb_vld, sq_ctx->head_offset);
2067 seq_printf(m, "W3: smenq_offset\t\t%d\nW3: tail_offset\t\t\t%d\n",
2068 sq_ctx->smenq_offset, sq_ctx->tail_offset);
2069 seq_printf(m, "W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq\t\t\t%d\n",
2070 sq_ctx->smq_lso_segnum, sq_ctx->smq_next_sq);
2071 seq_printf(m, "W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d\n",
2072 sq_ctx->mnq_dis, sq_ctx->lmt_dis);
2073 seq_printf(m, "W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n\n",
2074 sq_ctx->cq_limit, sq_ctx->max_sqe_size);
2075
2076 seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);
2077 seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);
2078 seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);
2079 seq_printf(m, "W7: smenq_next_sqb \t\t%llx\n\n",
2080 sq_ctx->smenq_next_sqb);
2081
2082 seq_printf(m, "W8: head_sqb\t\t\t%llx\n\n", sq_ctx->head_sqb);
2083
2084 seq_printf(m, "W9: vfi_lso_vld\t\t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d\n",
2085 sq_ctx->vfi_lso_vld, sq_ctx->vfi_lso_vlan1_ins_ena);
2086 seq_printf(m, "W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d\n",
2087 sq_ctx->vfi_lso_vlan0_ins_ena, sq_ctx->vfi_lso_mps);
2088 seq_printf(m, "W9: vfi_lso_sb\t\t\t%d\nW9: vfi_lso_sizem1\t\t%d\n",
2089 sq_ctx->vfi_lso_sb, sq_ctx->vfi_lso_sizem1);
2090 seq_printf(m, "W9: vfi_lso_total\t\t%d\n\n", sq_ctx->vfi_lso_total);
2091
2092 seq_printf(m, "W10: scm_lso_rem \t\t%llu\n\n",
2093 (u64)sq_ctx->scm_lso_rem);
2094 seq_printf(m, "W11: octs \t\t\t%llu\n\n", (u64)sq_ctx->octs);
2095 seq_printf(m, "W12: pkts \t\t\t%llu\n\n", (u64)sq_ctx->pkts);
2096 seq_printf(m, "W14: dropped_octs \t\t%llu\n\n",
2097 (u64)sq_ctx->dropped_octs);
2098 seq_printf(m, "W15: dropped_pkts \t\t%llu\n\n",
2099 (u64)sq_ctx->dropped_pkts);
2100 }
2101
print_nix_cn10k_rq_ctx(struct seq_file * m,struct nix_cn10k_rq_ctx_s * rq_ctx)2102 static void print_nix_cn10k_rq_ctx(struct seq_file *m,
2103 struct nix_cn10k_rq_ctx_s *rq_ctx)
2104 {
2105 seq_printf(m, "W0: ena \t\t\t%d\nW0: sso_ena \t\t\t%d\n",
2106 rq_ctx->ena, rq_ctx->sso_ena);
2107 seq_printf(m, "W0: ipsech_ena \t\t\t%d\nW0: ena_wqwd \t\t\t%d\n",
2108 rq_ctx->ipsech_ena, rq_ctx->ena_wqwd);
2109 seq_printf(m, "W0: cq \t\t\t\t%d\nW0: lenerr_dis \t\t\t%d\n",
2110 rq_ctx->cq, rq_ctx->lenerr_dis);
2111 seq_printf(m, "W0: csum_il4_dis \t\t%d\nW0: csum_ol4_dis \t\t%d\n",
2112 rq_ctx->csum_il4_dis, rq_ctx->csum_ol4_dis);
2113 seq_printf(m, "W0: len_il4_dis \t\t%d\nW0: len_il3_dis \t\t%d\n",
2114 rq_ctx->len_il4_dis, rq_ctx->len_il3_dis);
2115 seq_printf(m, "W0: len_ol4_dis \t\t%d\nW0: len_ol3_dis \t\t%d\n",
2116 rq_ctx->len_ol4_dis, rq_ctx->len_ol3_dis);
2117 seq_printf(m, "W0: wqe_aura \t\t\t%d\n\n", rq_ctx->wqe_aura);
2118
2119 seq_printf(m, "W1: spb_aura \t\t\t%d\nW1: lpb_aura \t\t\t%d\n",
2120 rq_ctx->spb_aura, rq_ctx->lpb_aura);
2121 seq_printf(m, "W1: spb_aura \t\t\t%d\n", rq_ctx->spb_aura);
2122 seq_printf(m, "W1: sso_grp \t\t\t%d\nW1: sso_tt \t\t\t%d\n",
2123 rq_ctx->sso_grp, rq_ctx->sso_tt);
2124 seq_printf(m, "W1: pb_caching \t\t\t%d\nW1: wqe_caching \t\t%d\n",
2125 rq_ctx->pb_caching, rq_ctx->wqe_caching);
2126 seq_printf(m, "W1: xqe_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d\n",
2127 rq_ctx->xqe_drop_ena, rq_ctx->spb_drop_ena);
2128 seq_printf(m, "W1: lpb_drop_ena \t\t%d\nW1: pb_stashing \t\t%d\n",
2129 rq_ctx->lpb_drop_ena, rq_ctx->pb_stashing);
2130 seq_printf(m, "W1: ipsecd_drop_ena \t\t%d\nW1: chi_ena \t\t\t%d\n\n",
2131 rq_ctx->ipsecd_drop_ena, rq_ctx->chi_ena);
2132
2133 seq_printf(m, "W2: band_prof_id \t\t%d\n",
2134 (u16)rq_ctx->band_prof_id_h << 10 | rq_ctx->band_prof_id);
2135
2136 seq_printf(m, "W2: policer_ena \t\t%d\n", rq_ctx->policer_ena);
2137 seq_printf(m, "W2: spb_sizem1 \t\t\t%d\n", rq_ctx->spb_sizem1);
2138 seq_printf(m, "W2: wqe_skip \t\t\t%d\nW2: sqb_ena \t\t\t%d\n",
2139 rq_ctx->wqe_skip, rq_ctx->spb_ena);
2140 seq_printf(m, "W2: lpb_size1 \t\t\t%d\nW2: first_skip \t\t\t%d\n",
2141 rq_ctx->lpb_sizem1, rq_ctx->first_skip);
2142 seq_printf(m, "W2: later_skip\t\t\t%d\nW2: xqe_imm_size\t\t%d\n",
2143 rq_ctx->later_skip, rq_ctx->xqe_imm_size);
2144 seq_printf(m, "W2: xqe_imm_copy \t\t%d\nW2: xqe_hdr_split \t\t%d\n\n",
2145 rq_ctx->xqe_imm_copy, rq_ctx->xqe_hdr_split);
2146
2147 seq_printf(m, "W3: xqe_drop \t\t\t%d\nW3: xqe_pass \t\t\t%d\n",
2148 rq_ctx->xqe_drop, rq_ctx->xqe_pass);
2149 seq_printf(m, "W3: wqe_pool_drop \t\t%d\nW3: wqe_pool_pass \t\t%d\n",
2150 rq_ctx->wqe_pool_drop, rq_ctx->wqe_pool_pass);
2151 seq_printf(m, "W3: spb_pool_drop \t\t%d\nW3: spb_pool_pass \t\t%d\n",
2152 rq_ctx->spb_pool_drop, rq_ctx->spb_pool_pass);
2153 seq_printf(m, "W3: spb_aura_drop \t\t%d\nW3: spb_aura_pass \t\t%d\n\n",
2154 rq_ctx->spb_aura_pass, rq_ctx->spb_aura_drop);
2155
2156 seq_printf(m, "W4: lpb_aura_drop \t\t%d\nW3: lpb_aura_pass \t\t%d\n",
2157 rq_ctx->lpb_aura_pass, rq_ctx->lpb_aura_drop);
2158 seq_printf(m, "W4: lpb_pool_drop \t\t%d\nW3: lpb_pool_pass \t\t%d\n",
2159 rq_ctx->lpb_pool_drop, rq_ctx->lpb_pool_pass);
2160 seq_printf(m, "W4: rq_int \t\t\t%d\nW4: rq_int_ena\t\t\t%d\n",
2161 rq_ctx->rq_int, rq_ctx->rq_int_ena);
2162 seq_printf(m, "W4: qint_idx \t\t\t%d\n\n", rq_ctx->qint_idx);
2163
2164 seq_printf(m, "W5: ltag \t\t\t%d\nW5: good_utag \t\t\t%d\n",
2165 rq_ctx->ltag, rq_ctx->good_utag);
2166 seq_printf(m, "W5: bad_utag \t\t\t%d\nW5: flow_tagw \t\t\t%d\n",
2167 rq_ctx->bad_utag, rq_ctx->flow_tagw);
2168 seq_printf(m, "W5: ipsec_vwqe \t\t\t%d\nW5: vwqe_ena \t\t\t%d\n",
2169 rq_ctx->ipsec_vwqe, rq_ctx->vwqe_ena);
2170 seq_printf(m, "W5: vwqe_wait \t\t\t%d\nW5: max_vsize_exp\t\t%d\n",
2171 rq_ctx->vwqe_wait, rq_ctx->max_vsize_exp);
2172 seq_printf(m, "W5: vwqe_skip \t\t\t%d\n\n", rq_ctx->vwqe_skip);
2173
2174 seq_printf(m, "W6: octs \t\t\t%llu\n\n", (u64)rq_ctx->octs);
2175 seq_printf(m, "W7: pkts \t\t\t%llu\n\n", (u64)rq_ctx->pkts);
2176 seq_printf(m, "W8: drop_octs \t\t\t%llu\n\n", (u64)rq_ctx->drop_octs);
2177 seq_printf(m, "W9: drop_pkts \t\t\t%llu\n\n", (u64)rq_ctx->drop_pkts);
2178 seq_printf(m, "W10: re_pkts \t\t\t%llu\n", (u64)rq_ctx->re_pkts);
2179 }
2180
2181 /* Dumps given nix_rq's context */
print_nix_rq_ctx(struct seq_file * m,struct nix_aq_enq_rsp * rsp)2182 static void print_nix_rq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)
2183 {
2184 struct nix_rq_ctx_s *rq_ctx = &rsp->rq;
2185 struct nix_hw *nix_hw = m->private;
2186 struct rvu *rvu = nix_hw->rvu;
2187
2188 if (!is_rvu_otx2(rvu)) {
2189 print_nix_cn10k_rq_ctx(m, (struct nix_cn10k_rq_ctx_s *)rq_ctx);
2190 return;
2191 }
2192
2193 seq_printf(m, "W0: wqe_aura \t\t\t%d\nW0: substream \t\t\t0x%03x\n",
2194 rq_ctx->wqe_aura, rq_ctx->substream);
2195 seq_printf(m, "W0: cq \t\t\t\t%d\nW0: ena_wqwd \t\t\t%d\n",
2196 rq_ctx->cq, rq_ctx->ena_wqwd);
2197 seq_printf(m, "W0: ipsech_ena \t\t\t%d\nW0: sso_ena \t\t\t%d\n",
2198 rq_ctx->ipsech_ena, rq_ctx->sso_ena);
2199 seq_printf(m, "W0: ena \t\t\t%d\n\n", rq_ctx->ena);
2200
2201 seq_printf(m, "W1: lpb_drop_ena \t\t%d\nW1: spb_drop_ena \t\t%d\n",
2202 rq_ctx->lpb_drop_ena, rq_ctx->spb_drop_ena);
2203 seq_printf(m, "W1: xqe_drop_ena \t\t%d\nW1: wqe_caching \t\t%d\n",
2204 rq_ctx->xqe_drop_ena, rq_ctx->wqe_caching);
2205 seq_printf(m, "W1: pb_caching \t\t\t%d\nW1: sso_tt \t\t\t%d\n",
2206 rq_ctx->pb_caching, rq_ctx->sso_tt);
2207 seq_printf(m, "W1: sso_grp \t\t\t%d\nW1: lpb_aura \t\t\t%d\n",
2208 rq_ctx->sso_grp, rq_ctx->lpb_aura);
2209 seq_printf(m, "W1: spb_aura \t\t\t%d\n\n", rq_ctx->spb_aura);
2210
2211 seq_printf(m, "W2: xqe_hdr_split \t\t%d\nW2: xqe_imm_copy \t\t%d\n",
2212 rq_ctx->xqe_hdr_split, rq_ctx->xqe_imm_copy);
2213 seq_printf(m, "W2: xqe_imm_size \t\t%d\nW2: later_skip \t\t\t%d\n",
2214 rq_ctx->xqe_imm_size, rq_ctx->later_skip);
2215 seq_printf(m, "W2: first_skip \t\t\t%d\nW2: lpb_sizem1 \t\t\t%d\n",
2216 rq_ctx->first_skip, rq_ctx->lpb_sizem1);
2217 seq_printf(m, "W2: spb_ena \t\t\t%d\nW2: wqe_skip \t\t\t%d\n",
2218 rq_ctx->spb_ena, rq_ctx->wqe_skip);
2219 seq_printf(m, "W2: spb_sizem1 \t\t\t%d\n\n", rq_ctx->spb_sizem1);
2220
2221 seq_printf(m, "W3: spb_pool_pass \t\t%d\nW3: spb_pool_drop \t\t%d\n",
2222 rq_ctx->spb_pool_pass, rq_ctx->spb_pool_drop);
2223 seq_printf(m, "W3: spb_aura_pass \t\t%d\nW3: spb_aura_drop \t\t%d\n",
2224 rq_ctx->spb_aura_pass, rq_ctx->spb_aura_drop);
2225 seq_printf(m, "W3: wqe_pool_pass \t\t%d\nW3: wqe_pool_drop \t\t%d\n",
2226 rq_ctx->wqe_pool_pass, rq_ctx->wqe_pool_drop);
2227 seq_printf(m, "W3: xqe_pass \t\t\t%d\nW3: xqe_drop \t\t\t%d\n\n",
2228 rq_ctx->xqe_pass, rq_ctx->xqe_drop);
2229
2230 seq_printf(m, "W4: qint_idx \t\t\t%d\nW4: rq_int_ena \t\t\t%d\n",
2231 rq_ctx->qint_idx, rq_ctx->rq_int_ena);
2232 seq_printf(m, "W4: rq_int \t\t\t%d\nW4: lpb_pool_pass \t\t%d\n",
2233 rq_ctx->rq_int, rq_ctx->lpb_pool_pass);
2234 seq_printf(m, "W4: lpb_pool_drop \t\t%d\nW4: lpb_aura_pass \t\t%d\n",
2235 rq_ctx->lpb_pool_drop, rq_ctx->lpb_aura_pass);
2236 seq_printf(m, "W4: lpb_aura_drop \t\t%d\n\n", rq_ctx->lpb_aura_drop);
2237
2238 seq_printf(m, "W5: flow_tagw \t\t\t%d\nW5: bad_utag \t\t\t%d\n",
2239 rq_ctx->flow_tagw, rq_ctx->bad_utag);
2240 seq_printf(m, "W5: good_utag \t\t\t%d\nW5: ltag \t\t\t%d\n\n",
2241 rq_ctx->good_utag, rq_ctx->ltag);
2242
2243 seq_printf(m, "W6: octs \t\t\t%llu\n\n", (u64)rq_ctx->octs);
2244 seq_printf(m, "W7: pkts \t\t\t%llu\n\n", (u64)rq_ctx->pkts);
2245 seq_printf(m, "W8: drop_octs \t\t\t%llu\n\n", (u64)rq_ctx->drop_octs);
2246 seq_printf(m, "W9: drop_pkts \t\t\t%llu\n\n", (u64)rq_ctx->drop_pkts);
2247 seq_printf(m, "W10: re_pkts \t\t\t%llu\n", (u64)rq_ctx->re_pkts);
2248 }
2249
2250 /* Dumps given nix_cq's context */
print_nix_cq_ctx(struct seq_file * m,struct nix_aq_enq_rsp * rsp)2251 static void print_nix_cq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)
2252 {
2253 struct nix_cq_ctx_s *cq_ctx = &rsp->cq;
2254 struct nix_hw *nix_hw = m->private;
2255 struct rvu *rvu = nix_hw->rvu;
2256
2257 if (is_cn20k(rvu->pdev)) {
2258 print_nix_cn20k_cq_ctx(m, (struct nix_cn20k_aq_enq_rsp *)rsp);
2259 return;
2260 }
2261
2262 seq_printf(m, "W0: base \t\t\t%llx\n\n", cq_ctx->base);
2263
2264 seq_printf(m, "W1: wrptr \t\t\t%llx\n", (u64)cq_ctx->wrptr);
2265 seq_printf(m, "W1: avg_con \t\t\t%d\nW1: cint_idx \t\t\t%d\n",
2266 cq_ctx->avg_con, cq_ctx->cint_idx);
2267 seq_printf(m, "W1: cq_err \t\t\t%d\nW1: qint_idx \t\t\t%d\n",
2268 cq_ctx->cq_err, cq_ctx->qint_idx);
2269 seq_printf(m, "W1: bpid \t\t\t%d\nW1: bp_ena \t\t\t%d\n\n",
2270 cq_ctx->bpid, cq_ctx->bp_ena);
2271
2272 if (!is_rvu_otx2(rvu)) {
2273 seq_printf(m, "W1: lbpid_high \t\t\t0x%03x\n", cq_ctx->lbpid_high);
2274 seq_printf(m, "W1: lbpid_med \t\t\t0x%03x\n", cq_ctx->lbpid_med);
2275 seq_printf(m, "W1: lbpid_low \t\t\t0x%03x\n", cq_ctx->lbpid_low);
2276 seq_printf(m, "(W1: lbpid) \t\t\t0x%03x\n",
2277 cq_ctx->lbpid_high << 6 | cq_ctx->lbpid_med << 3 |
2278 cq_ctx->lbpid_low);
2279 seq_printf(m, "W1: lbp_ena \t\t\t\t%d\n\n", cq_ctx->lbp_ena);
2280 }
2281
2282 seq_printf(m, "W2: update_time \t\t%d\nW2:avg_level \t\t\t%d\n",
2283 cq_ctx->update_time, cq_ctx->avg_level);
2284 seq_printf(m, "W2: head \t\t\t%d\nW2:tail \t\t\t%d\n\n",
2285 cq_ctx->head, cq_ctx->tail);
2286
2287 seq_printf(m, "W3: cq_err_int_ena \t\t%d\nW3:cq_err_int \t\t\t%d\n",
2288 cq_ctx->cq_err_int_ena, cq_ctx->cq_err_int);
2289 seq_printf(m, "W3: qsize \t\t\t%d\nW3:caching \t\t\t%d\n",
2290 cq_ctx->qsize, cq_ctx->caching);
2291
2292 seq_printf(m, "W3: substream \t\t\t0x%03x\nW3: ena \t\t\t%d\n",
2293 cq_ctx->substream, cq_ctx->ena);
2294 if (!is_rvu_otx2(rvu)) {
2295 seq_printf(m, "W3: lbp_frac \t\t\t%d\n", cq_ctx->lbp_frac);
2296 seq_printf(m, "W3: cpt_drop_err_en \t\t\t%d\n",
2297 cq_ctx->cpt_drop_err_en);
2298 }
2299 seq_printf(m, "W3: drop_ena \t\t\t%d\nW3: drop \t\t\t%d\n",
2300 cq_ctx->drop_ena, cq_ctx->drop);
2301 seq_printf(m, "W3: bp \t\t\t\t%d\n\n", cq_ctx->bp);
2302 }
2303
rvu_dbg_nix_queue_ctx_display(struct seq_file * filp,void * unused,int ctype)2304 static int rvu_dbg_nix_queue_ctx_display(struct seq_file *filp,
2305 void *unused, int ctype)
2306 {
2307 void (*print_nix_ctx)(struct seq_file *filp,
2308 struct nix_aq_enq_rsp *rsp) = NULL;
2309 struct nix_hw *nix_hw = filp->private;
2310 struct rvu *rvu = nix_hw->rvu;
2311 struct nix_aq_enq_req aq_req;
2312 struct nix_aq_enq_rsp rsp;
2313 char *ctype_string = NULL;
2314 int qidx, rc, max_id = 0;
2315 struct rvu_pfvf *pfvf;
2316 int nixlf, id, all;
2317 u16 pcifunc;
2318
2319 switch (ctype) {
2320 case NIX_AQ_CTYPE_CQ:
2321 nixlf = rvu->rvu_dbg.nix_cq_ctx.lf;
2322 id = rvu->rvu_dbg.nix_cq_ctx.id;
2323 all = rvu->rvu_dbg.nix_cq_ctx.all;
2324 break;
2325
2326 case NIX_AQ_CTYPE_SQ:
2327 nixlf = rvu->rvu_dbg.nix_sq_ctx.lf;
2328 id = rvu->rvu_dbg.nix_sq_ctx.id;
2329 all = rvu->rvu_dbg.nix_sq_ctx.all;
2330 break;
2331
2332 case NIX_AQ_CTYPE_RQ:
2333 nixlf = rvu->rvu_dbg.nix_rq_ctx.lf;
2334 id = rvu->rvu_dbg.nix_rq_ctx.id;
2335 all = rvu->rvu_dbg.nix_rq_ctx.all;
2336 break;
2337
2338 default:
2339 return -EINVAL;
2340 }
2341
2342 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
2343 return -EINVAL;
2344
2345 pfvf = rvu_get_pfvf(rvu, pcifunc);
2346 if (ctype == NIX_AQ_CTYPE_SQ && !pfvf->sq_ctx) {
2347 seq_puts(filp, "SQ context is not initialized\n");
2348 return -EINVAL;
2349 } else if (ctype == NIX_AQ_CTYPE_RQ && !pfvf->rq_ctx) {
2350 seq_puts(filp, "RQ context is not initialized\n");
2351 return -EINVAL;
2352 } else if (ctype == NIX_AQ_CTYPE_CQ && !pfvf->cq_ctx) {
2353 seq_puts(filp, "CQ context is not initialized\n");
2354 return -EINVAL;
2355 }
2356
2357 if (ctype == NIX_AQ_CTYPE_SQ) {
2358 max_id = pfvf->sq_ctx->qsize;
2359 ctype_string = "sq";
2360 print_nix_ctx = print_nix_sq_ctx;
2361 } else if (ctype == NIX_AQ_CTYPE_RQ) {
2362 max_id = pfvf->rq_ctx->qsize;
2363 ctype_string = "rq";
2364 print_nix_ctx = print_nix_rq_ctx;
2365 } else if (ctype == NIX_AQ_CTYPE_CQ) {
2366 max_id = pfvf->cq_ctx->qsize;
2367 ctype_string = "cq";
2368 print_nix_ctx = print_nix_cq_ctx;
2369 }
2370
2371 memset(&aq_req, 0, sizeof(struct nix_aq_enq_req));
2372 aq_req.hdr.pcifunc = pcifunc;
2373 aq_req.ctype = ctype;
2374 aq_req.op = NIX_AQ_INSTOP_READ;
2375 if (all)
2376 id = 0;
2377 else
2378 max_id = id + 1;
2379 for (qidx = id; qidx < max_id; qidx++) {
2380 aq_req.qidx = qidx;
2381 seq_printf(filp, "=====%s_ctx for nixlf:%d and qidx:%d is=====\n",
2382 ctype_string, nixlf, aq_req.qidx);
2383 rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);
2384 if (rc) {
2385 seq_puts(filp, "Failed to read the context\n");
2386 return -EINVAL;
2387 }
2388 print_nix_ctx(filp, &rsp);
2389 }
2390 return 0;
2391 }
2392
write_nix_queue_ctx(struct rvu * rvu,bool all,int nixlf,int id,int ctype,char * ctype_string,struct seq_file * m)2393 static int write_nix_queue_ctx(struct rvu *rvu, bool all, int nixlf,
2394 int id, int ctype, char *ctype_string,
2395 struct seq_file *m)
2396 {
2397 struct nix_hw *nix_hw = m->private;
2398 struct rvu_pfvf *pfvf;
2399 int max_id = 0;
2400 u16 pcifunc;
2401
2402 if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))
2403 return -EINVAL;
2404
2405 pfvf = rvu_get_pfvf(rvu, pcifunc);
2406
2407 if (ctype == NIX_AQ_CTYPE_SQ) {
2408 if (!pfvf->sq_ctx) {
2409 dev_warn(rvu->dev, "SQ context is not initialized\n");
2410 return -EINVAL;
2411 }
2412 max_id = pfvf->sq_ctx->qsize;
2413 } else if (ctype == NIX_AQ_CTYPE_RQ) {
2414 if (!pfvf->rq_ctx) {
2415 dev_warn(rvu->dev, "RQ context is not initialized\n");
2416 return -EINVAL;
2417 }
2418 max_id = pfvf->rq_ctx->qsize;
2419 } else if (ctype == NIX_AQ_CTYPE_CQ) {
2420 if (!pfvf->cq_ctx) {
2421 dev_warn(rvu->dev, "CQ context is not initialized\n");
2422 return -EINVAL;
2423 }
2424 max_id = pfvf->cq_ctx->qsize;
2425 }
2426
2427 if (id < 0 || id >= max_id) {
2428 dev_warn(rvu->dev, "Invalid %s_ctx valid range 0-%d\n",
2429 ctype_string, max_id - 1);
2430 return -EINVAL;
2431 }
2432 switch (ctype) {
2433 case NIX_AQ_CTYPE_CQ:
2434 rvu->rvu_dbg.nix_cq_ctx.lf = nixlf;
2435 rvu->rvu_dbg.nix_cq_ctx.id = id;
2436 rvu->rvu_dbg.nix_cq_ctx.all = all;
2437 break;
2438
2439 case NIX_AQ_CTYPE_SQ:
2440 rvu->rvu_dbg.nix_sq_ctx.lf = nixlf;
2441 rvu->rvu_dbg.nix_sq_ctx.id = id;
2442 rvu->rvu_dbg.nix_sq_ctx.all = all;
2443 break;
2444
2445 case NIX_AQ_CTYPE_RQ:
2446 rvu->rvu_dbg.nix_rq_ctx.lf = nixlf;
2447 rvu->rvu_dbg.nix_rq_ctx.id = id;
2448 rvu->rvu_dbg.nix_rq_ctx.all = all;
2449 break;
2450 default:
2451 return -EINVAL;
2452 }
2453 return 0;
2454 }
2455
rvu_dbg_nix_queue_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos,int ctype)2456 static ssize_t rvu_dbg_nix_queue_ctx_write(struct file *filp,
2457 const char __user *buffer,
2458 size_t count, loff_t *ppos,
2459 int ctype)
2460 {
2461 struct seq_file *m = filp->private_data;
2462 struct nix_hw *nix_hw = m->private;
2463 struct rvu *rvu = nix_hw->rvu;
2464 char *cmd_buf, *ctype_string;
2465 int nixlf, id = 0, ret;
2466 bool all = false;
2467
2468 if ((*ppos != 0) || !count)
2469 return -EINVAL;
2470
2471 switch (ctype) {
2472 case NIX_AQ_CTYPE_SQ:
2473 ctype_string = "sq";
2474 break;
2475 case NIX_AQ_CTYPE_RQ:
2476 ctype_string = "rq";
2477 break;
2478 case NIX_AQ_CTYPE_CQ:
2479 ctype_string = "cq";
2480 break;
2481 default:
2482 return -EINVAL;
2483 }
2484
2485 cmd_buf = kzalloc(count + 1, GFP_KERNEL);
2486
2487 if (!cmd_buf)
2488 return count;
2489
2490 ret = parse_cmd_buffer_ctx(cmd_buf, &count, buffer,
2491 &nixlf, &id, &all);
2492 if (ret < 0) {
2493 dev_info(rvu->dev,
2494 "Usage: echo <nixlf> [%s number/all] > %s_ctx\n",
2495 ctype_string, ctype_string);
2496 goto done;
2497 } else {
2498 ret = write_nix_queue_ctx(rvu, all, nixlf, id, ctype,
2499 ctype_string, m);
2500 }
2501 done:
2502 kfree(cmd_buf);
2503 return ret ? ret : count;
2504 }
2505
rvu_dbg_nix_sq_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2506 static ssize_t rvu_dbg_nix_sq_ctx_write(struct file *filp,
2507 const char __user *buffer,
2508 size_t count, loff_t *ppos)
2509 {
2510 return rvu_dbg_nix_queue_ctx_write(filp, buffer, count, ppos,
2511 NIX_AQ_CTYPE_SQ);
2512 }
2513
rvu_dbg_nix_sq_ctx_display(struct seq_file * filp,void * unused)2514 static int rvu_dbg_nix_sq_ctx_display(struct seq_file *filp, void *unused)
2515 {
2516 return rvu_dbg_nix_queue_ctx_display(filp, unused, NIX_AQ_CTYPE_SQ);
2517 }
2518
2519 RVU_DEBUG_SEQ_FOPS(nix_sq_ctx, nix_sq_ctx_display, nix_sq_ctx_write);
2520
rvu_dbg_nix_rq_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2521 static ssize_t rvu_dbg_nix_rq_ctx_write(struct file *filp,
2522 const char __user *buffer,
2523 size_t count, loff_t *ppos)
2524 {
2525 return rvu_dbg_nix_queue_ctx_write(filp, buffer, count, ppos,
2526 NIX_AQ_CTYPE_RQ);
2527 }
2528
rvu_dbg_nix_rq_ctx_display(struct seq_file * filp,void * unused)2529 static int rvu_dbg_nix_rq_ctx_display(struct seq_file *filp, void *unused)
2530 {
2531 return rvu_dbg_nix_queue_ctx_display(filp, unused, NIX_AQ_CTYPE_RQ);
2532 }
2533
2534 RVU_DEBUG_SEQ_FOPS(nix_rq_ctx, nix_rq_ctx_display, nix_rq_ctx_write);
2535
rvu_dbg_nix_cq_ctx_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2536 static ssize_t rvu_dbg_nix_cq_ctx_write(struct file *filp,
2537 const char __user *buffer,
2538 size_t count, loff_t *ppos)
2539 {
2540 return rvu_dbg_nix_queue_ctx_write(filp, buffer, count, ppos,
2541 NIX_AQ_CTYPE_CQ);
2542 }
2543
rvu_dbg_nix_cq_ctx_display(struct seq_file * filp,void * unused)2544 static int rvu_dbg_nix_cq_ctx_display(struct seq_file *filp, void *unused)
2545 {
2546 return rvu_dbg_nix_queue_ctx_display(filp, unused, NIX_AQ_CTYPE_CQ);
2547 }
2548
2549 RVU_DEBUG_SEQ_FOPS(nix_cq_ctx, nix_cq_ctx_display, nix_cq_ctx_write);
2550
print_nix_qctx_qsize(struct seq_file * filp,int qsize,unsigned long * bmap,char * qtype)2551 static void print_nix_qctx_qsize(struct seq_file *filp, int qsize,
2552 unsigned long *bmap, char *qtype)
2553 {
2554 seq_printf(filp, "%s context count : %d\n", qtype, qsize);
2555 seq_printf(filp, "%s context ena/dis bitmap : %*pb\n", qtype, qsize, bmap);
2556 }
2557
print_nix_qsize(struct seq_file * filp,struct rvu_pfvf * pfvf)2558 static void print_nix_qsize(struct seq_file *filp, struct rvu_pfvf *pfvf)
2559 {
2560 if (!pfvf->cq_ctx)
2561 seq_puts(filp, "cq context is not initialized\n");
2562 else
2563 print_nix_qctx_qsize(filp, pfvf->cq_ctx->qsize, pfvf->cq_bmap,
2564 "cq");
2565
2566 if (!pfvf->rq_ctx)
2567 seq_puts(filp, "rq context is not initialized\n");
2568 else
2569 print_nix_qctx_qsize(filp, pfvf->rq_ctx->qsize, pfvf->rq_bmap,
2570 "rq");
2571
2572 if (!pfvf->sq_ctx)
2573 seq_puts(filp, "sq context is not initialized\n");
2574 else
2575 print_nix_qctx_qsize(filp, pfvf->sq_ctx->qsize, pfvf->sq_bmap,
2576 "sq");
2577 }
2578
rvu_dbg_nix_qsize_write(struct file * filp,const char __user * buffer,size_t count,loff_t * ppos)2579 static ssize_t rvu_dbg_nix_qsize_write(struct file *filp,
2580 const char __user *buffer,
2581 size_t count, loff_t *ppos)
2582 {
2583 return rvu_dbg_qsize_write(filp, buffer, count, ppos,
2584 BLKTYPE_NIX);
2585 }
2586
rvu_dbg_nix_qsize_display(struct seq_file * filp,void * unused)2587 static int rvu_dbg_nix_qsize_display(struct seq_file *filp, void *unused)
2588 {
2589 return rvu_dbg_qsize_display(filp, unused, BLKTYPE_NIX);
2590 }
2591
2592 RVU_DEBUG_SEQ_FOPS(nix_qsize, nix_qsize_display, nix_qsize_write);
2593
print_band_prof_ctx(struct seq_file * m,struct nix_bandprof_s * prof)2594 static void print_band_prof_ctx(struct seq_file *m,
2595 struct nix_bandprof_s *prof)
2596 {
2597 char *str;
2598
2599 switch (prof->pc_mode) {
2600 case NIX_RX_PC_MODE_VLAN:
2601 str = "VLAN";
2602 break;
2603 case NIX_RX_PC_MODE_DSCP:
2604 str = "DSCP";
2605 break;
2606 case NIX_RX_PC_MODE_GEN:
2607 str = "Generic";
2608 break;
2609 case NIX_RX_PC_MODE_RSVD:
2610 str = "Reserved";
2611 break;
2612 }
2613 seq_printf(m, "W0: pc_mode\t\t%s\n", str);
2614 str = (prof->icolor == 3) ? "Color blind" :
2615 (prof->icolor == 0) ? "Green" :
2616 (prof->icolor == 1) ? "Yellow" : "Red";
2617 seq_printf(m, "W0: icolor\t\t%s\n", str);
2618 seq_printf(m, "W0: tnl_ena\t\t%d\n", prof->tnl_ena);
2619 seq_printf(m, "W0: peir_exponent\t%d\n", prof->peir_exponent);
2620 seq_printf(m, "W0: pebs_exponent\t%d\n", prof->pebs_exponent);
2621 seq_printf(m, "W0: cir_exponent\t%d\n", prof->cir_exponent);
2622 seq_printf(m, "W0: cbs_exponent\t%d\n", prof->cbs_exponent);
2623 seq_printf(m, "W0: peir_mantissa\t%d\n", prof->peir_mantissa);
2624 seq_printf(m, "W0: pebs_mantissa\t%d\n", prof->pebs_mantissa);
2625 seq_printf(m, "W0: cir_mantissa\t%d\n", prof->cir_mantissa);
2626
2627 seq_printf(m, "W1: cbs_mantissa\t%d\n", prof->cbs_mantissa);
2628 str = (prof->lmode == 0) ? "byte" : "packet";
2629 seq_printf(m, "W1: lmode\t\t%s\n", str);
2630 seq_printf(m, "W1: l_select\t\t%d\n", prof->l_sellect);
2631 seq_printf(m, "W1: rdiv\t\t%d\n", prof->rdiv);
2632 seq_printf(m, "W1: adjust_exponent\t%d\n", prof->adjust_exponent);
2633 seq_printf(m, "W1: adjust_mantissa\t%d\n", prof->adjust_mantissa);
2634 str = (prof->gc_action == 0) ? "PASS" :
2635 (prof->gc_action == 1) ? "DROP" : "RED";
2636 seq_printf(m, "W1: gc_action\t\t%s\n", str);
2637 str = (prof->yc_action == 0) ? "PASS" :
2638 (prof->yc_action == 1) ? "DROP" : "RED";
2639 seq_printf(m, "W1: yc_action\t\t%s\n", str);
2640 str = (prof->rc_action == 0) ? "PASS" :
2641 (prof->rc_action == 1) ? "DROP" : "RED";
2642 seq_printf(m, "W1: rc_action\t\t%s\n", str);
2643 seq_printf(m, "W1: meter_algo\t\t%d\n", prof->meter_algo);
2644
2645 seq_printf(m, "W1: band_prof_id\t%d\n",
2646 (u16)prof->band_prof_id_h << 7 | prof->band_prof_id);
2647
2648 seq_printf(m, "W1: hl_en\t\t%d\n", prof->hl_en);
2649
2650 seq_printf(m, "W2: ts\t\t\t%lld\n", (u64)prof->ts);
2651 seq_printf(m, "W3: pe_accum\t\t%d\n", prof->pe_accum);
2652 seq_printf(m, "W3: c_accum\t\t%d\n", prof->c_accum);
2653 seq_printf(m, "W4: green_pkt_pass\t%lld\n",
2654 (u64)prof->green_pkt_pass);
2655 seq_printf(m, "W5: yellow_pkt_pass\t%lld\n",
2656 (u64)prof->yellow_pkt_pass);
2657 seq_printf(m, "W6: red_pkt_pass\t%lld\n", (u64)prof->red_pkt_pass);
2658 seq_printf(m, "W7: green_octs_pass\t%lld\n",
2659 (u64)prof->green_octs_pass);
2660 seq_printf(m, "W8: yellow_octs_pass\t%lld\n",
2661 (u64)prof->yellow_octs_pass);
2662 seq_printf(m, "W9: red_octs_pass\t%lld\n", (u64)prof->red_octs_pass);
2663 seq_printf(m, "W10: green_pkt_drop\t%lld\n",
2664 (u64)prof->green_pkt_drop);
2665 seq_printf(m, "W11: yellow_pkt_drop\t%lld\n",
2666 (u64)prof->yellow_pkt_drop);
2667 seq_printf(m, "W12: red_pkt_drop\t%lld\n", (u64)prof->red_pkt_drop);
2668 seq_printf(m, "W13: green_octs_drop\t%lld\n",
2669 (u64)prof->green_octs_drop);
2670 seq_printf(m, "W14: yellow_octs_drop\t%lld\n",
2671 (u64)prof->yellow_octs_drop);
2672 seq_printf(m, "W15: red_octs_drop\t%lld\n", (u64)prof->red_octs_drop);
2673 seq_puts(m, "==============================\n");
2674 }
2675
rvu_dbg_nix_band_prof_ctx_display(struct seq_file * m,void * unused)2676 static int rvu_dbg_nix_band_prof_ctx_display(struct seq_file *m, void *unused)
2677 {
2678 struct nix_hw *nix_hw = m->private;
2679 struct nix_cn10k_aq_enq_req aq_req;
2680 struct nix_cn10k_aq_enq_rsp aq_rsp;
2681 struct rvu *rvu = nix_hw->rvu;
2682 struct nix_ipolicer *ipolicer;
2683 int layer, prof_idx, idx, rc;
2684 u16 pcifunc;
2685 char *str;
2686
2687 /* Ingress policers do not exist on all platforms */
2688 if (!nix_hw->ipolicer)
2689 return 0;
2690
2691 for (layer = 0; layer < BAND_PROF_NUM_LAYERS; layer++) {
2692 if (layer == BAND_PROF_INVAL_LAYER)
2693 continue;
2694 str = (layer == BAND_PROF_LEAF_LAYER) ? "Leaf" :
2695 (layer == BAND_PROF_MID_LAYER) ? "Mid" : "Top";
2696
2697 seq_printf(m, "\n%s bandwidth profiles\n", str);
2698 seq_puts(m, "=======================\n");
2699
2700 ipolicer = &nix_hw->ipolicer[layer];
2701
2702 for (idx = 0; idx < ipolicer->band_prof.max; idx++) {
2703 if (is_rsrc_free(&ipolicer->band_prof, idx))
2704 continue;
2705
2706 prof_idx = (idx & 0x3FFF) | (layer << 14);
2707 rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp,
2708 0x00, NIX_AQ_CTYPE_BANDPROF,
2709 prof_idx);
2710 if (rc) {
2711 dev_err(rvu->dev,
2712 "%s: Failed to fetch context of %s profile %d, err %d\n",
2713 __func__, str, idx, rc);
2714 return 0;
2715 }
2716 seq_printf(m, "\n%s bandwidth profile:: %d\n", str, idx);
2717 pcifunc = ipolicer->pfvf_map[idx];
2718 if (!(pcifunc & RVU_PFVF_FUNC_MASK))
2719 seq_printf(m, "Allocated to :: PF %d\n",
2720 rvu_get_pf(rvu->pdev, pcifunc));
2721 else
2722 seq_printf(m, "Allocated to :: PF %d VF %d\n",
2723 rvu_get_pf(rvu->pdev, pcifunc),
2724 (pcifunc & RVU_PFVF_FUNC_MASK) - 1);
2725 print_band_prof_ctx(m, &aq_rsp.prof);
2726 }
2727 }
2728 return 0;
2729 }
2730
2731 RVU_DEBUG_SEQ_FOPS(nix_band_prof_ctx, nix_band_prof_ctx_display, NULL);
2732
rvu_dbg_nix_band_prof_rsrc_display(struct seq_file * m,void * unused)2733 static int rvu_dbg_nix_band_prof_rsrc_display(struct seq_file *m, void *unused)
2734 {
2735 struct nix_hw *nix_hw = m->private;
2736 struct nix_ipolicer *ipolicer;
2737 int layer;
2738 char *str;
2739
2740 /* Ingress policers do not exist on all platforms */
2741 if (!nix_hw->ipolicer)
2742 return 0;
2743
2744 seq_puts(m, "\nBandwidth profile resource free count\n");
2745 seq_puts(m, "=====================================\n");
2746 for (layer = 0; layer < BAND_PROF_NUM_LAYERS; layer++) {
2747 if (layer == BAND_PROF_INVAL_LAYER)
2748 continue;
2749 str = (layer == BAND_PROF_LEAF_LAYER) ? "Leaf" :
2750 (layer == BAND_PROF_MID_LAYER) ? "Mid " : "Top ";
2751
2752 ipolicer = &nix_hw->ipolicer[layer];
2753 seq_printf(m, "%s :: Max: %4d Free: %4d\n", str,
2754 ipolicer->band_prof.max,
2755 rvu_rsrc_free_count(&ipolicer->band_prof));
2756 }
2757 seq_puts(m, "=====================================\n");
2758
2759 return 0;
2760 }
2761
2762 RVU_DEBUG_SEQ_FOPS(nix_band_prof_rsrc, nix_band_prof_rsrc_display, NULL);
2763
rvu_dbg_nix_init(struct rvu * rvu,int blkaddr)2764 static void rvu_dbg_nix_init(struct rvu *rvu, int blkaddr)
2765 {
2766 struct nix_hw *nix_hw;
2767
2768 if (!is_block_implemented(rvu->hw, blkaddr))
2769 return;
2770
2771 if (blkaddr == BLKADDR_NIX0) {
2772 rvu->rvu_dbg.nix = debugfs_create_dir("nix", rvu->rvu_dbg.root);
2773 nix_hw = &rvu->hw->nix[0];
2774 } else {
2775 rvu->rvu_dbg.nix = debugfs_create_dir("nix1",
2776 rvu->rvu_dbg.root);
2777 nix_hw = &rvu->hw->nix[1];
2778 }
2779
2780 debugfs_create_file("tm_tree", 0600, rvu->rvu_dbg.nix, nix_hw,
2781 &rvu_dbg_nix_tm_tree_fops);
2782 debugfs_create_file("tm_topo", 0600, rvu->rvu_dbg.nix, nix_hw,
2783 &rvu_dbg_nix_tm_topo_fops);
2784 debugfs_create_file("sq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2785 &rvu_dbg_nix_sq_ctx_fops);
2786 debugfs_create_file("rq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2787 &rvu_dbg_nix_rq_ctx_fops);
2788 debugfs_create_file("cq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2789 &rvu_dbg_nix_cq_ctx_fops);
2790 debugfs_create_file("ndc_tx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,
2791 &rvu_dbg_nix_ndc_tx_cache_fops);
2792 debugfs_create_file("ndc_rx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,
2793 &rvu_dbg_nix_ndc_rx_cache_fops);
2794 debugfs_create_file("ndc_tx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,
2795 &rvu_dbg_nix_ndc_tx_hits_miss_fops);
2796 debugfs_create_file("ndc_rx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,
2797 &rvu_dbg_nix_ndc_rx_hits_miss_fops);
2798 debugfs_create_file_aux_num("qsize", 0600, rvu->rvu_dbg.nix, rvu,
2799 blkaddr, &rvu_dbg_nix_qsize_fops);
2800 debugfs_create_file("ingress_policer_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,
2801 &rvu_dbg_nix_band_prof_ctx_fops);
2802 debugfs_create_file("ingress_policer_rsrc", 0600, rvu->rvu_dbg.nix, nix_hw,
2803 &rvu_dbg_nix_band_prof_rsrc_fops);
2804 }
2805
rvu_dbg_npa_init(struct rvu * rvu)2806 static void rvu_dbg_npa_init(struct rvu *rvu)
2807 {
2808 rvu->rvu_dbg.npa = debugfs_create_dir("npa", rvu->rvu_dbg.root);
2809
2810 debugfs_create_file("qsize", 0600, rvu->rvu_dbg.npa, rvu,
2811 &rvu_dbg_npa_qsize_fops);
2812 debugfs_create_file("aura_ctx", 0600, rvu->rvu_dbg.npa, rvu,
2813 &rvu_dbg_npa_aura_ctx_fops);
2814 debugfs_create_file("pool_ctx", 0600, rvu->rvu_dbg.npa, rvu,
2815 &rvu_dbg_npa_pool_ctx_fops);
2816
2817 if (is_cn20k(rvu->pdev)) /* NDC not appliable for cn20k */
2818 return;
2819 debugfs_create_file("ndc_cache", 0600, rvu->rvu_dbg.npa, rvu,
2820 &rvu_dbg_npa_ndc_cache_fops);
2821 debugfs_create_file("ndc_hits_miss", 0600, rvu->rvu_dbg.npa, rvu,
2822 &rvu_dbg_npa_ndc_hits_miss_fops);
2823 }
2824
2825 /* Per-lmac CGX debugfs files need both RVU and CGX handle; inode->i_private
2826 * points here so seq_file ops avoid pci_get_device(PCI_DEVID_OCTEONTX2_RVU_AF).
2827 */
2828 struct rvu_cgx_lmac_dbgfs_ctx {
2829 struct rvu *rvu;
2830 void *cgxd;
2831 };
2832
2833 #define PRINT_CGX_CUML_NIXRX_STATUS(idx, name) \
2834 ({ \
2835 u64 cnt; \
2836 err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \
2837 NIX_STATS_RX, &(cnt)); \
2838 if (!err) \
2839 seq_printf(s, "%s: %llu\n", name, cnt); \
2840 cnt; \
2841 })
2842
2843 #define PRINT_CGX_CUML_NIXTX_STATUS(idx, name) \
2844 ({ \
2845 u64 cnt; \
2846 err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \
2847 NIX_STATS_TX, &(cnt)); \
2848 if (!err) \
2849 seq_printf(s, "%s: %llu\n", name, cnt); \
2850 cnt; \
2851 })
2852
cgx_print_stats(struct seq_file * s,int lmac_id)2853 static int cgx_print_stats(struct seq_file *s, int lmac_id)
2854 {
2855 struct rvu_cgx_lmac_dbgfs_ctx *dctx = s->private;
2856 struct cgx_link_user_info linfo;
2857 struct rvu *rvu = dctx->rvu;
2858 struct mac_ops *mac_ops;
2859 void *cgxd = dctx->cgxd;
2860 u64 ucast, mcast, bcast;
2861 int stat = 0, err = 0;
2862 u64 tx_stat, rx_stat;
2863
2864 mac_ops = get_mac_ops(cgxd);
2865 /* There can be no CGX devices at all */
2866 if (!mac_ops)
2867 return 0;
2868
2869 /* Link status */
2870 seq_puts(s, "\n=======Link Status======\n\n");
2871 err = cgx_get_link_info(cgxd, lmac_id, &linfo);
2872 if (err)
2873 seq_puts(s, "Failed to read link status\n");
2874 seq_printf(s, "\nLink is %s %d Mbps\n\n",
2875 linfo.link_up ? "UP" : "DOWN", linfo.speed);
2876
2877 /* Rx stats */
2878 seq_printf(s, "\n=======NIX RX_STATS(%s port level)======\n\n",
2879 mac_ops->name);
2880 ucast = PRINT_CGX_CUML_NIXRX_STATUS(RX_UCAST, "rx_ucast_frames");
2881 if (err)
2882 return err;
2883 mcast = PRINT_CGX_CUML_NIXRX_STATUS(RX_MCAST, "rx_mcast_frames");
2884 if (err)
2885 return err;
2886 bcast = PRINT_CGX_CUML_NIXRX_STATUS(RX_BCAST, "rx_bcast_frames");
2887 if (err)
2888 return err;
2889 seq_printf(s, "rx_frames: %llu\n", ucast + mcast + bcast);
2890 PRINT_CGX_CUML_NIXRX_STATUS(RX_OCTS, "rx_bytes");
2891 if (err)
2892 return err;
2893 PRINT_CGX_CUML_NIXRX_STATUS(RX_DROP, "rx_drops");
2894 if (err)
2895 return err;
2896 PRINT_CGX_CUML_NIXRX_STATUS(RX_ERR, "rx_errors");
2897 if (err)
2898 return err;
2899
2900 /* Tx stats */
2901 seq_printf(s, "\n=======NIX TX_STATS(%s port level)======\n\n",
2902 mac_ops->name);
2903 ucast = PRINT_CGX_CUML_NIXTX_STATUS(TX_UCAST, "tx_ucast_frames");
2904 if (err)
2905 return err;
2906 mcast = PRINT_CGX_CUML_NIXTX_STATUS(TX_MCAST, "tx_mcast_frames");
2907 if (err)
2908 return err;
2909 bcast = PRINT_CGX_CUML_NIXTX_STATUS(TX_BCAST, "tx_bcast_frames");
2910 if (err)
2911 return err;
2912 seq_printf(s, "tx_frames: %llu\n", ucast + mcast + bcast);
2913 PRINT_CGX_CUML_NIXTX_STATUS(TX_OCTS, "tx_bytes");
2914 if (err)
2915 return err;
2916 PRINT_CGX_CUML_NIXTX_STATUS(TX_DROP, "tx_drops");
2917 if (err)
2918 return err;
2919
2920 /* Rx stats */
2921 seq_printf(s, "\n=======%s RX_STATS======\n\n", mac_ops->name);
2922 while (stat < mac_ops->rx_stats_cnt) {
2923 err = mac_ops->mac_get_rx_stats(cgxd, lmac_id, stat, &rx_stat);
2924 if (err)
2925 return err;
2926 if (is_rvu_otx2(rvu))
2927 seq_printf(s, "%s: %llu\n", cgx_rx_stats_fields[stat],
2928 rx_stat);
2929 else
2930 seq_printf(s, "%s: %llu\n", rpm_rx_stats_fields[stat],
2931 rx_stat);
2932 stat++;
2933 }
2934
2935 /* Tx stats */
2936 stat = 0;
2937 seq_printf(s, "\n=======%s TX_STATS======\n\n", mac_ops->name);
2938 while (stat < mac_ops->tx_stats_cnt) {
2939 err = mac_ops->mac_get_tx_stats(cgxd, lmac_id, stat, &tx_stat);
2940 if (err)
2941 return err;
2942
2943 if (is_rvu_otx2(rvu))
2944 seq_printf(s, "%s: %llu\n", cgx_tx_stats_fields[stat],
2945 tx_stat);
2946 else
2947 seq_printf(s, "%s: %llu\n", rpm_tx_stats_fields[stat],
2948 tx_stat);
2949 stat++;
2950 }
2951
2952 return err;
2953 }
2954
rvu_dbg_derive_lmacid(struct seq_file * s)2955 static int rvu_dbg_derive_lmacid(struct seq_file *s)
2956 {
2957 return debugfs_get_aux_num(s->file);
2958 }
2959
rvu_dbg_cgx_stat_display(struct seq_file * s,void * unused)2960 static int rvu_dbg_cgx_stat_display(struct seq_file *s, void *unused)
2961 {
2962 return cgx_print_stats(s, rvu_dbg_derive_lmacid(s));
2963 }
2964
2965 RVU_DEBUG_SEQ_FOPS(cgx_stat, cgx_stat_display, NULL);
2966
cgx_print_dmac_flt(struct seq_file * s,int lmac_id)2967 static int cgx_print_dmac_flt(struct seq_file *s, int lmac_id)
2968 {
2969 struct rvu_cgx_lmac_dbgfs_ctx *dctx = s->private;
2970 struct rvu *rvu = dctx->rvu;
2971 struct pci_dev *pdev = NULL;
2972 void *cgxd = dctx->cgxd;
2973 char *bcast, *mcast;
2974 u16 index, domain;
2975 u8 dmac[ETH_ALEN];
2976 u64 cfg, mac;
2977 int pf;
2978
2979 pf = cgxlmac_to_pf(rvu, cgx_get_cgxid(cgxd), lmac_id);
2980 domain = 2;
2981
2982 pdev = pci_get_domain_bus_and_slot(domain, pf + 1, 0);
2983 if (!pdev)
2984 return 0;
2985
2986 cfg = cgx_read_dmac_ctrl(cgxd, lmac_id);
2987 bcast = cfg & CGX_DMAC_BCAST_MODE ? "ACCEPT" : "REJECT";
2988 mcast = cfg & CGX_DMAC_MCAST_MODE ? "ACCEPT" : "REJECT";
2989
2990 seq_puts(s,
2991 "PCI dev RVUPF BROADCAST MULTICAST FILTER-MODE\n");
2992 seq_printf(s, "%s PF%d %9s %9s",
2993 dev_name(&pdev->dev), pf, bcast, mcast);
2994 if (cfg & CGX_DMAC_CAM_ACCEPT)
2995 seq_printf(s, "%12s\n\n", "UNICAST");
2996 else
2997 seq_printf(s, "%16s\n\n", "PROMISCUOUS");
2998
2999 seq_puts(s, "\nDMAC-INDEX ADDRESS\n");
3000
3001 for (index = 0 ; index < 32 ; index++) {
3002 cfg = cgx_read_dmac_entry(cgxd, index);
3003 /* Display enabled dmac entries associated with current lmac */
3004 if (lmac_id == FIELD_GET(CGX_DMAC_CAM_ENTRY_LMACID, cfg) &&
3005 FIELD_GET(CGX_DMAC_CAM_ADDR_ENABLE, cfg)) {
3006 mac = FIELD_GET(CGX_RX_DMAC_ADR_MASK, cfg);
3007 u64_to_ether_addr(mac, dmac);
3008 seq_printf(s, "%7d %pM\n", index, dmac);
3009 }
3010 }
3011
3012 pci_dev_put(pdev);
3013 return 0;
3014 }
3015
rvu_dbg_cgx_dmac_flt_display(struct seq_file * s,void * unused)3016 static int rvu_dbg_cgx_dmac_flt_display(struct seq_file *s, void *unused)
3017 {
3018 return cgx_print_dmac_flt(s, rvu_dbg_derive_lmacid(s));
3019 }
3020
3021 RVU_DEBUG_SEQ_FOPS(cgx_dmac_flt, cgx_dmac_flt_display, NULL);
3022
cgx_print_fwdata(struct seq_file * s,int lmac_id)3023 static int cgx_print_fwdata(struct seq_file *s, int lmac_id)
3024 {
3025 struct rvu_cgx_lmac_dbgfs_ctx *dctx = s->private;
3026 struct cgx_lmac_fwdata_s *fwdata;
3027 struct rvu *rvu = dctx->rvu;
3028 void *cgxd = dctx->cgxd;
3029 struct phy_s *phy;
3030 int cgx_id, i;
3031
3032 if (!rvu->fwdata)
3033 return -EAGAIN;
3034
3035 cgx_id = cgx_get_cgxid(cgxd);
3036
3037 if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)
3038 fwdata = &rvu->fwdata->cgx_fw_data_usx[cgx_id][lmac_id];
3039 else
3040 fwdata = &rvu->fwdata->cgx_fw_data[cgx_id][lmac_id];
3041
3042 seq_puts(s, "\nFIRMWARE SHARED:\n");
3043 seq_puts(s, "\t\tSUPPORTED LINK INFORMATION\t\t\n");
3044 seq_puts(s, "\t\t==========================\n");
3045 seq_printf(s, "\t\t Link modes \t\t :%llx\n",
3046 fwdata->supported_link_modes);
3047 seq_printf(s, "\t\t Autoneg \t\t :%llx\n", fwdata->supported_an);
3048 seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata->supported_fec);
3049 seq_puts(s, "\n");
3050
3051 seq_puts(s, "\t\tADVERTISED LINK INFORMATION\t\t\n");
3052 seq_puts(s, "\t\t==========================\n");
3053 seq_printf(s, "\t\t Link modes \t\t :%llx\n",
3054 (u64)fwdata->advertised_link_modes);
3055 seq_printf(s, "\t\t Autoneg \t\t :%x\n", fwdata->advertised_an);
3056 seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata->advertised_fec);
3057 seq_puts(s, "\n");
3058
3059 seq_puts(s, "\t\tLMAC CONFIG\t\t\n");
3060 seq_puts(s, "\t\t============\n");
3061 seq_printf(s, "\t\t rw_valid \t\t :%x\n", fwdata->rw_valid);
3062 seq_printf(s, "\t\t lmac_type \t\t :%x\n", fwdata->lmac_type);
3063 seq_printf(s, "\t\t portm_idx \t\t :%x\n", fwdata->portm_idx);
3064 seq_printf(s, "\t\t mgmt_port \t\t :%x\n", fwdata->mgmt_port);
3065 seq_printf(s, "\t\t Link modes own \t :%llx\n",
3066 (u64)fwdata->advertised_link_modes_own);
3067 seq_puts(s, "\n");
3068
3069 seq_puts(s, "\n\t\tEEPROM DATA\n");
3070 seq_puts(s, "\t\t===========\n");
3071 seq_printf(s, "\t\t sff_id \t\t :%x\n", fwdata->sfp_eeprom.sff_id);
3072 seq_puts(s, "\t\t data \t\t\t :\n");
3073 seq_puts(s, "\t\t");
3074 for (i = 0; i < SFP_EEPROM_SIZE; i++) {
3075 seq_printf(s, "%x", fwdata->sfp_eeprom.buf[i]);
3076 if ((i + 1) % 16 == 0) {
3077 seq_puts(s, "\n");
3078 seq_puts(s, "\t\t");
3079 }
3080 }
3081 seq_puts(s, "\n");
3082
3083 phy = &fwdata->phy;
3084 seq_puts(s, "\n\t\tPHY INFORMATION\n");
3085 seq_puts(s, "\t\t===============\n");
3086 seq_printf(s, "\t\t Mod type configurable \t\t :%x\n",
3087 phy->misc.can_change_mod_type);
3088 seq_printf(s, "\t\t Mod type \t\t\t :%x\n", phy->misc.mod_type);
3089 seq_printf(s, "\t\t Support FEC \t\t\t :%x\n", phy->misc.has_fec_stats);
3090 seq_printf(s, "\t\t RSFEC corrected words \t\t :%x\n",
3091 phy->fec_stats.rsfec_corr_cws);
3092 seq_printf(s, "\t\t RSFEC uncorrected words \t :%x\n",
3093 phy->fec_stats.rsfec_uncorr_cws);
3094 seq_printf(s, "\t\t BRFEC corrected words \t\t :%x\n",
3095 phy->fec_stats.brfec_corr_blks);
3096 seq_printf(s, "\t\t BRFEC uncorrected words \t :%x\n",
3097 phy->fec_stats.brfec_uncorr_blks);
3098 seq_puts(s, "\n");
3099
3100 return 0;
3101 }
3102
rvu_dbg_cgx_fwdata_display(struct seq_file * s,void * unused)3103 static int rvu_dbg_cgx_fwdata_display(struct seq_file *s, void *unused)
3104 {
3105 return cgx_print_fwdata(s, rvu_dbg_derive_lmacid(s));
3106 }
3107
3108 RVU_DEBUG_SEQ_FOPS(cgx_fwdata, cgx_fwdata_display, NULL);
3109
rvu_dbg_cgx_init(struct rvu * rvu)3110 static void rvu_dbg_cgx_init(struct rvu *rvu)
3111 {
3112 struct rvu_cgx_lmac_dbgfs_ctx *ctx;
3113 struct mac_ops *mac_ops;
3114 unsigned long lmac_bmap;
3115 int i, lmac_id;
3116 char dname[20];
3117 void *cgx;
3118
3119 if (!cgx_get_cgxcnt_max())
3120 return;
3121
3122 mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));
3123 if (!mac_ops)
3124 return;
3125
3126 rvu->rvu_dbg.cgx_root = debugfs_create_dir(mac_ops->name,
3127 rvu->rvu_dbg.root);
3128
3129 for (i = 0; i < cgx_get_cgxcnt_max(); i++) {
3130 cgx = rvu_cgx_pdata(i, rvu);
3131 if (!cgx)
3132 continue;
3133 lmac_bmap = cgx_get_lmac_bmap(cgx);
3134 /* cgx debugfs dir */
3135 sprintf(dname, "%s%d", mac_ops->name, i);
3136 rvu->rvu_dbg.cgx = debugfs_create_dir(dname,
3137 rvu->rvu_dbg.cgx_root);
3138
3139 ctx = devm_kzalloc(rvu->dev, sizeof(*ctx), GFP_KERNEL);
3140 if (!ctx)
3141 continue;
3142
3143 ctx->rvu = rvu;
3144 ctx->cgxd = cgx;
3145
3146 for_each_set_bit(lmac_id, &lmac_bmap, rvu->hw->lmac_per_cgx) {
3147 /* lmac debugfs dir */
3148 sprintf(dname, "lmac%d", lmac_id);
3149 rvu->rvu_dbg.lmac =
3150 debugfs_create_dir(dname, rvu->rvu_dbg.cgx);
3151
3152 debugfs_create_file_aux_num("stats", 0600, rvu->rvu_dbg.lmac,
3153 ctx, lmac_id, &rvu_dbg_cgx_stat_fops);
3154 debugfs_create_file_aux_num("mac_filter", 0600,
3155 rvu->rvu_dbg.lmac, ctx, lmac_id,
3156 &rvu_dbg_cgx_dmac_flt_fops);
3157 debugfs_create_file_aux_num("fwdata", 0600,
3158 rvu->rvu_dbg.lmac, ctx,
3159 lmac_id, &rvu_dbg_cgx_fwdata_fops);
3160 }
3161 }
3162 }
3163
3164 /* NPC debugfs APIs */
rvu_print_npc_mcam_info(struct seq_file * s,u16 pcifunc,int blkaddr)3165 static void rvu_print_npc_mcam_info(struct seq_file *s,
3166 u16 pcifunc, int blkaddr)
3167 {
3168 struct rvu *rvu = s->private;
3169 int entry_acnt, entry_ecnt;
3170 int cntr_acnt, cntr_ecnt;
3171
3172 rvu_npc_get_mcam_entry_alloc_info(rvu, pcifunc, blkaddr,
3173 &entry_acnt, &entry_ecnt);
3174 rvu_npc_get_mcam_counter_alloc_info(rvu, pcifunc, blkaddr,
3175 &cntr_acnt, &cntr_ecnt);
3176 if (!entry_acnt && !cntr_acnt)
3177 return;
3178
3179 if (!(pcifunc & RVU_PFVF_FUNC_MASK))
3180 seq_printf(s, "\n\t\t Device \t\t: PF%d\n",
3181 rvu_get_pf(rvu->pdev, pcifunc));
3182 else
3183 seq_printf(s, "\n\t\t Device \t\t: PF%d VF%d\n",
3184 rvu_get_pf(rvu->pdev, pcifunc),
3185 (pcifunc & RVU_PFVF_FUNC_MASK) - 1);
3186
3187 if (entry_acnt) {
3188 seq_printf(s, "\t\t Entries allocated \t: %d\n", entry_acnt);
3189 seq_printf(s, "\t\t Entries enabled \t: %d\n", entry_ecnt);
3190 }
3191 if (cntr_acnt) {
3192 seq_printf(s, "\t\t Counters allocated \t: %d\n", cntr_acnt);
3193 seq_printf(s, "\t\t Counters enabled \t: %d\n", cntr_ecnt);
3194 }
3195 }
3196
rvu_dbg_npc_mcam_info_display(struct seq_file * filp,void * unsued)3197 static int rvu_dbg_npc_mcam_info_display(struct seq_file *filp, void *unsued)
3198 {
3199 struct rvu *rvu = filp->private;
3200 int x4_free, x2_free, sb_free;
3201 int pf, vf, numvfs, blkaddr;
3202 struct npc_priv_t *npc_priv;
3203 struct npc_mcam *mcam;
3204 u16 pcifunc, counters;
3205 u64 cfg;
3206
3207 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3208 if (blkaddr < 0)
3209 return -ENODEV;
3210
3211 mcam = &rvu->hw->mcam;
3212 counters = rvu->hw->npc_counters;
3213
3214 seq_puts(filp, "\nNPC MCAM info:\n");
3215 /* MCAM keywidth on receive and transmit sides */
3216 if (is_cn20k(rvu->pdev)) {
3217 npc_priv = npc_priv_get();
3218 seq_printf(filp, "\t\t RX keywidth \t: %s\n",
3219 (npc_priv->kw == NPC_MCAM_KEY_X1) ?
3220 "256bits" : "512bits");
3221
3222 npc_cn20k_subbank_calc_free(rvu, &x2_free, &x4_free, &sb_free);
3223 seq_printf(filp, "\t\t free x4 slots\t: %d\n", x4_free);
3224
3225 seq_printf(filp, "\t\t free x2 slots\t: %d\n", x2_free);
3226
3227 seq_printf(filp, "\t\t free subbanks\t: %d\n", sb_free);
3228 } else {
3229 cfg = rvu_read64(rvu, blkaddr,
3230 NPC_AF_INTFX_KEX_CFG(NIX_INTF_RX));
3231 cfg = (cfg >> 32) & 0x07;
3232 seq_printf(filp, "\t\t RX keywidth \t: %s\n",
3233 (cfg == NPC_MCAM_KEY_X1) ?
3234 "112bits" : ((cfg == NPC_MCAM_KEY_X2) ?
3235 "224bits" : "448bits"));
3236 cfg = rvu_read64(rvu, blkaddr,
3237 NPC_AF_INTFX_KEX_CFG(NIX_INTF_TX));
3238 cfg = (cfg >> 32) & 0x07;
3239 seq_printf(filp, "\t\t TX keywidth \t: %s\n",
3240 (cfg == NPC_MCAM_KEY_X1) ?
3241 "112bits" : ((cfg == NPC_MCAM_KEY_X2) ?
3242 "224bits" : "448bits"));
3243 }
3244
3245 mutex_lock(&mcam->lock);
3246 /* MCAM entries */
3247 seq_printf(filp, "\n\t\t MCAM entries \t: %d\n", mcam->total_entries);
3248 seq_printf(filp, "\t\t Reserved \t: %d\n",
3249 mcam->total_entries - mcam->bmap_entries);
3250 seq_printf(filp, "\t\t Available \t: %d\n", mcam->bmap_fcnt);
3251
3252 /* MCAM counters */
3253 seq_printf(filp, "\n\t\t MCAM counters \t: %d\n", counters);
3254 seq_printf(filp, "\t\t Reserved \t: %d\n",
3255 counters - mcam->counters.max);
3256 seq_printf(filp, "\t\t Available \t: %d\n",
3257 rvu_rsrc_free_count(&mcam->counters));
3258
3259 if (mcam->bmap_entries == mcam->bmap_fcnt) {
3260 mutex_unlock(&mcam->lock);
3261 return 0;
3262 }
3263
3264 seq_puts(filp, "\n\t\t Current allocation\n");
3265 seq_puts(filp, "\t\t====================\n");
3266 for (pf = 0; pf < rvu->hw->total_pfs; pf++) {
3267 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);
3268 rvu_print_npc_mcam_info(filp, pcifunc, blkaddr);
3269
3270 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
3271 numvfs = (cfg >> 12) & 0xFF;
3272 for (vf = 0; vf < numvfs; vf++) {
3273 pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));
3274 rvu_print_npc_mcam_info(filp, pcifunc, blkaddr);
3275 }
3276 }
3277
3278 mutex_unlock(&mcam->lock);
3279 return 0;
3280 }
3281
3282 RVU_DEBUG_SEQ_FOPS(npc_mcam_info, npc_mcam_info_display, NULL);
3283
rvu_dbg_npc_rx_miss_stats_display(struct seq_file * filp,void * unused)3284 static int rvu_dbg_npc_rx_miss_stats_display(struct seq_file *filp,
3285 void *unused)
3286 {
3287 struct rvu *rvu = filp->private;
3288 struct npc_mcam *mcam;
3289 int blkaddr;
3290
3291 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3292 if (blkaddr < 0)
3293 return -ENODEV;
3294
3295 mcam = &rvu->hw->mcam;
3296
3297 seq_puts(filp, "\nNPC MCAM RX miss action stats\n");
3298 seq_printf(filp, "\t\tStat %d: \t%lld\n", mcam->rx_miss_act_cntr,
3299 rvu_read64(rvu, blkaddr,
3300 NPC_AF_MATCH_STATX(mcam->rx_miss_act_cntr)));
3301
3302 return 0;
3303 }
3304
3305 RVU_DEBUG_SEQ_FOPS(npc_rx_miss_act, npc_rx_miss_stats_display, NULL);
3306
3307 #define RVU_DBG_PRINT_MPLS_TTL(pkt, mask) \
3308 do { \
3309 seq_printf(s, "%ld ", FIELD_GET(OTX2_FLOWER_MASK_MPLS_TTL, pkt)); \
3310 seq_printf(s, "mask 0x%lx\n", \
3311 FIELD_GET(OTX2_FLOWER_MASK_MPLS_TTL, mask)); \
3312 } while (0) \
3313
3314 #define RVU_DBG_PRINT_MPLS_LBTCBOS(_pkt, _mask) \
3315 do { \
3316 typeof(_pkt) (pkt) = (_pkt); \
3317 typeof(_mask) (mask) = (_mask); \
3318 seq_printf(s, "%ld %ld %ld\n", \
3319 FIELD_GET(OTX2_FLOWER_MASK_MPLS_LB, pkt), \
3320 FIELD_GET(OTX2_FLOWER_MASK_MPLS_TC, pkt), \
3321 FIELD_GET(OTX2_FLOWER_MASK_MPLS_BOS, pkt)); \
3322 seq_printf(s, "\tmask 0x%lx 0x%lx 0x%lx\n", \
3323 FIELD_GET(OTX2_FLOWER_MASK_MPLS_LB, mask), \
3324 FIELD_GET(OTX2_FLOWER_MASK_MPLS_TC, mask), \
3325 FIELD_GET(OTX2_FLOWER_MASK_MPLS_BOS, mask)); \
3326 } while (0) \
3327
rvu_dbg_npc_mcam_show_flows(struct seq_file * s,struct rvu_npc_mcam_rule * rule)3328 static void rvu_dbg_npc_mcam_show_flows(struct seq_file *s,
3329 struct rvu_npc_mcam_rule *rule)
3330 {
3331 u8 bit;
3332
3333 for_each_set_bit(bit, (unsigned long *)&rule->features, 64) {
3334 seq_printf(s, "\t%s ", npc_get_field_name(bit));
3335 switch (bit) {
3336 case NPC_LXMB:
3337 if (rule->lxmb == 1)
3338 seq_puts(s, "\tL2M nibble is set\n");
3339 else
3340 seq_puts(s, "\tL2B nibble is set\n");
3341 break;
3342 case NPC_DMAC:
3343 seq_printf(s, "%pM ", rule->packet.dmac);
3344 seq_printf(s, "mask %pM\n", rule->mask.dmac);
3345 break;
3346 case NPC_SMAC:
3347 seq_printf(s, "%pM ", rule->packet.smac);
3348 seq_printf(s, "mask %pM\n", rule->mask.smac);
3349 break;
3350 case NPC_ETYPE:
3351 seq_printf(s, "0x%x ", ntohs(rule->packet.etype));
3352 seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.etype));
3353 break;
3354 case NPC_OUTER_VID:
3355 seq_printf(s, "0x%x ", ntohs(rule->packet.vlan_tci));
3356 seq_printf(s, "mask 0x%x\n",
3357 ntohs(rule->mask.vlan_tci));
3358 break;
3359 case NPC_INNER_VID:
3360 seq_printf(s, "0x%x ", ntohs(rule->packet.vlan_itci));
3361 seq_printf(s, "mask 0x%x\n",
3362 ntohs(rule->mask.vlan_itci));
3363 break;
3364 case NPC_TOS:
3365 seq_printf(s, "%d ", rule->packet.tos);
3366 seq_printf(s, "mask 0x%x\n", rule->mask.tos);
3367 break;
3368 case NPC_SIP_IPV4:
3369 seq_printf(s, "%pI4 ", &rule->packet.ip4src);
3370 seq_printf(s, "mask %pI4\n", &rule->mask.ip4src);
3371 break;
3372 case NPC_DIP_IPV4:
3373 seq_printf(s, "%pI4 ", &rule->packet.ip4dst);
3374 seq_printf(s, "mask %pI4\n", &rule->mask.ip4dst);
3375 break;
3376 case NPC_SIP_IPV6:
3377 seq_printf(s, "%pI6 ", rule->packet.ip6src);
3378 seq_printf(s, "mask %pI6\n", rule->mask.ip6src);
3379 break;
3380 case NPC_DIP_IPV6:
3381 seq_printf(s, "%pI6 ", rule->packet.ip6dst);
3382 seq_printf(s, "mask %pI6\n", rule->mask.ip6dst);
3383 break;
3384 case NPC_IPFRAG_IPV6:
3385 seq_printf(s, "0x%x ", rule->packet.next_header);
3386 seq_printf(s, "mask 0x%x\n", rule->mask.next_header);
3387 break;
3388 case NPC_IPFRAG_IPV4:
3389 seq_printf(s, "0x%x ", rule->packet.ip_flag);
3390 seq_printf(s, "mask 0x%x\n", rule->mask.ip_flag);
3391 break;
3392 case NPC_SPORT_TCP:
3393 case NPC_SPORT_UDP:
3394 case NPC_SPORT_SCTP:
3395 seq_printf(s, "%d ", ntohs(rule->packet.sport));
3396 seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.sport));
3397 break;
3398 case NPC_DPORT_TCP:
3399 case NPC_DPORT_UDP:
3400 case NPC_DPORT_SCTP:
3401 seq_printf(s, "%d ", ntohs(rule->packet.dport));
3402 seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.dport));
3403 break;
3404 case NPC_TCP_FLAGS:
3405 seq_printf(s, "%d ", rule->packet.tcp_flags);
3406 seq_printf(s, "mask 0x%x\n", rule->mask.tcp_flags);
3407 break;
3408 case NPC_IPSEC_SPI:
3409 seq_printf(s, "0x%x ", ntohl(rule->packet.spi));
3410 seq_printf(s, "mask 0x%x\n", ntohl(rule->mask.spi));
3411 break;
3412 case NPC_MPLS1_LBTCBOS:
3413 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[0],
3414 rule->mask.mpls_lse[0]);
3415 break;
3416 case NPC_MPLS1_TTL:
3417 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[0],
3418 rule->mask.mpls_lse[0]);
3419 break;
3420 case NPC_MPLS2_LBTCBOS:
3421 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[1],
3422 rule->mask.mpls_lse[1]);
3423 break;
3424 case NPC_MPLS2_TTL:
3425 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[1],
3426 rule->mask.mpls_lse[1]);
3427 break;
3428 case NPC_MPLS3_LBTCBOS:
3429 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[2],
3430 rule->mask.mpls_lse[2]);
3431 break;
3432 case NPC_MPLS3_TTL:
3433 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[2],
3434 rule->mask.mpls_lse[2]);
3435 break;
3436 case NPC_MPLS4_LBTCBOS:
3437 RVU_DBG_PRINT_MPLS_LBTCBOS(rule->packet.mpls_lse[3],
3438 rule->mask.mpls_lse[3]);
3439 break;
3440 case NPC_MPLS4_TTL:
3441 RVU_DBG_PRINT_MPLS_TTL(rule->packet.mpls_lse[3],
3442 rule->mask.mpls_lse[3]);
3443 break;
3444 case NPC_TYPE_ICMP:
3445 seq_printf(s, "%d ", rule->packet.icmp_type);
3446 seq_printf(s, "mask 0x%x\n", rule->mask.icmp_type);
3447 break;
3448 case NPC_CODE_ICMP:
3449 seq_printf(s, "%d ", rule->packet.icmp_code);
3450 seq_printf(s, "mask 0x%x\n", rule->mask.icmp_code);
3451 break;
3452 default:
3453 seq_puts(s, "\n");
3454 break;
3455 }
3456 }
3457 }
3458
rvu_dbg_npc_mcam_show_action(struct seq_file * s,struct rvu_npc_mcam_rule * rule)3459 static void rvu_dbg_npc_mcam_show_action(struct seq_file *s,
3460 struct rvu_npc_mcam_rule *rule)
3461 {
3462 if (is_npc_intf_tx(rule->intf)) {
3463 switch (rule->tx_action.op) {
3464 case NIX_TX_ACTIONOP_DROP:
3465 seq_puts(s, "\taction: Drop\n");
3466 break;
3467 case NIX_TX_ACTIONOP_UCAST_DEFAULT:
3468 seq_puts(s, "\taction: Unicast to default channel\n");
3469 break;
3470 case NIX_TX_ACTIONOP_UCAST_CHAN:
3471 seq_printf(s, "\taction: Unicast to channel %d\n",
3472 rule->tx_action.index);
3473 break;
3474 case NIX_TX_ACTIONOP_MCAST:
3475 seq_puts(s, "\taction: Multicast\n");
3476 break;
3477 case NIX_TX_ACTIONOP_DROP_VIOL:
3478 seq_puts(s, "\taction: Lockdown Violation Drop\n");
3479 break;
3480 default:
3481 break;
3482 }
3483 } else {
3484 switch (rule->rx_action.op) {
3485 case NIX_RX_ACTIONOP_DROP:
3486 seq_puts(s, "\taction: Drop\n");
3487 break;
3488 case NIX_RX_ACTIONOP_UCAST:
3489 seq_printf(s, "\taction: Direct to queue %d\n",
3490 rule->rx_action.index);
3491 break;
3492 case NIX_RX_ACTIONOP_RSS:
3493 seq_puts(s, "\taction: RSS\n");
3494 break;
3495 case NIX_RX_ACTIONOP_UCAST_IPSEC:
3496 seq_puts(s, "\taction: Unicast ipsec\n");
3497 break;
3498 case NIX_RX_ACTIONOP_MCAST:
3499 seq_puts(s, "\taction: Multicast\n");
3500 break;
3501 default:
3502 break;
3503 }
3504 }
3505 }
3506
rvu_dbg_get_intf_name(int intf)3507 static const char *rvu_dbg_get_intf_name(int intf)
3508 {
3509 switch (intf) {
3510 case NIX_INTFX_RX(0):
3511 return "NIX0_RX";
3512 case NIX_INTFX_RX(1):
3513 return "NIX1_RX";
3514 case NIX_INTFX_TX(0):
3515 return "NIX0_TX";
3516 case NIX_INTFX_TX(1):
3517 return "NIX1_TX";
3518 default:
3519 break;
3520 }
3521
3522 return "unknown";
3523 }
3524
rvu_dbg_npc_mcam_show_rules(struct seq_file * s,void * unused)3525 static int rvu_dbg_npc_mcam_show_rules(struct seq_file *s, void *unused)
3526 {
3527 struct rvu_npc_mcam_rule *iter;
3528 struct rvu *rvu = s->private;
3529 struct npc_mcam *mcam;
3530 int pf, vf = -1, bank;
3531 u16 target, index;
3532 bool enabled;
3533 u64 hits, off;
3534 int blkaddr;
3535
3536 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3537 if (blkaddr < 0)
3538 return 0;
3539
3540 mcam = &rvu->hw->mcam;
3541
3542 mutex_lock(&mcam->lock);
3543 list_for_each_entry(iter, &mcam->mcam_rules, list) {
3544 pf = rvu_get_pf(rvu->pdev, iter->owner);
3545 seq_printf(s, "\n\tInstalled by: PF%d ", pf);
3546
3547 if (iter->owner & RVU_PFVF_FUNC_MASK) {
3548 vf = (iter->owner & RVU_PFVF_FUNC_MASK) - 1;
3549 seq_printf(s, "VF%d", vf);
3550 }
3551 seq_puts(s, "\n");
3552
3553 seq_printf(s, "\tdirection: %s\n", is_npc_intf_rx(iter->intf) ?
3554 "RX" : "TX");
3555 seq_printf(s, "\tinterface: %s\n",
3556 rvu_dbg_get_intf_name(iter->intf));
3557 seq_printf(s, "\tmcam entry: %d\n", iter->entry);
3558
3559 rvu_dbg_npc_mcam_show_flows(s, iter);
3560 if (is_npc_intf_rx(iter->intf)) {
3561 target = iter->rx_action.pf_func;
3562 pf = rvu_get_pf(rvu->pdev, target);
3563 seq_printf(s, "\tForward to: PF%d ", pf);
3564
3565 if (target & RVU_PFVF_FUNC_MASK) {
3566 vf = (target & RVU_PFVF_FUNC_MASK) - 1;
3567 seq_printf(s, "VF%d", vf);
3568 }
3569 seq_puts(s, "\n");
3570 seq_printf(s, "\tchannel: 0x%x\n", iter->chan);
3571 seq_printf(s, "\tchannel_mask: 0x%x\n", iter->chan_mask);
3572 }
3573
3574 rvu_dbg_npc_mcam_show_action(s, iter);
3575
3576 enabled = is_mcam_entry_enabled(rvu, mcam, blkaddr, iter->entry);
3577 seq_printf(s, "\tenabled: %s\n", enabled ? "yes" : "no");
3578 if (is_cn20k(rvu->pdev)) {
3579 seq_printf(s, "\tpriority: %u\n", iter->hw_prio);
3580 index = iter->entry & (mcam->banksize - 1);
3581 bank = npc_get_bank(mcam, iter->entry);
3582 off = NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(index, bank);
3583 hits = rvu_read64(rvu, blkaddr, off);
3584 seq_printf(s, "\thits: %lld\n", hits);
3585 continue;
3586 }
3587
3588 if (!iter->has_cntr)
3589 continue;
3590 seq_printf(s, "\tcounter: %d\n", iter->cntr);
3591
3592 hits = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(iter->cntr));
3593 seq_printf(s, "\thits: %lld\n", hits);
3594 }
3595 mutex_unlock(&mcam->lock);
3596
3597 return 0;
3598 }
3599
3600 RVU_DEBUG_SEQ_FOPS(npc_mcam_rules, npc_mcam_show_rules, NULL);
3601
rvu_dbg_npc_exact_show_entries(struct seq_file * s,void * unused)3602 static int rvu_dbg_npc_exact_show_entries(struct seq_file *s, void *unused)
3603 {
3604 struct npc_exact_table_entry *mem_entry[NPC_EXACT_TBL_MAX_WAYS] = { 0 };
3605 struct npc_exact_table_entry *cam_entry;
3606 struct npc_exact_table *table;
3607 struct rvu *rvu = s->private;
3608 int i, j;
3609
3610 u8 bitmap = 0;
3611
3612 table = rvu->hw->table;
3613
3614 mutex_lock(&table->lock);
3615
3616 /* Check if there is at least one entry in mem table */
3617 if (!table->mem_tbl_entry_cnt)
3618 goto dump_cam_table;
3619
3620 /* Print table headers */
3621 seq_puts(s, "\n\tExact Match MEM Table\n");
3622 seq_puts(s, "Index\t");
3623
3624 for (i = 0; i < table->mem_table.ways; i++) {
3625 mem_entry[i] = list_first_entry_or_null(&table->lhead_mem_tbl_entry[i],
3626 struct npc_exact_table_entry, list);
3627
3628 seq_printf(s, "Way-%d\t\t\t\t\t", i);
3629 }
3630
3631 seq_puts(s, "\n");
3632 for (i = 0; i < table->mem_table.ways; i++)
3633 seq_puts(s, "\tChan MAC \t");
3634
3635 seq_puts(s, "\n\n");
3636
3637 /* Print mem table entries */
3638 for (i = 0; i < table->mem_table.depth; i++) {
3639 bitmap = 0;
3640 for (j = 0; j < table->mem_table.ways; j++) {
3641 if (!mem_entry[j])
3642 continue;
3643
3644 if (mem_entry[j]->index != i)
3645 continue;
3646
3647 bitmap |= BIT(j);
3648 }
3649
3650 /* No valid entries */
3651 if (!bitmap)
3652 continue;
3653
3654 seq_printf(s, "%d\t", i);
3655 for (j = 0; j < table->mem_table.ways; j++) {
3656 if (!(bitmap & BIT(j))) {
3657 seq_puts(s, "nil\t\t\t\t\t");
3658 continue;
3659 }
3660
3661 seq_printf(s, "0x%x %pM\t\t\t", mem_entry[j]->chan,
3662 mem_entry[j]->mac);
3663 mem_entry[j] = list_next_entry(mem_entry[j], list);
3664 }
3665 seq_puts(s, "\n");
3666 }
3667
3668 dump_cam_table:
3669
3670 if (!table->cam_tbl_entry_cnt)
3671 goto done;
3672
3673 seq_puts(s, "\n\tExact Match CAM Table\n");
3674 seq_puts(s, "index\tchan\tMAC\n");
3675
3676 /* Traverse cam table entries */
3677 list_for_each_entry(cam_entry, &table->lhead_cam_tbl_entry, list) {
3678 seq_printf(s, "%d\t0x%x\t%pM\n", cam_entry->index, cam_entry->chan,
3679 cam_entry->mac);
3680 }
3681
3682 done:
3683 mutex_unlock(&table->lock);
3684 return 0;
3685 }
3686
3687 RVU_DEBUG_SEQ_FOPS(npc_exact_entries, npc_exact_show_entries, NULL);
3688
rvu_dbg_npc_exact_show_info(struct seq_file * s,void * unused)3689 static int rvu_dbg_npc_exact_show_info(struct seq_file *s, void *unused)
3690 {
3691 struct npc_exact_table *table;
3692 struct rvu *rvu = s->private;
3693 int i;
3694
3695 table = rvu->hw->table;
3696
3697 seq_puts(s, "\n\tExact Table Info\n");
3698 seq_printf(s, "Exact Match Feature : %s\n",
3699 rvu->hw->cap.npc_exact_match_enabled ? "enabled" : "disable");
3700 if (!rvu->hw->cap.npc_exact_match_enabled)
3701 return 0;
3702
3703 seq_puts(s, "\nMCAM Index\tMAC Filter Rules Count\n");
3704 for (i = 0; i < table->num_drop_rules; i++)
3705 seq_printf(s, "%d\t\t%d\n", i, table->cnt_cmd_rules[i]);
3706
3707 seq_puts(s, "\nMcam Index\tPromisc Mode Status\n");
3708 for (i = 0; i < table->num_drop_rules; i++)
3709 seq_printf(s, "%d\t\t%s\n", i, table->promisc_mode[i] ? "on" : "off");
3710
3711 seq_puts(s, "\n\tMEM Table Info\n");
3712 seq_printf(s, "Ways : %d\n", table->mem_table.ways);
3713 seq_printf(s, "Depth : %d\n", table->mem_table.depth);
3714 seq_printf(s, "Mask : 0x%llx\n", table->mem_table.mask);
3715 seq_printf(s, "Hash Mask : 0x%x\n", table->mem_table.hash_mask);
3716 seq_printf(s, "Hash Offset : 0x%x\n", table->mem_table.hash_offset);
3717
3718 seq_puts(s, "\n\tCAM Table Info\n");
3719 seq_printf(s, "Depth : %d\n", table->cam_table.depth);
3720
3721 return 0;
3722 }
3723
3724 RVU_DEBUG_SEQ_FOPS(npc_exact_info, npc_exact_show_info, NULL);
3725
rvu_dbg_npc_exact_drop_cnt(struct seq_file * s,void * unused)3726 static int rvu_dbg_npc_exact_drop_cnt(struct seq_file *s, void *unused)
3727 {
3728 struct npc_exact_table *table;
3729 struct rvu *rvu = s->private;
3730 struct npc_key_field *field;
3731 u64 cfg, cam1, off;
3732 u16 chan, pcifunc;
3733 int blkaddr, i;
3734 char *str;
3735
3736 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
3737 table = rvu->hw->table;
3738
3739 field = &rvu->hw->mcam.rx_key_fields[NPC_CHAN];
3740
3741 seq_puts(s, "\n\t Exact Hit on drop status\n");
3742 seq_puts(s, "\npcifunc\tmcam_idx\tHits\tchan\tstatus\n");
3743
3744 for (i = 0; i < table->num_drop_rules; i++) {
3745 pcifunc = rvu_npc_exact_drop_rule_to_pcifunc(rvu, i);
3746 cfg = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(i, 0));
3747
3748 /* channel will be always in keyword 0 */
3749 cam1 = rvu_read64(rvu, blkaddr,
3750 NPC_AF_MCAMEX_BANKX_CAMX_W0(i, 0, 1));
3751 chan = field->kw_mask[0] & cam1;
3752
3753 str = (cfg & 1) ? "enabled" : "disabled";
3754 if (is_cn20k(rvu->pdev)) {
3755 off = NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(i, 0);
3756 seq_printf(s, "0x%x\t%d\t\t%llu\t0x%x\t%s\n", pcifunc,
3757 i, rvu_read64(rvu, blkaddr, off), chan, str);
3758 } else {
3759 off = NPC_AF_MATCH_STATX(table->counter_idx[i]);
3760 seq_printf(s, "0x%x\t%d\t\t%llu\t0x%x\t%s\n", pcifunc,
3761 i, rvu_read64(rvu, blkaddr, off),
3762 chan, str);
3763 }
3764
3765 }
3766
3767 return 0;
3768 }
3769
3770 RVU_DEBUG_SEQ_FOPS(npc_exact_drop_cnt, npc_exact_drop_cnt, NULL);
3771
rvu_dbg_npc_init(struct rvu * rvu)3772 static void rvu_dbg_npc_init(struct rvu *rvu)
3773 {
3774 rvu->rvu_dbg.npc = debugfs_create_dir("npc", rvu->rvu_dbg.root);
3775
3776 debugfs_create_file("mcam_info", 0444, rvu->rvu_dbg.npc, rvu,
3777 &rvu_dbg_npc_mcam_info_fops);
3778 debugfs_create_file("mcam_rules", 0444, rvu->rvu_dbg.npc, rvu,
3779 &rvu_dbg_npc_mcam_rules_fops);
3780
3781 debugfs_create_file("rx_miss_act_stats", 0444, rvu->rvu_dbg.npc, rvu,
3782 &rvu_dbg_npc_rx_miss_act_fops);
3783
3784 if (is_cn20k(rvu->pdev))
3785 npc_cn20k_debugfs_init(rvu);
3786
3787 if (!rvu->hw->cap.npc_exact_match_enabled)
3788 return;
3789
3790 debugfs_create_file("exact_entries", 0444, rvu->rvu_dbg.npc, rvu,
3791 &rvu_dbg_npc_exact_entries_fops);
3792
3793 debugfs_create_file("exact_info", 0444, rvu->rvu_dbg.npc, rvu,
3794 &rvu_dbg_npc_exact_info_fops);
3795
3796 debugfs_create_file("exact_drop_cnt", 0444, rvu->rvu_dbg.npc, rvu,
3797 &rvu_dbg_npc_exact_drop_cnt_fops);
3798
3799 }
3800
cpt_eng_sts_display(struct seq_file * filp,u8 eng_type)3801 static int cpt_eng_sts_display(struct seq_file *filp, u8 eng_type)
3802 {
3803 struct cpt_ctx *ctx = filp->private;
3804 u64 busy_sts = 0, free_sts = 0;
3805 u32 e_min = 0, e_max = 0, e, i;
3806 u16 max_ses, max_ies, max_aes;
3807 struct rvu *rvu = ctx->rvu;
3808 int blkaddr = ctx->blkaddr;
3809 u64 reg;
3810
3811 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);
3812 max_ses = reg & 0xffff;
3813 max_ies = (reg >> 16) & 0xffff;
3814 max_aes = (reg >> 32) & 0xffff;
3815
3816 switch (eng_type) {
3817 case CPT_AE_TYPE:
3818 e_min = max_ses + max_ies;
3819 e_max = max_ses + max_ies + max_aes;
3820 break;
3821 case CPT_SE_TYPE:
3822 e_min = 0;
3823 e_max = max_ses;
3824 break;
3825 case CPT_IE_TYPE:
3826 e_min = max_ses;
3827 e_max = max_ses + max_ies;
3828 break;
3829 default:
3830 return -EINVAL;
3831 }
3832
3833 for (e = e_min, i = 0; e < e_max; e++, i++) {
3834 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e));
3835 if (reg & 0x1)
3836 busy_sts |= 1ULL << i;
3837
3838 if (reg & 0x2)
3839 free_sts |= 1ULL << i;
3840 }
3841 seq_printf(filp, "FREE STS : 0x%016llx\n", free_sts);
3842 seq_printf(filp, "BUSY STS : 0x%016llx\n", busy_sts);
3843
3844 return 0;
3845 }
3846
rvu_dbg_cpt_ae_sts_display(struct seq_file * filp,void * unused)3847 static int rvu_dbg_cpt_ae_sts_display(struct seq_file *filp, void *unused)
3848 {
3849 return cpt_eng_sts_display(filp, CPT_AE_TYPE);
3850 }
3851
3852 RVU_DEBUG_SEQ_FOPS(cpt_ae_sts, cpt_ae_sts_display, NULL);
3853
rvu_dbg_cpt_se_sts_display(struct seq_file * filp,void * unused)3854 static int rvu_dbg_cpt_se_sts_display(struct seq_file *filp, void *unused)
3855 {
3856 return cpt_eng_sts_display(filp, CPT_SE_TYPE);
3857 }
3858
3859 RVU_DEBUG_SEQ_FOPS(cpt_se_sts, cpt_se_sts_display, NULL);
3860
rvu_dbg_cpt_ie_sts_display(struct seq_file * filp,void * unused)3861 static int rvu_dbg_cpt_ie_sts_display(struct seq_file *filp, void *unused)
3862 {
3863 return cpt_eng_sts_display(filp, CPT_IE_TYPE);
3864 }
3865
3866 RVU_DEBUG_SEQ_FOPS(cpt_ie_sts, cpt_ie_sts_display, NULL);
3867
rvu_dbg_cpt_engines_info_display(struct seq_file * filp,void * unused)3868 static int rvu_dbg_cpt_engines_info_display(struct seq_file *filp, void *unused)
3869 {
3870 struct cpt_ctx *ctx = filp->private;
3871 u16 max_ses, max_ies, max_aes;
3872 struct rvu *rvu = ctx->rvu;
3873 int blkaddr = ctx->blkaddr;
3874 u32 e_max, e;
3875 u64 reg;
3876
3877 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);
3878 max_ses = reg & 0xffff;
3879 max_ies = (reg >> 16) & 0xffff;
3880 max_aes = (reg >> 32) & 0xffff;
3881
3882 e_max = max_ses + max_ies + max_aes;
3883
3884 seq_puts(filp, "===========================================\n");
3885 for (e = 0; e < e_max; e++) {
3886 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(e));
3887 seq_printf(filp, "CPT Engine[%u] Group Enable 0x%02llx\n", e,
3888 reg & 0xff);
3889 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_ACTIVE(e));
3890 seq_printf(filp, "CPT Engine[%u] Active Info 0x%llx\n", e,
3891 reg);
3892 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(e));
3893 seq_printf(filp, "CPT Engine[%u] Control 0x%llx\n", e,
3894 reg);
3895 seq_puts(filp, "===========================================\n");
3896 }
3897 return 0;
3898 }
3899
3900 RVU_DEBUG_SEQ_FOPS(cpt_engines_info, cpt_engines_info_display, NULL);
3901
rvu_dbg_cpt_lfs_info_display(struct seq_file * filp,void * unused)3902 static int rvu_dbg_cpt_lfs_info_display(struct seq_file *filp, void *unused)
3903 {
3904 struct cpt_ctx *ctx = filp->private;
3905 int blkaddr = ctx->blkaddr;
3906 struct rvu *rvu = ctx->rvu;
3907 struct rvu_block *block;
3908 struct rvu_hwinfo *hw;
3909 u64 reg;
3910 u32 lf;
3911
3912 hw = rvu->hw;
3913 block = &hw->block[blkaddr];
3914 if (!block->lf.bmap)
3915 return -ENODEV;
3916
3917 seq_puts(filp, "===========================================\n");
3918 for (lf = 0; lf < block->lf.max; lf++) {
3919 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(lf));
3920 seq_printf(filp, "CPT Lf[%u] CTL 0x%llx\n", lf, reg);
3921 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(lf));
3922 seq_printf(filp, "CPT Lf[%u] CTL2 0x%llx\n", lf, reg);
3923 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_PTR_CTL(lf));
3924 seq_printf(filp, "CPT Lf[%u] PTR_CTL 0x%llx\n", lf, reg);
3925 reg = rvu_read64(rvu, blkaddr, block->lfcfg_reg |
3926 (lf << block->lfshift));
3927 seq_printf(filp, "CPT Lf[%u] CFG 0x%llx\n", lf, reg);
3928 seq_puts(filp, "===========================================\n");
3929 }
3930 return 0;
3931 }
3932
3933 RVU_DEBUG_SEQ_FOPS(cpt_lfs_info, cpt_lfs_info_display, NULL);
3934
rvu_dbg_cpt_err_info_display(struct seq_file * filp,void * unused)3935 static int rvu_dbg_cpt_err_info_display(struct seq_file *filp, void *unused)
3936 {
3937 struct cpt_ctx *ctx = filp->private;
3938 struct rvu *rvu = ctx->rvu;
3939 int blkaddr = ctx->blkaddr;
3940 u64 reg0, reg1;
3941
3942 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0));
3943 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(1));
3944 seq_printf(filp, "CPT_AF_FLTX_INT: 0x%llx 0x%llx\n", reg0, reg1);
3945 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(0));
3946 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(1));
3947 seq_printf(filp, "CPT_AF_PSNX_EXE: 0x%llx 0x%llx\n", reg0, reg1);
3948 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_LF(0));
3949 seq_printf(filp, "CPT_AF_PSNX_LF: 0x%llx\n", reg0);
3950 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT);
3951 seq_printf(filp, "CPT_AF_RVU_INT: 0x%llx\n", reg0);
3952 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT);
3953 seq_printf(filp, "CPT_AF_RAS_INT: 0x%llx\n", reg0);
3954 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO);
3955 seq_printf(filp, "CPT_AF_EXE_ERR_INFO: 0x%llx\n", reg0);
3956
3957 return 0;
3958 }
3959
3960 RVU_DEBUG_SEQ_FOPS(cpt_err_info, cpt_err_info_display, NULL);
3961
rvu_dbg_cpt_pc_display(struct seq_file * filp,void * unused)3962 static int rvu_dbg_cpt_pc_display(struct seq_file *filp, void *unused)
3963 {
3964 struct cpt_ctx *ctx = filp->private;
3965 struct rvu *rvu = ctx->rvu;
3966 int blkaddr = ctx->blkaddr;
3967 u64 reg;
3968
3969 reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC);
3970 seq_printf(filp, "CPT instruction requests %llu\n", reg);
3971 reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC);
3972 seq_printf(filp, "CPT instruction latency %llu\n", reg);
3973 reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC);
3974 seq_printf(filp, "CPT NCB read requests %llu\n", reg);
3975 reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC);
3976 seq_printf(filp, "CPT NCB read latency %llu\n", reg);
3977 reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC);
3978 seq_printf(filp, "CPT read requests caused by UC fills %llu\n", reg);
3979 reg = rvu_read64(rvu, blkaddr, CPT_AF_ACTIVE_CYCLES_PC);
3980 seq_printf(filp, "CPT active cycles pc %llu\n", reg);
3981 reg = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT);
3982 seq_printf(filp, "CPT clock count pc %llu\n", reg);
3983
3984 return 0;
3985 }
3986
3987 RVU_DEBUG_SEQ_FOPS(cpt_pc, cpt_pc_display, NULL);
3988
rvu_dbg_cpt_init(struct rvu * rvu,int blkaddr)3989 static void rvu_dbg_cpt_init(struct rvu *rvu, int blkaddr)
3990 {
3991 struct cpt_ctx *ctx;
3992
3993 if (!is_block_implemented(rvu->hw, blkaddr))
3994 return;
3995
3996 if (blkaddr == BLKADDR_CPT0) {
3997 rvu->rvu_dbg.cpt = debugfs_create_dir("cpt", rvu->rvu_dbg.root);
3998 ctx = &rvu->rvu_dbg.cpt_ctx[0];
3999 ctx->blkaddr = BLKADDR_CPT0;
4000 ctx->rvu = rvu;
4001 } else {
4002 rvu->rvu_dbg.cpt = debugfs_create_dir("cpt1",
4003 rvu->rvu_dbg.root);
4004 ctx = &rvu->rvu_dbg.cpt_ctx[1];
4005 ctx->blkaddr = BLKADDR_CPT1;
4006 ctx->rvu = rvu;
4007 }
4008
4009 debugfs_create_file("cpt_pc", 0600, rvu->rvu_dbg.cpt, ctx,
4010 &rvu_dbg_cpt_pc_fops);
4011 debugfs_create_file("cpt_ae_sts", 0600, rvu->rvu_dbg.cpt, ctx,
4012 &rvu_dbg_cpt_ae_sts_fops);
4013 debugfs_create_file("cpt_se_sts", 0600, rvu->rvu_dbg.cpt, ctx,
4014 &rvu_dbg_cpt_se_sts_fops);
4015 debugfs_create_file("cpt_ie_sts", 0600, rvu->rvu_dbg.cpt, ctx,
4016 &rvu_dbg_cpt_ie_sts_fops);
4017 debugfs_create_file("cpt_engines_info", 0600, rvu->rvu_dbg.cpt, ctx,
4018 &rvu_dbg_cpt_engines_info_fops);
4019 debugfs_create_file("cpt_lfs_info", 0600, rvu->rvu_dbg.cpt, ctx,
4020 &rvu_dbg_cpt_lfs_info_fops);
4021 debugfs_create_file("cpt_err_info", 0600, rvu->rvu_dbg.cpt, ctx,
4022 &rvu_dbg_cpt_err_info_fops);
4023 }
4024
rvu_get_dbg_dir_name(struct rvu * rvu)4025 static const char *rvu_get_dbg_dir_name(struct rvu *rvu)
4026 {
4027 if (is_cn20k(rvu->pdev))
4028 return "cn20k";
4029
4030 if (!is_rvu_otx2(rvu))
4031 return "cn10k";
4032 else
4033 return "octeontx2";
4034 }
4035
rvu_dbg_init(struct rvu * rvu)4036 void rvu_dbg_init(struct rvu *rvu)
4037 {
4038 rvu->rvu_dbg.root = debugfs_create_dir(rvu_get_dbg_dir_name(rvu), NULL);
4039
4040 debugfs_create_file("rsrc_alloc", 0444, rvu->rvu_dbg.root, rvu,
4041 &rvu_dbg_rsrc_status_fops);
4042
4043 if (!is_rvu_otx2(rvu))
4044 debugfs_create_file("lmtst_map_table", 0444, rvu->rvu_dbg.root,
4045 rvu, &rvu_dbg_lmtst_map_table_fops);
4046
4047 debugfs_create_file("rvu_fwdata", 0444, rvu->rvu_dbg.root, rvu,
4048 &rvu_dbg_rvu_fwdata_fops);
4049
4050 if (!cgx_get_cgxcnt_max())
4051 goto create;
4052
4053 if (is_rvu_otx2(rvu))
4054 debugfs_create_file("rvu_pf_cgx_map", 0444, rvu->rvu_dbg.root,
4055 rvu, &rvu_dbg_rvu_pf_cgx_map_fops);
4056 else
4057 debugfs_create_file("rvu_pf_rpm_map", 0444, rvu->rvu_dbg.root,
4058 rvu, &rvu_dbg_rvu_pf_cgx_map_fops);
4059
4060 create:
4061 rvu_dbg_npa_init(rvu);
4062 rvu_dbg_nix_init(rvu, BLKADDR_NIX0);
4063
4064 rvu_dbg_nix_init(rvu, BLKADDR_NIX1);
4065 rvu_dbg_cgx_init(rvu);
4066 rvu_dbg_npc_init(rvu);
4067 rvu_dbg_cpt_init(rvu, BLKADDR_CPT0);
4068 rvu_dbg_cpt_init(rvu, BLKADDR_CPT1);
4069 rvu_dbg_mcs_init(rvu);
4070 }
4071
rvu_dbg_exit(struct rvu * rvu)4072 void rvu_dbg_exit(struct rvu *rvu)
4073 {
4074 debugfs_remove_recursive(rvu->rvu_dbg.root);
4075 }
4076
4077 #endif /* CONFIG_DEBUG_FS */
4078