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Searched refs:uncached (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/arch/x86/
H A Dpat.rst159 For example: If there is an existing uncached mapping, a new ioremap_wc can
160 return uncached mapping in place of write-combine requested.
182 uncached-minus @ 0x7fadf000-0x7fae0000
183 uncached-minus @ 0x7fb19000-0x7fb1a000
184 uncached-minus @ 0x7fb1a000-0x7fb1b000
185 uncached-minus @ 0x7fb1b000-0x7fb1c000
186 uncached-minus @ 0x7fb1c000-0x7fb1d000
187 uncached-minus @ 0x7fb1d000-0x7fb1e000
188 uncached-minus @ 0x7fb1e000-0x7fb25000
189 uncached-minus @ 0x7fb25000-0x7fb26000
[all …]
/linux/Documentation/arch/arm/
H A Dswp_emulation.rst23 when accessing uncached shared regions, LDREX/STREX rely on an external
26 cause programs that perform SWP operations to uncached memory to deadlock, as
/linux/drivers/scsi/esas2r/
H A Desas2r_init.c372 a->uncached = dma_alloc_coherent(&pcid->dev, in esas2r_init_adapter()
376 if (a->uncached == NULL) { in esas2r_init_adapter()
388 a->uncached, in esas2r_init_adapter()
391 memset(a->uncached, 0, a->uncached_size); in esas2r_init_adapter()
392 next_uncached = a->uncached; in esas2r_init_adapter()
585 if (a->uncached) { in esas2r_kill_adapter()
588 a->uncached, in esas2r_kill_adapter()
590 a->uncached = NULL; in esas2r_kill_adapter()
1051 ((u8 *)a->outbound_copy - a->uncached); in esas2r_check_adapter()
H A Desas2r_flash.c1316 a->uncached_phys + (u64)((u8 *)n - a->uncached)); in esas2r_nvram_write()
1322 + (u64)((u8 *)n - a->uncached)); in esas2r_nvram_write()
H A Desas2r_disc.c1039 + (u64)((u8 *)a->disc_buffer - a->uncached); in esas2r_disc_get_phys_addr()
/linux/Documentation/filesystems/fuse/
H A Dfuse-io.rst32 uncached, but fully written pages). No READ requests are ever sent for writes,
33 so when an uncached page is partially written, the page is discarded.
/linux/arch/mips/lib/
H A DMakefile8 strnlen_user.o uncached.o
/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Dif0008.h33 __u8 uncached; member
/linux/Documentation/arch/xtensa/
H A Dmmu.rst114 256MB cached + 256MB uncached layout::
158 512MB cached + 512MB uncached layout::
/linux/arch/sh/mm/
H A DMakefile42 obj-$(CONFIG_UNCACHED_MAPPING) += uncached.o
/linux/Documentation/arch/loongarch/
H A Dintroduction.rst316 KPRANGE1, PA is equal to VA with bit30~31 cleared. For example, the uncached
337 is configured by bits 60~61 in VA: 0 is for strongly-ordered uncached, 1 is
338 for coherent cached, and 2 is for weakly-ordered uncached.
342 To put this in action: the strongly-ordered uncached direct-mapped VA (in
345 and the weakly-ordered uncached direct-mapped VA (in XKPRANGE) of 0x00000000
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v9_0.c1092 bool uncached = bo->flags & AMDGPU_GEM_CREATE_UNCACHED; in gmc_v9_0_get_coherence_flags() local
1105 if (uncached) in gmc_v9_0_get_coherence_flags()
1118 if (uncached || coherent) in gmc_v9_0_get_coherence_flags()
1126 if (uncached || coherent) in gmc_v9_0_get_coherence_flags()
1160 if (uncached) { in gmc_v9_0_get_coherence_flags()
1178 if (uncached || coherent) in gmc_v9_0_get_coherence_flags()
H A Damdgpu_vm.c1275 bool uncached; in amdgpu_vm_bo_update() local
1333 uncached = (bo->flags & AMDGPU_GEM_CREATE_UNCACHED) != 0; in amdgpu_vm_bo_update()
1337 uncached = false; in amdgpu_vm_bo_update()
1371 !uncached, &sync, mapping->start, in amdgpu_vm_bo_update()
/linux/drivers/gpu/drm/nouveau/nvif/
H A Dmmu.c108 if (args.uncached) mmu->type[i].type |= NVIF_MEM_UNCACHED; in nvif_mmu_ctor()
/linux/kernel/dma/
H A DKconfig43 # DMA_ATTR_WRITE_COMBINE. Normally the "uncached" mapping should be what
123 # The only thing that is really required is a way to set an uncached bit
/linux/drivers/media/pci/ivtv/
H A DKconfig76 PAT-enabled systems but the framebuffer memory will be uncached.
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dummu.c98 args->v0.uncached = !!(type & NVKM_MEM_UNCACHED); in nvkm_ummu_type()
/linux/Documentation/driver-api/usb/
H A Ddma.rst69 On most systems the memory returned will be uncached, because the
/linux/arch/arm/mm/
H A DKconfig737 NOTE: when accessing uncached shared regions, LDREX/STREX rely
741 perform SWP operations to uncached memory to deadlock.