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Searched refs:tx_reg (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/mailbox/
H A Dplatform_mhu.c36 void __iomem *tx_reg; member
67 u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); in platform_mhu_last_tx_done()
77 writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS); in platform_mhu_send_data()
88 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); in platform_mhu_startup()
89 writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS); in platform_mhu_startup()
142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in platform_mhu_probe()
/linux/drivers/net/wireless/ath/ath5k/
H A Ddma.c355 u16 tx_reg; in ath5k_hw_get_txdp() local
366 tx_reg = AR5K_NOQCU_TXDP0; in ath5k_hw_get_txdp()
370 tx_reg = AR5K_NOQCU_TXDP1; in ath5k_hw_get_txdp()
376 tx_reg = AR5K_QUEUE_TXDP(queue); in ath5k_hw_get_txdp()
379 return ath5k_hw_reg_read(ah, tx_reg); in ath5k_hw_get_txdp()
398 u16 tx_reg; in ath5k_hw_set_txdp() local
409 tx_reg = AR5K_NOQCU_TXDP0; in ath5k_hw_set_txdp()
413 tx_reg = AR5K_NOQCU_TXDP1; in ath5k_hw_set_txdp()
427 tx_reg = AR5K_QUEUE_TXDP(queue); in ath5k_hw_set_txdp()
431 ath5k_hw_reg_write(ah, phys_addr, tx_reg); in ath5k_hw_set_txdp()
/linux/include/linux/
H A Dpch_dma.h20 dma_addr_t tx_reg; member
/linux/arch/mips/include/asm/txx9/
H A Ddmac.h40 u64 tx_reg; member
/linux/drivers/dma/
H A Dtxx9dmac.c351 if (ds->tx_reg) { in txx9dmac_dostart()
372 if (ds->tx_reg) { in txx9dmac_dostart()
818 if (ds->tx_reg) in txx9dmac_prep_slave_sg()
843 desc->hwdesc.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
852 desc->hwdesc32.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg)) in txx9dmac_alloc_chan_resources()
H A Dpch_dma.c583 reg = pd_slave->tx_reg; in pd_prep_slave_sg()
/linux/drivers/media/rc/
H A Dene_ir.h209 int tx_reg; /* current reg used for TX */ member
H A Dene_ir.c650 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx); in ene_tx_sample()
652 dev->tx_reg = !dev->tx_reg; in ene_tx_sample()
961 dev->tx_reg = 0; in ene_transmit()
/linux/drivers/spi/
H A Dspi-omap2-mcspi.c708 void __iomem *tx_reg; in omap2_mcspi_txrx_pio() local
721 tx_reg = base + OMAP2_MCSPI_TX0; in omap2_mcspi_txrx_pio()
745 writel_relaxed(*tx++, tx_reg); in omap2_mcspi_txrx_pio()
794 writel_relaxed(*tx++, tx_reg); in omap2_mcspi_txrx_pio()
843 writel_relaxed(*tx++, tx_reg); in omap2_mcspi_txrx_pio()
H A Dspi-topcliff-pch.c845 param->tx_reg = data->io_base_addr + PCH_SPDWR; in pch_spi_request_dma()
/linux/drivers/net/phy/
H A Dmotorcomm.c886 u32 rx_reg, tx_reg; in ytphy_rgmii_clk_delay_config() local
894 tx_reg = ytphy_get_delay_reg_value(phydev, "tx-internal-delay-ps", in ytphy_rgmii_clk_delay_config()
907 val |= FIELD_PREP(YT8521_RC1R_GE_TX_DELAY_MASK, tx_reg); in ytphy_rgmii_clk_delay_config()
911 FIELD_PREP(YT8521_RC1R_GE_TX_DELAY_MASK, tx_reg); in ytphy_rgmii_clk_delay_config()
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c4671 u32 tx_reg; in i40e_pf_txq_wait() local
4674 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); in i40e_pf_txq_wait()
4675 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) in i40e_pf_txq_wait()
4699 u32 tx_reg; in i40e_control_tx_q() local
4708 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); in i40e_control_tx_q()
4709 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == in i40e_control_tx_q()
4710 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) in i40e_control_tx_q()
4716 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) in i40e_control_tx_q()
4722 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; in i40e_control_tx_q()
4724 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; in i40e_control_tx_q()
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/linux/drivers/tty/serial/
H A Dpch_uart.c687 param->tx_reg = port->mapbase + UART_TX; in pch_request_dma()