| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| H A D | dc_common.c | 65 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_upper_pipe_tree_visible()
74 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_pipe_tree_visible()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_mall_phantom.c | 53 if (pipe->stream && pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe && in dml2_helper_calculate_num_ways_for_subvp()
122 pipe->top_pipe = NULL; in merge_pipes_for_subvp()
128 } else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) { in merge_pipes_for_subvp()
129 struct pipe_ctx *top_pipe = pipe->top_pipe; in merge_pipes_for_subvp() local
132 top_pipe->bottom_pipe = bottom_pipe; in merge_pipes_for_subvp()
134 bottom_pipe->top_pipe = top_pipe; in merge_pipes_for_subvp()
136 pipe->top_pipe = NULL; in merge_pipes_for_subvp()
194 if (pipe->stream && !pipe->top_pipe) { in get_num_free_pipes()
255 if (pipe->plane_state && !pipe->top_pipe && in assign_subvp_pipe()
319 if (pipe->stream && !pipe->top_pipe && in enough_pipes_for_subvp()
[all …]
|
| H A D | dml2_utils.c | 348 (context->res_ctx.pipe_ctx[dc_pipe_ctx_index].top_pipe == NULL || in dml2_calculate_rq_and_dlg_params()
349 …pe_ctx_index].plane_state != context->res_ctx.pipe_ctx[dc_pipe_ctx_index].top_pipe->plane_state) && in dml2_calculate_rq_and_dlg_params()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 129 pipe->top_pipe = NULL; in dcn32_merge_pipes_for_subvp()
135 } else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) { in dcn32_merge_pipes_for_subvp()
136 struct pipe_ctx *top_pipe = pipe->top_pipe; in dcn32_merge_pipes_for_subvp() local
139 top_pipe->bottom_pipe = bottom_pipe; in dcn32_merge_pipes_for_subvp()
141 bottom_pipe->top_pipe = top_pipe; in dcn32_merge_pipes_for_subvp()
143 pipe->top_pipe = NULL; in dcn32_merge_pipes_for_subvp()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 567 if (pipe->stream && !pipe->top_pipe) { in dcn32_get_num_free_pipes()
628 …if (pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe && !dcn32_is_center_timing(pipe) … in dcn32_assign_subvp_pipe()
742 if (phantom && pipe->stream && pipe->plane_state && !pipe->top_pipe && in subvp_subvp_schedulable()
998 if (pipe->plane_state && !pipe->top_pipe && in subvp_subvp_admissable()
1053 if (pipe->plane_state && !pipe->top_pipe) { in subvp_validate_static_schedulability()
1738 (context->res_ctx.pipe_ctx[i].top_pipe == NULL || in dcn32_calculate_dlg_params()
1739 … context->res_ctx.pipe_ctx[i].plane_state != context->res_ctx.pipe_ctx[i].top_pipe->plane_state) && in dcn32_calculate_dlg_params()
1820 if (dc->current_state->res_ctx.pipe_ctx[i].top_pipe == NULL in dcn32_find_split_pipe()
1896 if (pri_pipe->top_pipe && pri_pipe->top_pipe->next_odm_pipe) { in dcn32_split_stream_for_mpc_or_odm()
1897 pri_pipe->top_pipe->next_odm_pipe->bottom_pipe = sec_pipe; in dcn32_split_stream_for_mpc_or_odm()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 115 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
945 for (other_pipe = pipe->top_pipe; other_pipe != NULL; other_pipe = other_pipe->top_pipe) { in calculate_vready_offset_for_group()
974 if (pipe_ctx->top_pipe != NULL) in dcn10_enable_stream_timing()
1107 if (pipe_ctx->top_pipe == NULL) { in dcn10_reset_back_end_for_pipe()
1332 pipe_ctx->top_pipe = NULL; in dcn10_plane_atomic_disable()
1745 if (pipe_ctx_old->top_pipe) in dcn10_reset_hw_ctx_wrap()
1765 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
1766 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
1940 if (!pipe || pipe->top_pipe) in dcn10_pipe_control_lock()
2028 if (!pipe || pipe->top_pipe) in dcn10_cursor_lock()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_resource.c | 42 if (pipe->stream && pipe->stream->link && pipe->top_pipe == NULL) { in link_get_cur_link_res()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 312 } else if (pipe->top_pipe != NULL && pipe->top_pipe->plane_state == pipe->plane_state) { in pipe_ctx_to_e2e_pipe_params()
545 secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; in split_stream_across_pipes()
548 secondary_pipe->top_pipe = primary_pipe; in split_stream_across_pipes()
899 if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) in dcn_validate_bandwidth()
1206 if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) in dcn_validate_bandwidth()
1271 hsplit_pipe->bottom_pipe->top_pipe = pipe; in dcn_validate_bandwidth()
1274 hsplit_pipe->top_pipe = NULL; in dcn_validate_bandwidth()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 60 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
61 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
534 if (pipe->top_pipe) in dcn201_pipe_control_lock()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 1426 if (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state in dcn20_populate_dml_pipes_from_context()
1428 struct pipe_ctx *first_pipe = res_ctx->pipe_ctx[i].top_pipe; in dcn20_populate_dml_pipes_from_context()
1431 while (first_pipe->top_pipe && first_pipe->top_pipe->plane_state in dcn20_populate_dml_pipes_from_context()
1433 first_pipe = first_pipe->top_pipe; in dcn20_populate_dml_pipes_from_context()
1442 pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx; in dcn20_populate_dml_pipes_from_context()
1594 || (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state == pln) in dcn20_populate_dml_pipes_from_context()
1663 split_pipe = res_ctx->pipe_ctx[i].top_pipe; in dcn20_populate_dml_pipes_from_context()
1666 split_pipe = split_pipe->top_pipe; in dcn20_populate_dml_pipes_from_context()
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_state.c | 153 if (cur_pipe->top_pipe) in dc_state_copy_internal()
154 cur_pipe->top_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx]; in dc_state_copy_internal()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| H A D | dcn314_hwseq.c | 385 if (pipe->top_pipe || pipe->prev_odm_pipe) in dcn314_resync_fifo_dccg_dio()
463 if (pipe_ctx->stream && pipe_ctx->stream->link == link && pipe_ctx->top_pipe == NULL) { in apply_symclk_on_tx_off_wa()
|
| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 417 …if (split_pipe->stream == head_pipe->stream && (split_pipe->top_pipe || split_pipe->prev_odm_pipe)… in dc_dmub_srv_populate_fams_pipe_info()
1007 for (test_pipe = pipe_ctx->top_pipe; test_pipe; in dc_can_pipe_disable_cursor()
1008 test_pipe = test_pipe->top_pipe) { in dc_can_pipe_disable_cursor()
1021 for (split_pipe = pipe_ctx->top_pipe; split_pipe; in dc_can_pipe_disable_cursor()
1022 split_pipe = split_pipe->top_pipe) in dc_can_pipe_disable_cursor()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 2268 if (!pipe_ctx_old->stream || pipe_ctx_old->top_pipe) in dce110_reset_hw_ctx_wrap()
2352 if (pipe_ctx->top_pipe) in dce110_setup_audio_dto()
2390 if (pipe_ctx->top_pipe) in dce110_setup_audio_dto()
2444 if (pipe_ctx->stream == NULL || pipe_ctx->top_pipe) in dce110_apply_ctx_to_hw()
2484 if (pipe_ctx->top_pipe || pipe_ctx->prev_odm_pipe) in dce110_apply_ctx_to_hw()
3116 if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state) in dce110_set_cursor_position()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_utils.c | 258 (dc_pipe->top_pipe == NULL || in dml21_populate_mall_allocation_size()
259 dc_pipe->plane_state != dc_pipe->top_pipe->plane_state) && in dml21_populate_mall_allocation_size()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.c | 518 ASSERT(!pipe_ctx->top_pipe); in dcn31_reset_back_end_for_pipe()
592 if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe) in dcn31_reset_hw_ctx_wrap()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| H A D | dce_clk_mgr.c | 177 if (pipe_ctx->top_pipe) in dce_get_max_pixel_clock_for_all_paths()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 854 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn21_fast_validate_bw()
868 if (pipe->top_pipe && pipe->plane_state == pipe->top_pipe->plane_state) in dcn21_fast_validate_bw()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 368 if (pipe_ctx->top_pipe == NULL) { in dcn30_program_gamut_remap()
390 if (pipe_ctx->top_pipe == NULL) { in dcn30_set_output_transfer_func()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 113 if (pipe->top_pipe || pipe->prev_odm_pipe) in dcn316_disable_otg_wa()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 913 if (!pipe_ctx->top_pipe in dcn35_enable_plane()
952 pipe_ctx->top_pipe = NULL; in dcn35_plane_atomic_disable()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_clk_mgr.c | 196 if (pipe_ctx->top_pipe) in get_max_pixel_clock_for_all_paths()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 108 if (pipe->top_pipe || pipe->prev_odm_pipe) in dcn315_disable_otg_wa()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 142 if (pipe->top_pipe || pipe->prev_odm_pipe) in dcn35_disable_otg_wa()
|