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Searched refs:top_pipe (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1424 if (pipe_ctx->top_pipe) in dcn20_add_dsc_to_stream_resource()
1455 if (new_ctx->res_ctx.pipe_ctx[i].stream == dc_stream && !new_ctx->res_ctx.pipe_ctx[i].top_pipe) { in remove_dsc_from_stream_resource()
1538 if (prev_odm_pipe->top_pipe && prev_odm_pipe->top_pipe->next_odm_pipe) { in dcn20_split_stream_for_odm()
1539 prev_odm_pipe->top_pipe->next_odm_pipe->bottom_pipe = next_odm_pipe; in dcn20_split_stream_for_odm()
1540 next_odm_pipe->top_pipe = prev_odm_pipe->top_pipe->next_odm_pipe; in dcn20_split_stream_for_odm()
1543 prev_odm_pipe->bottom_pipe->next_odm_pipe->top_pipe = next_odm_pipe; in dcn20_split_stream_for_odm()
1556 if (!next_odm_pipe->top_pipe) in dcn20_split_stream_for_odm()
1559 next_odm_pipe->stream_res.opp = next_odm_pipe->top_pipe->stream_res.opp; in dcn20_split_stream_for_odm()
1560 if (next_odm_pipe->stream->timing.flags.DSC == 1 && !next_odm_pipe->top_pipe) { in dcn20_split_stream_for_odm()
1594 secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; in dcn20_split_stream_for_mpc()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_dc_resource_mgmt.c115 if (!state->res_ctx.pipe_ctx[i].prev_odm_pipe && !state->res_ctx.pipe_ctx[i].top_pipe) in find_master_pipe_of_stream()
158 && (!pipe->top_pipe || pipe->top_pipe->plane_state != pipe->plane_state)) { in find_pipes_assigned_to_plane()
574 struct pipe_ctx *top_pipe) in add_plane_to_blend_tree() argument
581 if (top_pipe) in add_plane_to_blend_tree()
582top_pipe->bottom_pipe = &state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]]; in add_plane_to_blend_tree()
586 state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]].top_pipe = top_pipe; in add_plane_to_blend_tree()
589 top_pipe = &state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]]; in add_plane_to_blend_tree()
594 return top_pipe; in add_plane_to_blend_tree()
605 …if (pipe->stream && pipe->stream->stream_id == stream_id && !pipe->top_pipe && !pipe->prev_odm_pip… in find_pipes_assigned_to_stream()
739 if (pipe->top_pipe) in remove_pipes_from_blend_trees()
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H A Ddml2_utils.c349 (context->res_ctx.pipe_ctx[dc_pipe_ctx_index].top_pipe == NULL || in dml2_calculate_rq_and_dlg_params()
350 …pe_ctx_index].plane_state != context->res_ctx.pipe_ctx[dc_pipe_ctx_index].top_pipe->plane_state) && in dml2_calculate_rq_and_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c1639 if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state == plane_state) { in resource_build_scaling_params()
1706 for (test_pipe = pipe_ctx->top_pipe; test_pipe; in resource_can_pipe_disable_cursor()
1707 test_pipe = test_pipe->top_pipe) { in resource_can_pipe_disable_cursor()
1725 for (split_pipe = pipe_ctx->top_pipe; split_pipe; in resource_can_pipe_disable_cursor()
1726 split_pipe = split_pipe->top_pipe) in resource_can_pipe_disable_cursor()
1991 !pipe_ctx->top_pipe && in resource_is_pipe_type()
1994 return !pipe_ctx->top_pipe && pipe_ctx->stream; in resource_is_pipe_type()
2073 pipe->top_pipe->plane_state != plane) in resource_get_dpp_pipes_for_plane()
2107 while (opp_head->top_pipe) in resource_get_opp_head()
2108 opp_head = opp_head->top_pipe; in resource_get_opp_head()
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H A Ddc_hw_sequencer.c331 struct pipe_ctx *top_pipe = pipe_ctx; in get_mpctree_visual_confirm_color() local
333 while (top_pipe->top_pipe) in get_mpctree_visual_confirm_color()
334 top_pipe = top_pipe->top_pipe; in get_mpctree_visual_confirm_color()
336 *color = pipe_colors[top_pipe->pipe_idx]; in get_mpctree_visual_confirm_color()
399 while (top_pipe_ctx->top_pipe != NULL) in get_hdr_visual_confirm_color()
400 top_pipe_ctx = top_pipe_ctx->top_pipe; in get_hdr_visual_confirm_color()
2344 struct pipe_ctx *top_pipe = pipe_ctx; in hwss_dsc_calculate_and_set_config() local
2357 while (top_pipe->prev_odm_pipe) in hwss_dsc_calculate_and_set_config()
2358 top_pipe = top_pipe->prev_odm_pipe; in hwss_dsc_calculate_and_set_config()
2360 …dsc_cfg.pic_width = (stream->timing.h_addressable + top_pipe->dsc_padding_params.dsc_hactive_paddi… in hwss_dsc_calculate_and_set_config()
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/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1580 if (pri_pipe->top_pipe && pri_pipe->top_pipe->next_odm_pipe) { in dcn30_split_stream_for_mpc_or_odm()
1581 pri_pipe->top_pipe->next_odm_pipe->bottom_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1582 sec_pipe->top_pipe = pri_pipe->top_pipe->next_odm_pipe; in dcn30_split_stream_for_mpc_or_odm()
1585 pri_pipe->bottom_pipe->next_odm_pipe->top_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1591 if (!sec_pipe->top_pipe) in dcn30_split_stream_for_mpc_or_odm()
1594 sec_pipe->stream_res.opp = sec_pipe->top_pipe->stream_res.opp; in dcn30_split_stream_for_mpc_or_odm()
1605 sec_pipe->bottom_pipe->top_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1608 sec_pipe->top_pipe = pri_pipe; in dcn30_split_stream_for_mpc_or_odm()
1631 if (dc->current_state->res_ctx.pipe_ctx[i].top_pipe == NULL in dcn30_find_split_pipe()
1775 pipe->top_pipe = NULL; in dcn30_internal_validate_bw()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c567 if (pipe->stream && !pipe->top_pipe) { in dcn32_get_num_free_pipes()
628 …if (pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe && !dcn32_is_center_timing(pipe) … in dcn32_assign_subvp_pipe()
744 if (phantom && pipe->stream && pipe->plane_state && !pipe->top_pipe && in subvp_subvp_schedulable()
1000 if (pipe->plane_state && !pipe->top_pipe && in subvp_subvp_admissable()
1055 if (pipe->plane_state && !pipe->top_pipe) { in subvp_validate_static_schedulability()
1710 (context->res_ctx.pipe_ctx[i].top_pipe == NULL || in dcn32_calculate_dlg_params()
1711 … context->res_ctx.pipe_ctx[i].plane_state != context->res_ctx.pipe_ctx[i].top_pipe->plane_state) && in dcn32_calculate_dlg_params()
1787 if (dc->current_state->res_ctx.pipe_ctx[i].top_pipe == NULL in dcn32_find_split_pipe()
1863 if (pri_pipe->top_pipe && pri_pipe->top_pipe->next_odm_pipe) { in dcn32_split_stream_for_mpc_or_odm()
1864 pri_pipe->top_pipe->next_odm_pipe->bottom_pipe = sec_pipe; in dcn32_split_stream_for_mpc_or_odm()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c124 if (pipe_ctx->top_pipe == NULL) { in dcn401_program_gamut_remap()
925 if (pipe_ctx->stream && pipe_ctx->stream->link == link && pipe_ctx->top_pipe == NULL) { in disable_link_output_symclk_on_tx_off()
998 if ((pipe_ctx->top_pipe != NULL) || (pipe_ctx->bottom_pipe != NULL)) { in dcn401_set_cursor_position()
1081 pipe_ctx->top_pipe && in dcn401_set_cursor_position()
1082 (pipe_ctx == pipe_ctx->top_pipe->bottom_pipe)) { in dcn401_set_cursor_position()
1264 const struct pipe_ctx *top_pipe) in dcn401_wait_for_dcc_meta_propagation() argument
1267 const struct pipe_ctx *pipe_ctx = top_pipe; in dcn401_wait_for_dcc_meta_propagation()
1914 if (pipe_ctx->top_pipe == NULL) { in dcn401_reset_back_end_for_pipe()
1950 pipe_ctx->top_pipe = NULL; in dcn401_reset_back_end_for_pipe()
1991 if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe) in dcn401_reset_hw_ctx_wrap()
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/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_resource.c42 if (pipe->stream && pipe->stream->link && pipe->top_pipe == NULL) { in link_get_cur_link_res()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c63 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
64 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
537 if (pipe->top_pipe) in dcn201_pipe_control_lock()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1426 if (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state in dcn20_populate_dml_pipes_from_context()
1428 struct pipe_ctx *first_pipe = res_ctx->pipe_ctx[i].top_pipe; in dcn20_populate_dml_pipes_from_context()
1431 while (first_pipe->top_pipe && first_pipe->top_pipe->plane_state in dcn20_populate_dml_pipes_from_context()
1433 first_pipe = first_pipe->top_pipe; in dcn20_populate_dml_pipes_from_context()
1442 pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx; in dcn20_populate_dml_pipes_from_context()
1594 || (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state == pln) in dcn20_populate_dml_pipes_from_context()
1663 split_pipe = res_ctx->pipe_ctx[i].top_pipe; in dcn20_populate_dml_pipes_from_context()
1666 split_pipe = split_pipe->top_pipe; in dcn20_populate_dml_pipes_from_context()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_utils.c172 (dc_pipe->top_pipe == NULL || in dml21_populate_mall_allocation_size()
173 dc_pipe->plane_state != dc_pipe->top_pipe->plane_state) && in dml21_populate_mall_allocation_size()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c2398 if (!pipe_ctx_old->stream || pipe_ctx_old->top_pipe) in dce110_reset_hw_ctx_wrap()
2482 if (pipe_ctx->top_pipe) in dce110_setup_audio_dto()
2520 if (pipe_ctx->top_pipe) in dce110_setup_audio_dto()
2574 if (pipe_ctx->stream == NULL || pipe_ctx->top_pipe) in dce110_apply_ctx_to_hw()
2614 if (pipe_ctx->top_pipe || pipe_ctx->prev_odm_pipe) in dce110_apply_ctx_to_hw()
3270 if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state) in dce110_set_cursor_position()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c887 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn21_fast_validate_bw()
901 if (pipe->top_pipe && pipe->plane_state == pipe->top_pipe->plane_state) in dcn21_fast_validate_bw()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c1691 …if (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state != res_ctx->pipe_c… in allow_pixel_rate_crb()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c1340 if (pipes[i].stream->link == link && !pipes[i].top_pipe && in dm_helpers_dp_handle_test_pattern_request()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c1684 if (curr_pipe->top_pipe && curr_pipe->top_pipe->plane_state == curr_pipe->plane_state) in dcn32_enable_phantom_plane()