Searched refs:tmz_surface (Results 1 – 8 of 8) sorted by relevance
54 bool tmz_surface);
848 bool tmz_surface) in amdgpu_dm_plane_fill_plane_buffer_attributes() argument858 address->tmz_surface = tmz_surface; in amdgpu_dm_plane_fill_plane_buffer_attributes()1012 afb->tmz_surface); in amdgpu_dm_plane_helper_prepare_fb()
6095 bool tmz_surface) in fill_dc_plane_info_and_addr() argument6194 tmz_surface); in fill_dc_plane_info_and_addr()6229 afb->tmz_surface); in fill_dc_plane_attributes()10014 afb->tmz_surface); in amdgpu_dm_commit_planes()
1162 uint64_t *tiling_flags, bool *tmz_surface, in amdgpu_display_get_fb_info() argument1170 *tmz_surface = false; in amdgpu_display_get_fb_info()1186 *tmz_surface = amdgpu_bo_encrypted(rbo); in amdgpu_display_get_fb_info()1257 ret = amdgpu_display_get_fb_info(rfb, &rfb->tiling_flags, &rfb->tmz_surface, in amdgpu_display_framebuffer_init()
71 uint8_t tmz_surface; member
2862 if (u->flip_addr->address.tmz_surface != u->surface->address.tmz_surface) { in det_surface_update()5117 srf_updates[i].flip_addr->address.tmz_surface != srf_updates[i].surface->address.tmz_surface) || in full_update_required()6611 state->hubp[i].primary_surface_tmz = pipe_ctx->plane_state->address.tmz_surface; in dc_capture_register_software_state()6612 state->hubp[i].primary_meta_surface_tmz = pipe_ctx->plane_state->address.tmz_surface; in dc_capture_register_software_state()
1312 plane->address.tmz_surface) { in dcn401_apply_idle_power_optimizations()3953 !pipe->plane_state->address.tmz_surface) ? 2 : 0; in dcn401_program_mall_pipe_config_sequence()
2054 uint32_t tmz_surface : 1; /**< TMZ enable or disable */ member