/linux/arch/riscv/lib/ |
H A D | memset.S | 12 move t0, a0 /* Preserve return value */ 22 addi a3, t0, SZREG-1 24 beq a3, t0, 2f /* Skip if already aligned */ 26 sub a4, a3, t0 28 sb a1, 0(t0) 29 addi t0, t0, 1 30 bltu t0, a3, 1b 47 add a3, t0, a4 55 sub t0, t0, a4 66 REG_S a1, 0(t0) [all …]
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/linux/drivers/soc/bcm/brcmstb/pm/ |
H A D | s3-mips.S | 25 la t0, gp_regs 26 sw ra, 0(t0) 27 sw s0, 4(t0) 28 sw s1, 8(t0) 29 sw s2, 12(t0) 30 sw s3, 16(t0) 31 sw s4, 20(t0) 32 sw s5, 24(t0) 33 sw s6, 28(t0) 34 sw s7, 32(t0) [all …]
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H A D | s2-mips.S | 42 move t0, a0 44 lw s0, 0(t0) 45 lw s1, 4(t0) 46 lw s2, 8(t0) 47 lw s3, 12(t0) 48 lw s4, 16(t0) 49 lw s5, 20(t0) 55 la t0, brcm_pm_do_s2 56 and t0, t1 61 1: cache 0x1c, 0(t0) [all …]
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/linux/arch/loongarch/power/ |
H A D | hibernate_asm.S | 15 la.pcrel t0, saved_regs 16 PTR_S ra, t0, PT_R1 17 PTR_S tp, t0, PT_R2 18 PTR_S sp, t0, PT_R3 19 PTR_S u0, t0, PT_R21 20 PTR_S fp, t0, PT_R22 21 PTR_S s0, t0, PT_R23 22 PTR_S s1, t0, PT_R24 23 PTR_S s2, t0, PT_R25 24 PTR_S s3, t0, PT_R26 [all …]
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/linux/arch/mips/kernel/ |
H A D | cps-vec.S | 103 li t0, 0xff 104 sw t0, GCR_CL_COHERENCE_OFS(s1) 109 1: mfc0 t0, CP0_CONFIG 110 ori t0, 0x7 111 xori t0, 0x7 112 or t0, t0, s0 113 mtc0 t0, CP0_CONFIG 117 PTR_LA t0, 1f 118 jr t0 196 has_mt t0, 3f [all …]
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H A D | bmips_5xxx_init.S | 33 and t0, kva, t2 ; \ 36 9: cache op, 0(t0) ; \ 37 bne t0, t1, 9b ; \ 38 addu t0, linesize ; \ 123 move t0, a0 150 move a0, t0 178 move a0, t0 216 move t0, a0 242 move a0, t0 269 move a0, t0 [all …]
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H A D | octeon_switch.S | 33 dmfc0 t0, $11,7 /* CvmMemCtl */ 34 bbit0 t0, 6, 3f /* Is user access enabled? */ 38 andi t0, 0x3f 40 sll t0, 7-LONGLOG-1 47 subu t0, 1 /* Decrement loop var */ 52 bnez t0, 2b /* Loop until we've copied it all */ 57 dmfc0 t0, $11,7 /* CvmMemCtl */ 58 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */ 59 dmtc0 t0, $11,7 /* CvmMemCtl */ 76 PTR_ADDU t0, $28, _THREAD_SIZE - 32 [all …]
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H A D | scall64-o32.S | 36 dsubu t0, v0, __NR_O32_Linux # check syscall number 37 sltiu t0, t0, __NR_O32_Linux_syscalls 40 beqz t0, not_o32_scall 65 ld t0, PT_R29(sp) # get old user stack pointer 66 daddu t1, t0, 32 69 load_a4: lw a4, 16(t0) # argument #5 from usp 70 load_a5: lw a5, 20(t0) # argument #6 from usp 71 load_a6: lw a6, 24(t0) # argument #7 from usp 72 load_a7: lw a7, 28(t0) # argument #8 from usp 99 LONG_L t0, TI_FLAGS($28) # syscall tracing enabled? [all …]
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/linux/arch/loongarch/kernel/ |
H A D | head.S | 47 SETUP_DMWINS t0 48 JUMP_VIRT_ADDR t0, t1 51 li.w t0, 0xb0 # PLV=0, IE=0, PG=1 52 csrwr t0, LOONGARCH_CSR_CRMD 53 li.w t0, 0x04 # PLV=0, PIE=1, PWE=0 54 csrwr t0, LOONGARCH_CSR_PRMD 55 li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0 56 csrwr t0, LOONGARCH_CSR_EUEN 58 la.pcrel t0, __bss_start # clear .bss 59 st.d zero, t0, 0 [all …]
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H A D | genex.S | 22 LONG_L t0, tp, TI_FLAGS 24 andi t0, t0, _TIF_NEED_RESCHED 25 bnez t0, 1f 39 LONG_L t0, sp, PT_ERA 41 ori t0, t0, 0x1f 42 xori t0, t0, 0x1f 43 bne t0, t1, 1f 44 LONG_S t0, sp, PT_ERA 47 la_abs t0, do_vint 48 jirl ra, t0, 0 [all …]
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/linux/arch/mips/power/ |
H A D | hibernate_asm.S | 15 PTR_LA t0, saved_regs 16 PTR_S ra, PT_R31(t0) 17 PTR_S sp, PT_R29(t0) 18 PTR_S fp, PT_R30(t0) 19 PTR_S gp, PT_R28(t0) 20 PTR_S s0, PT_R16(t0) 21 PTR_S s1, PT_R17(t0) 22 PTR_S s2, PT_R18(t0) 23 PTR_S s3, PT_R19(t0) 24 PTR_S s4, PT_R20(t0) [all …]
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/linux/arch/arm/crypto/ |
H A D | sha512-armv4.pl | 73 $t0="r9"; 97 mov $t0,$Elo,lsr#14 101 eor $t0,$t0,$Ehi,lsl#18 105 eor $t0,$t0,$Elo,lsr#18 107 eor $t0,$t0,$Ehi,lsl#14 109 eor $t0,$t0,$Ehi,lsr#9 111 eor $t0,$t0,$Elo,lsl#23 113 adds $Tlo,$Tlo,$t0 114 ldr $t0,[sp,#$Foff+0] @ f.lo 122 eor $t0,$t0,$t2 [all …]
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/linux/arch/riscv/crypto/ |
H A D | sha256-riscv64-zvknha_or_zvknhb-zvkb.S | 115 la t0, K256 116 vle32.v K0, (t0) 117 addi t0, t0, 16 118 vle32.v K1, (t0) 119 addi t0, t0, 16 120 vle32.v K2, (t0) 121 addi t0, t0, 16 122 vle32.v K3, (t0) 123 addi t0, t0, 16 124 vle32.v K4, (t0) [all …]
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/linux/arch/mips/include/asm/mach-ip27/ |
H A D | kernel-entry-init.h | 34 dli t0, 0xffffffffc0000000 35 dmtc0 t0, CP0_ENTRYHI 36 li t0, 0x1c000 # Offset of text into node memory 39 or t1, t1, t0 # Physical load address of kernel text 40 or t2, t2, t0 # Physical load address of kernel data 45 li t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6) 46 or t0, t0, t1 47 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr 48 li t0, ((PAGE_GLOBAL | PAGE_VALID | PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6) 49 or t0, t0, t2 [all …]
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/linux/arch/mips/alchemy/common/ |
H A D | sleeper.S | 56 lw t0, 0(t1) 57 jalr t0 93 la t0, 1f 95 cache 0x14, 0(t0) 96 cache 0x14, 32(t0) 97 cache 0x14, 64(t0) 98 cache 0x14, 96(t0) 119 la t0, 1f 121 cache 0x14, 0(t0) 122 cache 0x14, 32(t0) [all …]
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/linux/arch/loongarch/kvm/ |
H A D | switch.S | 51 csrrd t0, LOONGARCH_CSR_ECFG 52 bstrins.w t0, zero, CSR_ECFG_VS_SHIFT_END, CSR_ECFG_VS_SHIFT 53 csrwr t0, LOONGARCH_CSR_ECFG 56 ld.d t0, a2, KVM_ARCH_GEENTRY 57 csrwr t0, LOONGARCH_CSR_EENTRY 60 ld.d t0, a2, KVM_ARCH_GPC 61 csrwr t0, LOONGARCH_CSR_ERA 64 csrrd t0, LOONGARCH_CSR_PGDL 65 st.d t0, a2, KVM_ARCH_HPGD 71 li.w t0, KVM_GPGD [all …]
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/linux/arch/mips/include/asm/mach-loongson64/ |
H A D | kernel-entry-init.h | 23 mfc0 t0, CP0_PAGEGRAIN 24 or t0, (0x1 << 29) 25 mtc0 t0, CP0_PAGEGRAIN 27 mfc0 t0, CP0_PRID 29 andi t1, t0, PRID_IMP_MASK 34 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) 35 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) 36 bnez t0, 2f 39 mfc0 t0, CP0_CONFIG6 40 or t0, 0x100 [all …]
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/linux/arch/csky/abiv2/ |
H A D | strcmp.S | 18 ldw t0, (a3, 0) 21 cmpne t0, t1 24 tstnbz t0 28 ldw t0, (a3, 4) 30 cmpne t0, t1 32 tstnbz t0 35 ldw t0, (a3, 8) 37 cmpne t0, t1 39 tstnbz t0 42 ldw t0, (a3, 12) [all …]
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H A D | strcpy.S | 10 andi t0, a1, 3 11 bnez t0, 11f 87 xtrb0 t0, a2 88 st.b t0, (a3) 89 bez t0, 10f 90 xtrb1 t0, a2 91 st.b t0, (a3, 1) 92 bez t0, 10f 93 xtrb2 t0, a2 94 st.b t0, (a3, 2) [all …]
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/linux/arch/loongarch/lib/ |
H A D | memcpy.S | 42 1: ld.b t0, a1, 0 43 st.b t0, a0, 0 56 pcaddi t0, 8 58 add.d t0, t0, a2 59 jr t0 65 1: ld.b t0, a1, 0 66 st.b t0, a0, 0 70 2: ld.h t0, a1, 0 71 st.h t0, a0, 0 75 3: ld.h t0, a1, 0 [all …]
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H A D | copy_user.S | 35 1: ld.b t0, a1, 0 36 2: st.b t0, a0, 0 57 sltui t0, a2, 9 58 bnez t0, .Lsmall 60 0: ld.d t0, a1, 0 61 1: st.d t0, a0, 0 67 sub.d t0, zero, t1 68 addi.d t0, t0, 8 69 add.d a1, a1, t0 70 add.d a0, a0, t0 [all …]
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/linux/arch/mips/include/asm/mach-malta/ |
H A D | kernel-entry-init.h | 52 li t0, ((MIPS_SEGCFG_MK << MIPS_SEGCFG_AM_SHIFT) | \ 58 or t0, t2 59 mtc0 t0, CP0_SEGCTL0 62 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ 69 ins t0, t1, 16, 3 70 mtc0 t0, CP0_SEGCTL1 73 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ 79 or t0, t2 80 mtc0 t0, CP0_SEGCTL2 83 mfc0 t0, $16, 5 [all …]
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/linux/arch/mips/cavium-octeon/ |
H A D | octeon-memcpy.S | 105 #undef t0 109 #define t0 $8 macro 187 EXC( LOAD t0, UNIT(0)(src), l_exc) 192 EXC( STORE t0, UNIT(0)(dst), s_exc_p16u) 196 EXC( LOAD t0, UNIT(4)(src), l_exc_copy) 200 EXC( STORE t0, UNIT(4)(dst), s_exc_p12u) 206 EXC( LOAD t0, UNIT(-8)(src), l_exc_copy_rewind16) 210 EXC( STORE t0, UNIT(-8)(dst), s_exc_p8u) 214 EXC( LOAD t0, UNIT(-4)(src), l_exc_copy_rewind16) 218 EXC( STORE t0, UNIT(-4)(dst), s_exc_p4u) [all …]
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/linux/include/crypto/ |
H A D | aria.h | 337 static inline u32 aria_m(u32 t0) in aria_m() argument 339 return rotr32(t0, 8) ^ rotr32(t0 ^ rotr32(t0, 8), 16); in aria_m() 343 static inline void aria_sbox_layer1_with_pre_diff(u32 *t0, u32 *t1, u32 *t2, in aria_sbox_layer1_with_pre_diff() argument 346 *t0 = s1[get_u8(*t0, 0)] ^ in aria_sbox_layer1_with_pre_diff() 347 s2[get_u8(*t0, 1)] ^ in aria_sbox_layer1_with_pre_diff() 348 x1[get_u8(*t0, 2)] ^ in aria_sbox_layer1_with_pre_diff() 349 x2[get_u8(*t0, 3)]; in aria_sbox_layer1_with_pre_diff() 365 static inline void aria_sbox_layer2_with_pre_diff(u32 *t0, u32 *t1, u32 *t2, in aria_sbox_layer2_with_pre_diff() argument 368 *t0 = x1[get_u8(*t0, 0)] ^ in aria_sbox_layer2_with_pre_diff() 369 x2[get_u8(*t0, 1)] ^ in aria_sbox_layer2_with_pre_diff() [all …]
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/linux/arch/mips/lib/ |
H A D | csum_partial.S | 25 #undef t0 29 #define t0 $8 macro 121 lbu t0, (src) 124 sll t0, t0, 8 126 ADDC(sum, t0) 134 lhu t0, (src) 136 ADDC(sum, t0) 148 LOAD32 t0, 0x00(src) 150 ADDC(sum, t0) 159 ld t0, 0x00(src) [all …]
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