Home
last modified time | relevance | path

Searched refs:supported_reset (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_jpeg.h132 uint32_t supported_reset; member
H A Damdgpu_vpe.c383 adev->vpe.supported_reset = in vpe_sw_init()
887 return amdgpu_show_reset_mask(buf, adev->vpe.supported_reset); in amdgpu_get_vpe_reset_mask()
H A Damdgpu_vcn.h347 uint32_t supported_reset; member
H A Damdgpu_sdma.c431 return amdgpu_show_reset_mask(buf, adev->sdma.supported_reset); in amdgpu_get_sdma_reset_mask()
H A Djpeg_v5_0_0.c104 adev->jpeg.supported_reset = in jpeg_v5_0_0_sw_init()
H A Dsdma_v5_2.c1360 adev->sdma.supported_reset = in sdma_v5_2_sw_init()
1368 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v5_2_sw_init()
1372 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v5_2_sw_init()
H A Djpeg_v4_0.c127 adev->jpeg.supported_reset = in jpeg_v4_0_sw_init()
H A Damdgpu_device.c6956 ssize_t amdgpu_show_reset_mask(char *buf, uint32_t supported_reset) in amdgpu_show_reset_mask() argument
6960 if (supported_reset == 0) { in amdgpu_show_reset_mask()
6967 if (supported_reset & AMDGPU_RESET_TYPE_SOFT_RESET) in amdgpu_show_reset_mask()
6970 if (supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE) in amdgpu_show_reset_mask()
6973 if (supported_reset & AMDGPU_RESET_TYPE_PER_PIPE) in amdgpu_show_reset_mask()
6976 if (supported_reset & AMDGPU_RESET_TYPE_FULL) in amdgpu_show_reset_mask()
H A Djpeg_v4_0_5.c157 adev->jpeg.supported_reset = in jpeg_v4_0_5_sw_init()
H A Dsdma_v7_0.c1367 adev->sdma.supported_reset = in sdma_v7_0_sw_init()
1369 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v7_0_sw_init()
H A Dsdma_v6_0.c1353 adev->sdma.supported_reset = in sdma_v6_0_sw_init()
1360 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v6_0_sw_init()
H A Dsdma_v5_0.c1455 adev->sdma.supported_reset = in sdma_v5_0_sw_init()
1462 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v5_0_sw_init()
H A Dvcn_v5_0_1.c123 adev->vcn.supported_reset = in vcn_v5_0_1_sw_init()
H A Djpeg_v4_0_3.c163 adev->jpeg.supported_reset = in jpeg_v4_0_3_sw_init()
H A Dvcn_v5_0_0.c187 adev->vcn.supported_reset = in vcn_v5_0_0_sw_init()
H A Damdgpu_vcn.c1306 return amdgpu_show_reset_mask(buf, adev->vcn.supported_reset); in amdgpu_get_vcn_reset_mask()
H A Damdgpu.h1475 ssize_t amdgpu_show_reset_mask(char *buf, uint32_t supported_reset);
H A Dvcn_v4_0_3.c198 adev->vcn.supported_reset = in vcn_v4_0_3_sw_init()
H A Dsdma_v4_4_2.c1462 adev->sdma.supported_reset = in sdma_v4_4_2_sw_init()
H A Dvcn_v4_0.c229 adev->vcn.supported_reset = in vcn_v4_0_sw_init()