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Searched refs:supported_reset (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ring.c1139 if (ring->adev->sdma.supported_reset & reset_type) in amdgpu_ring_is_reset_type_supported()
1144 if (ring->adev->vcn.supported_reset & reset_type) in amdgpu_ring_is_reset_type_supported()
1148 if (ring->adev->jpeg.supported_reset & reset_type) in amdgpu_ring_is_reset_type_supported()
H A Djpeg_v4_0.c146 adev->jpeg.supported_reset = in jpeg_v4_0_sw_init()
149 adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in jpeg_v4_0_sw_init()
H A Djpeg_v4_0_5.c177 adev->jpeg.supported_reset = in jpeg_v4_0_5_sw_init()
180 adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in jpeg_v4_0_5_sw_init()
H A Damdgpu_userq.c69 if (adev->sdma.supported_reset & reset_type) in amdgpu_userq_is_reset_type_supported()
74 if (adev->vcn.supported_reset & reset_type) in amdgpu_userq_is_reset_type_supported()
78 if (adev->jpeg.supported_reset & reset_type) in amdgpu_userq_is_reset_type_supported()
H A Djpeg_v5_0_1.c228 adev->jpeg.supported_reset = in jpeg_v5_0_1_sw_init()
231 adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in jpeg_v5_0_1_sw_init()
H A Dvcn_v5_0_0.c188 adev->vcn.supported_reset = in vcn_v5_0_0_sw_init()
191 adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in vcn_v5_0_0_sw_init()
H A Djpeg_v4_0_3.c236 adev->jpeg.supported_reset = in jpeg_v4_0_3_sw_init()
239 adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in jpeg_v4_0_3_sw_init()
H A Dsdma_v4_4_2.c1525 adev->sdma.supported_reset = in sdma_v4_4_2_sw_init()
2360 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v4_4_2_update_reset_mask()
2366 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v4_4_2_update_reset_mask()
H A Damdgpu_device.c6811 ssize_t amdgpu_show_reset_mask(char *buf, uint32_t supported_reset) in amdgpu_show_reset_mask() argument
6815 if (supported_reset == 0) { in amdgpu_show_reset_mask()
6822 if (supported_reset & AMDGPU_RESET_TYPE_SOFT_RECOVERY) in amdgpu_show_reset_mask()
6825 if (supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE) in amdgpu_show_reset_mask()
6828 if (supported_reset & AMDGPU_RESET_TYPE_PER_PIPE) in amdgpu_show_reset_mask()
6831 if (supported_reset & AMDGPU_RESET_TYPE_FULL) in amdgpu_show_reset_mask()
H A Dvcn_v5_0_1.c133 adev->vcn.supported_reset = in vcn_v5_0_1_late_init()
141 adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in vcn_v5_0_1_late_init()
H A Dsdma_v7_1.c1326 adev->sdma.supported_reset = in sdma_v7_1_sw_init()
1330 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v7_1_sw_init()
H A Dsdma_v7_0.c1338 adev->sdma.supported_reset = in sdma_v7_0_sw_init()
1342 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v7_0_sw_init()
H A Dsdma_v6_0.c1354 adev->sdma.supported_reset = in sdma_v6_0_sw_init()
1358 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v6_0_sw_init()
H A Dsdma_v5_0.c1430 adev->sdma.supported_reset = in sdma_v5_0_sw_init()
1434 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v5_0_sw_init()
H A Dsdma_v5_2.c1348 adev->sdma.supported_reset = in sdma_v5_2_sw_init()
1352 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v5_2_sw_init()
H A Dvcn_v2_0.c218 adev->vcn.supported_reset = in vcn_v2_0_sw_init()
221 adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in vcn_v2_0_sw_init()
H A Dvcn_v4_0_3.c169 adev->vcn.supported_reset = in vcn_v4_0_3_late_init()
175 adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in vcn_v4_0_3_late_init()
H A Dvcn_v4_0.c240 adev->vcn.supported_reset = in vcn_v4_0_sw_init()
243 adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in vcn_v4_0_sw_init()
H A Dvcn_v3_0.c294 adev->vcn.supported_reset = in vcn_v3_0_sw_init()
297 adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in vcn_v3_0_sw_init()
H A Damdgpu.h1220 ssize_t amdgpu_show_reset_mask(char *buf, uint32_t supported_reset);