| /linux/crypto/ |
| H A D | sha3_generic.c | 47 static SHA3_INLINE void keccakf_round(u64 st[25]) in keccakf_round()
52 bc[0] = st[0] ^ st[5] ^ st[10] ^ st[15] ^ st[20]; in keccakf_round()
53 bc[1] = st[1] ^ st[6] ^ st[11] ^ st[16] ^ st[21]; in keccakf_round()
54 bc[2] = st[2] ^ st[7] ^ st[12] ^ st[17] ^ st[22]; in keccakf_round()
55 bc[3] = st[3] ^ st[8] ^ st[13] ^ st[18] ^ st[23]; in keccakf_round()
56 bc[4] = st[4] ^ st[9] ^ st[14] ^ st[19] ^ st[24]; in keccakf_round()
64 st[0] ^= t[0]; in keccakf_round()
67 tt = st[1]; in keccakf_round()
68 st[ 1] = rol64(st[ 6] ^ t[1], 44); in keccakf_round()
69 st[ 6] = rol64(st[ 9] ^ t[4], 20); in keccakf_round()
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| /linux/drivers/iio/dac/ |
| H A D | ad5592r-base.c | 25 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_get() local
29 mutex_lock(&st->gpio_lock); in ad5592r_gpio_get()
31 if (st->gpio_out & BIT(offset)) in ad5592r_gpio_get()
32 val = st->gpio_val; in ad5592r_gpio_get()
34 ret = st->ops->gpio_read(st, &val); in ad5592r_gpio_get()
36 mutex_unlock(&st->gpio_lock); in ad5592r_gpio_get()
46 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_set() local
48 mutex_lock(&st->gpio_lock); in ad5592r_gpio_set()
51 st->gpio_val |= BIT(offset); in ad5592r_gpio_set()
53 st->gpio_val &= ~BIT(offset); in ad5592r_gpio_set()
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| H A D | ad3552r-hs.c | 32 static int ad3552r_qspi_update_reg_bits(struct ad3552r_hs_state *st, in ad3552r_qspi_update_reg_bits() argument
39 ret = st->data->bus_reg_read(st->back, reg, &rval, xfer_size); in ad3552r_qspi_update_reg_bits()
45 return st->data->bus_reg_write(st->back, reg, rval, xfer_size); in ad3552r_qspi_update_reg_bits()
52 struct ad3552r_hs_state *st = iio_priv(indio_dev); in ad3552r_hs_read_raw() local
62 *val = DIV_ROUND_CLOSEST(st->data->bus_sample_data_clock_hz * in ad3552r_hs_read_raw()
68 ret = st->data->bus_reg_read(st->back, in ad3552r_hs_read_raw()
76 *val = st->ch_data[ch].scale_int; in ad3552r_hs_read_raw()
77 *val2 = st->ch_data[ch].scale_dec; in ad3552r_hs_read_raw()
80 *val = st->ch_data[ch].offset_int; in ad3552r_hs_read_raw()
81 *val2 = st->ch_data[ch].offset_dec; in ad3552r_hs_read_raw()
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| H A D | ad5758.c | 186 static int ad5758_spi_reg_read(struct ad5758_state *st, unsigned int addr) in ad5758_spi_reg_read() argument
190 .tx_buf = &st->d32[0], in ad5758_spi_reg_read()
194 .tx_buf = &st->d32[1], in ad5758_spi_reg_read()
195 .rx_buf = &st->d32[2], in ad5758_spi_reg_read()
201 st->d32[0] = cpu_to_be32( in ad5758_spi_reg_read()
204 st->d32[1] = cpu_to_be32(AD5758_WR_FLAG_MSK(AD5758_NOP) << 24); in ad5758_spi_reg_read()
206 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); in ad5758_spi_reg_read()
210 return (be32_to_cpu(st->d32[2]) >> 8) & 0xFFFF; in ad5758_spi_reg_read()
213 static int ad5758_spi_reg_write(struct ad5758_state *st, in ad5758_spi_reg_write() argument
217 st->d32[0] = cpu_to_be32((AD5758_WR_FLAG_MSK(addr) << 24) | in ad5758_spi_reg_write()
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| /linux/drivers/macintosh/ |
| H A D | windfarm_pid.c | 25 void wf_pid_init(struct wf_pid_state *st, struct wf_pid_param *param) in wf_pid_init() argument
27 memset(st, 0, sizeof(struct wf_pid_state)); in wf_pid_init()
28 st->param = *param; in wf_pid_init()
29 st->first = 1; in wf_pid_init()
33 s32 wf_pid_run(struct wf_pid_state *st, s32 new_sample) in wf_pid_run() argument
37 int i, hlen = st->param.history_len; in wf_pid_run()
40 error = new_sample - st->param.itarget; in wf_pid_run()
43 if (st->first) { in wf_pid_run()
45 st->samples[i] = new_sample; in wf_pid_run()
46 st->errors[i] = error; in wf_pid_run()
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| /linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_private_obj.c | 11 komeda_component_state_reset(struct komeda_component_state *st) in komeda_component_state_reset() argument
13 st->binding_user = NULL; in komeda_component_state_reset()
14 st->affected_inputs = st->active_inputs; in komeda_component_state_reset()
15 st->active_inputs = 0; in komeda_component_state_reset()
16 st->changed_active_inputs = 0; in komeda_component_state_reset()
22 struct komeda_layer_state *st; in komeda_layer_atomic_duplicate_state() local
24 st = kmemdup(obj->state, sizeof(*st), GFP_KERNEL); in komeda_layer_atomic_duplicate_state()
25 if (!st) in komeda_layer_atomic_duplicate_state()
28 komeda_component_state_reset(&st->base); in komeda_layer_atomic_duplicate_state()
29 __drm_atomic_helper_private_obj_duplicate_state(obj, &st->base.obj); in komeda_layer_atomic_duplicate_state()
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| /linux/drivers/staging/iio/frequency/ |
| H A D | ad9832.c | 129 static int ad9832_write_frequency(struct ad9832_state *st, in ad9832_write_frequency() argument
135 clk_freq = clk_get_rate(st->mclk); in ad9832_write_frequency()
142 st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) | in ad9832_write_frequency()
145 st->freq_data[1] = cpu_to_be16((AD9832_CMD_FRE16BITSW << CMD_SHIFT) | in ad9832_write_frequency()
148 st->freq_data[2] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) | in ad9832_write_frequency()
151 st->freq_data[3] = cpu_to_be16((AD9832_CMD_FRE16BITSW << CMD_SHIFT) | in ad9832_write_frequency()
155 return spi_sync(st->spi, &st->freq_msg); in ad9832_write_frequency()
158 static int ad9832_write_phase(struct ad9832_state *st, in ad9832_write_phase() argument
164 st->phase_data[0] = cpu_to_be16((AD9832_CMD_PHA8BITSW << CMD_SHIFT) | in ad9832_write_phase()
167 st->phase_data[1] = cpu_to_be16((AD9832_CMD_PHA16BITSW << CMD_SHIFT) | in ad9832_write_phase()
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| H A D | ad9834.c | 109 static int ad9834_write_frequency(struct ad9834_state *st, in ad9834_write_frequency() argument
115 clk_freq = clk_get_rate(st->mclk); in ad9834_write_frequency()
122 st->freq_data[0] = cpu_to_be16(addr | (regval & in ad9834_write_frequency()
124 st->freq_data[1] = cpu_to_be16(addr | ((regval >> in ad9834_write_frequency()
128 return spi_sync(st->spi, &st->freq_msg); in ad9834_write_frequency()
131 static int ad9834_write_phase(struct ad9834_state *st, in ad9834_write_phase() argument
136 st->data = cpu_to_be16(addr | phase); in ad9834_write_phase()
138 return spi_sync(st->spi, &st->msg); in ad9834_write_phase()
147 struct ad9834_state *st = iio_priv(indio_dev); in ad9834_write() local
156 mutex_lock(&st->lock); in ad9834_write()
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| /linux/drivers/iio/accel/ |
| H A D | adxl380.c | 268 static int adxl380_set_measure_en(struct adxl380_state *st, bool en) in adxl380_set_measure_en() argument
275 ret = regmap_read(st->regmap, ADXL380_ACT_INACT_CTL_REG, &act_inact_ctl); in adxl380_set_measure_en()
287 return regmap_update_bits(st->regmap, ADXL380_OP_MODE_REG, in adxl380_set_measure_en()
292 static void adxl380_scale_act_inact_thresholds(struct adxl380_state *st, in adxl380_scale_act_inact_thresholds() argument
296 st->act_threshold = mult_frac(st->act_threshold, in adxl380_scale_act_inact_thresholds()
299 st->inact_threshold = mult_frac(st->inact_threshold, in adxl380_scale_act_inact_thresholds()
304 static int adxl380_write_act_inact_threshold(struct adxl380_state *st, in adxl380_write_act_inact_threshold() argument
314 ret = regmap_write(st->regmap, reg + 1, th & GENMASK(7, 0)); in adxl380_write_act_inact_threshold()
318 ret = regmap_update_bits(st->regmap, reg, GENMASK(2, 0), th >> 8); in adxl380_write_act_inact_threshold()
323 st->act_threshold = th; in adxl380_write_act_inact_threshold()
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| H A D | adxl367.c | 271 static int adxl367_set_measure_en(struct adxl367_state *st, bool en) in adxl367_set_measure_en() argument
277 ret = regmap_update_bits(st->regmap, ADXL367_REG_POWER_CTL, in adxl367_set_measure_en()
294 static void adxl367_scale_act_thresholds(struct adxl367_state *st, in adxl367_scale_act_thresholds() argument
298 st->act_threshold = st->act_threshold in adxl367_scale_act_thresholds()
301 st->inact_threshold = st->inact_threshold in adxl367_scale_act_thresholds()
306 static int _adxl367_set_act_threshold(struct adxl367_state *st, in _adxl367_set_act_threshold() argument
316 st->act_threshold_buf[0] = FIELD_PREP(ADXL367_THRESH_H_MASK, in _adxl367_set_act_threshold()
319 st->act_threshold_buf[1] = FIELD_PREP(ADXL367_THRESH_L_MASK, in _adxl367_set_act_threshold()
323 ret = regmap_bulk_write(st->regmap, reg, st->act_threshold_buf, in _adxl367_set_act_threshold()
324 sizeof(st->act_threshold_buf)); in _adxl367_set_act_threshold()
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| /linux/drivers/iio/adc/ |
| H A D | ad7625.c | 176 static int ad7625_set_sampling_freq(struct ad7625_state *st, u32 freq) in ad7625_set_sampling_freq() argument
189 cnv_wf.duty_length_ns = st->info->timing_spec->conv_high_ns; in ad7625_set_sampling_freq()
191 ret = pwm_round_waveform_might_sleep(st->cnv_pwm, &cnv_wf); in ad7625_set_sampling_freq()
202 st->info->chan_spec.scan_type.realbits, in ad7625_set_sampling_freq()
203 st->ref_clk_rate_hz); in ad7625_set_sampling_freq()
206 clk_gate_wf.duty_offset_ns = st->info->timing_spec->conv_msb_ns; in ad7625_set_sampling_freq()
208 ret = pwm_round_waveform_might_sleep(st->clk_gate_pwm, &clk_gate_wf); in ad7625_set_sampling_freq()
212 st->cnv_wf = cnv_wf; in ad7625_set_sampling_freq()
213 st->clk_gate_wf = clk_gate_wf; in ad7625_set_sampling_freq()
216 target = DIV_ROUND_CLOSEST(st->ref_clk_rate_hz, freq); in ad7625_set_sampling_freq()
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| H A D | ad4130.c | 389 static int ad4130_get_reg_size(struct ad4130_state *st, unsigned int reg, in ad4130_get_reg_size() argument
400 static unsigned int ad4130_data_reg_size(struct ad4130_state *st) in ad4130_data_reg_size() argument
405 ret = ad4130_get_reg_size(st, AD4130_DATA_REG, &data_reg_size); in ad4130_data_reg_size()
412 static unsigned int ad4130_resolution(struct ad4130_state *st) in ad4130_resolution() argument
414 return ad4130_data_reg_size(st) * BITS_PER_BYTE; in ad4130_resolution()
419 struct ad4130_state *st = context; in ad4130_reg_write() local
423 ret = ad4130_get_reg_size(st, reg, &size); in ad4130_reg_write()
427 st->reg_write_tx_buf[0] = reg; in ad4130_reg_write()
431 put_unaligned_be24(val, &st->reg_write_tx_buf[1]); in ad4130_reg_write()
434 put_unaligned_be16(val, &st->reg_write_tx_buf[1]); in ad4130_reg_write()
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| H A D | ad7606.c | 178 static int ad7606c_18bit_chan_scale_setup(struct ad7606_state *st,
180 static int ad7606c_16bit_chan_scale_setup(struct ad7606_state *st,
182 static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st,
184 static int ad7607_chan_scale_setup(struct ad7606_state *st,
186 static int ad7608_chan_scale_setup(struct ad7606_state *st,
188 static int ad7609_chan_scale_setup(struct ad7606_state *st,
313 int ad7606_reset(struct ad7606_state *st) in ad7606_reset() argument
315 if (st->gpio_reset) { in ad7606_reset()
316 gpiod_set_value(st->gpio_reset, 1); in ad7606_reset()
318 gpiod_set_value(st->gpio_reset, 0); in ad7606_reset()
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| H A D | ti-ads7950.c | 60 #define TI_ADS7950_MAN_CMD_SETTINGS(st) \ argument
61 (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
63 #define TI_ADS7950_GPIO_CMD_SETTINGS(st) \ argument
64 (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
286 struct ti_ads7950_state *st = iio_priv(indio_dev); in ti_ads7950_update_scan_mode() local
292 st->tx_buf[len++] = cmd; in ti_ads7950_update_scan_mode()
296 st->tx_buf[len++] = 0; in ti_ads7950_update_scan_mode()
297 st->tx_buf[len++] = 0; in ti_ads7950_update_scan_mode()
299 st->ring_xfer.len = len * 2; in ti_ads7950_update_scan_mode()
308 struct ti_ads7950_state *st = iio_priv(indio_dev); in ti_ads7950_trigger_handler() local
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| H A D | ad7192.c | 231 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_set_syscalib_mode() local
233 st->syscalib_mode[chan->channel] = mode; in ad7192_set_syscalib_mode()
241 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_get_syscalib_mode() local
243 return st->syscalib_mode[chan->channel]; in ad7192_get_syscalib_mode()
251 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_write_syscalib() local
259 temp = st->syscalib_mode[chan->channel]; in ad7192_write_syscalib()
262 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_ZERO, in ad7192_write_syscalib()
265 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_FULL, in ad7192_write_syscalib()
299 struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); in ad7192_set_channel() local
301 st->conf &= ~AD7192_CONF_CHAN_MASK; in ad7192_set_channel()
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| H A D | ad7298.c | 106 struct ad7298_state *st = iio_priv(indio_dev); in ad7298_update_scan_mode() local
115 command = AD7298_WRITE | st->ext_ref; in ad7298_update_scan_mode()
121 st->tx_buf[0] = cpu_to_be16(command); in ad7298_update_scan_mode()
124 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; in ad7298_update_scan_mode()
125 st->ring_xfer[0].len = 2; in ad7298_update_scan_mode()
126 st->ring_xfer[0].cs_change = 1; in ad7298_update_scan_mode()
127 st->ring_xfer[1].tx_buf = &st->tx_buf[1]; in ad7298_update_scan_mode()
128 st->ring_xfer[1].len = 2; in ad7298_update_scan_mode()
129 st->ring_xfer[1].cs_change = 1; in ad7298_update_scan_mode()
131 spi_message_init(&st->ring_msg); in ad7298_update_scan_mode()
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| H A D | ad9467.c | 130 #define AD9467_CAN_INVERT(st) \ argument
131 (!(st)->info->has_dco || (st)->info->has_dco_invert)
154 struct ad9467_state *st; member
186 static int ad9467_spi_read(struct ad9467_state *st, unsigned int reg) in ad9467_spi_read() argument
194 ret = spi_write_then_read(st->spi, in ad9467_spi_read()
204 static int ad9467_spi_write(struct ad9467_state *st, unsigned int reg, in ad9467_spi_write() argument
207 st->buf[0] = reg >> 8; in ad9467_spi_write()
208 st->buf[1] = reg & 0xFF; in ad9467_spi_write()
209 st->buf[2] = val; in ad9467_spi_write()
211 return spi_write(st->spi, st->buf, ARRAY_SIZE(st->buf)); in ad9467_spi_write()
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| H A D | nau7802.c | 85 struct nau7802_state *st = iio_priv(dev_to_iio_dev(dev)); in nau7802_show_scales() local
88 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) in nau7802_show_scales()
90 st->scale_avail[i]); in nau7802_show_scales()
112 static int nau7802_set_gain(struct nau7802_state *st, int gain) in nau7802_set_gain() argument
116 mutex_lock(&st->lock); in nau7802_set_gain()
117 st->conversion_count = 0; in nau7802_set_gain()
119 ret = i2c_smbus_read_byte_data(st->client, NAU7802_REG_CTRL1); in nau7802_set_gain()
122 ret = i2c_smbus_write_byte_data(st->client, NAU7802_REG_CTRL1, in nau7802_set_gain()
127 mutex_unlock(&st->lock); in nau7802_set_gain()
132 static int nau7802_read_conversion(struct nau7802_state *st) in nau7802_read_conversion() argument
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| H A D | ti-ads131e08.c | 162 static int ads131e08_exec_cmd(struct ads131e08_state *st, u8 cmd) in ads131e08_exec_cmd() argument
166 ret = spi_write_then_read(st->spi, &cmd, 1, NULL, 0); in ads131e08_exec_cmd()
168 dev_err(&st->spi->dev, "Exec cmd(%02x) failed\n", cmd); in ads131e08_exec_cmd()
173 static int ads131e08_read_reg(struct ads131e08_state *st, u8 reg) in ads131e08_read_reg() argument
178 .tx_buf = &st->tx_buf, in ads131e08_read_reg()
181 .value = st->sdecode_delay_us, in ads131e08_read_reg()
185 .rx_buf = &st->rx_buf, in ads131e08_read_reg()
190 st->tx_buf[0] = ADS131E08_CMD_RREG(reg); in ads131e08_read_reg()
191 st->tx_buf[1] = 0; in ads131e08_read_reg()
193 ret = spi_sync_transfer(st->spi, transfer, ARRAY_SIZE(transfer)); in ads131e08_read_reg()
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| /linux/drivers/hwmon/ |
| H A D | ltc4282.c | 161 struct ltc4282_state *st = container_of(hw, struct ltc4282_state, in ltc4282_set_rate() local
168 return regmap_update_bits(st->map, LTC4282_CLK_DIV, LTC4282_CLKOUT_MASK, in ltc4282_set_rate()
192 struct ltc4282_state *st = container_of(hw, struct ltc4282_state, in ltc4282_recalc_rate() local
197 ret = regmap_read(st->map, LTC4282_CLK_DIV, &clkdiv); in ltc4282_recalc_rate()
212 struct ltc4282_state *st = container_of(clk_hw, struct ltc4282_state, in ltc4282_disable() local
215 regmap_clear_bits(st->map, LTC4282_CLK_DIV, LTC4282_CLKOUT_MASK); in ltc4282_disable()
218 static int ltc4282_read_voltage_word(const struct ltc4282_state *st, u32 reg, in ltc4282_read_voltage_word() argument
224 ret = regmap_bulk_read(st->map, reg, &in, sizeof(in)); in ltc4282_read_voltage_word()
236 static int ltc4282_read_voltage_byte_cached(const struct ltc4282_state *st, in ltc4282_read_voltage_byte_cached() argument
246 ret = regmap_read(st->map, reg, &in); in ltc4282_read_voltage_byte_cached()
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| /linux/drivers/iio/frequency/ |
| H A D | adf4377.c | 479 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_reg_access() local
482 return regmap_read(st->regmap, reg, read_val); in adf4377_reg_access()
484 return regmap_write(st->regmap, reg, write_val); in adf4377_reg_access()
491 static int adf4377_soft_reset(struct adf4377_state *st) in adf4377_soft_reset() argument
496 ret = regmap_update_bits(st->regmap, 0x0, ADF4377_0000_SOFT_RESET_MSK | in adf4377_soft_reset()
503 return regmap_read_poll_timeout(st->regmap, 0x0, read_val, in adf4377_soft_reset()
508 static int adf4377_get_freq(struct adf4377_state *st, u64 *freq) in adf4377_get_freq() argument
514 mutex_lock(&st->lock); in adf4377_get_freq()
515 ret = regmap_read(st->regmap, 0x12, &ref_div_factor); in adf4377_get_freq()
519 ret = regmap_bulk_read(st->regmap, 0x10, st->buf, sizeof(st->buf)); in adf4377_get_freq()
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| /linux/drivers/iio/imu/inv_icm42600/ |
| H A D | inv_icm42600_buffer.c | 101 void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st) in inv_icm42600_buffer_update_fifo_period() argument
105 if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) in inv_icm42600_buffer_update_fifo_period()
106 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr); in inv_icm42600_buffer_update_fifo_period()
110 if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) in inv_icm42600_buffer_update_fifo_period()
111 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
120 st->fifo.period = period; in inv_icm42600_buffer_update_fifo_period()
123 int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st, in inv_icm42600_buffer_set_fifo_en() argument
143 ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val); in inv_icm42600_buffer_set_fifo_en()
147 st->fifo.en = fifo_en; in inv_icm42600_buffer_set_fifo_en()
148 inv_icm42600_buffer_update_fifo_period(st); in inv_icm42600_buffer_set_fifo_en()
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| H A D | inv_icm42600_core.c | 171 const struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); in inv_icm42600_get_mount_matrix() local
173 return &st->orientation; in inv_icm42600_get_mount_matrix()
212 static int inv_icm42600_set_pwr_mgmt0(struct inv_icm42600_state *st, in inv_icm42600_set_pwr_mgmt0() argument
217 enum inv_icm42600_sensor_mode oldgyro = st->conf.gyro.mode; in inv_icm42600_set_pwr_mgmt0()
218 enum inv_icm42600_sensor_mode oldaccel = st->conf.accel.mode; in inv_icm42600_set_pwr_mgmt0()
219 bool oldtemp = st->conf.temp_en; in inv_icm42600_set_pwr_mgmt0()
232 ret = regmap_write(st->map, INV_ICM42600_REG_PWR_MGMT0, val); in inv_icm42600_set_pwr_mgmt0()
236 st->conf.gyro.mode = gyro; in inv_icm42600_set_pwr_mgmt0()
237 st->conf.accel.mode = accel; in inv_icm42600_set_pwr_mgmt0()
238 st->conf.temp_en = temp; in inv_icm42600_set_pwr_mgmt0()
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| /linux/drivers/iio/imu/inv_mpu6050/ |
| H A D | inv_mpu_core.c | 309 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, in inv_mpu6050_pwr_mgmt_1_write() argument
315 clock = st->chip_config.clk; in inv_mpu6050_pwr_mgmt_1_write()
317 temp_dis = !st->chip_config.temp_en; in inv_mpu6050_pwr_mgmt_1_write()
327 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); in inv_mpu6050_pwr_mgmt_1_write()
328 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); in inv_mpu6050_pwr_mgmt_1_write()
331 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, in inv_mpu6050_clock_switch() argument
336 switch (st->chip_type) { in inv_mpu6050_clock_switch()
341 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, clock, -1); in inv_mpu6050_clock_switch()
344 st->chip_config.clk = clock; in inv_mpu6050_clock_switch()
354 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, in inv_mpu6050_switch_engine() argument
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| /linux/drivers/iio/resolver/ |
| H A D | ad2s1210.c | 175 static int ad2s1210_set_mode(struct ad2s1210_state *st, enum ad2s1210_mode mode) in ad2s1210_set_mode() argument
177 struct gpio_descs *gpios = st->mode_gpios; in ad2s1210_set_mode()
181 return mode == st->fixed_mode ? 0 : -EOPNOTSUPP; in ad2s1210_set_mode()
198 struct ad2s1210_state *st = context; in ad2s1210_regmap_reg_write() local
202 .rx_buf = &st->rx[0], in ad2s1210_regmap_reg_write()
203 .tx_buf = &st->tx[0], in ad2s1210_regmap_reg_write()
207 .rx_buf = &st->rx[1], in ad2s1210_regmap_reg_write()
208 .tx_buf = &st->tx[1], in ad2s1210_regmap_reg_write()
217 st->tx[0] = reg; in ad2s1210_regmap_reg_write()
218 st->tx[1] = val; in ad2s1210_regmap_reg_write()
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