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Searched refs:src_h (Results 1 – 25 of 64) sorted by relevance

123

/linux/drivers/media/platform/ti/vpe/
H A Dsc.c110 void sc_set_vs_coeffs(struct sc_data *sc, void *addr, unsigned int src_h, in sc_set_vs_coeffs() argument
119 if (dst_h > src_h) { in sc_set_vs_coeffs()
121 } else if (dst_h == src_h) { in sc_set_vs_coeffs()
124 sixteenths = (dst_h << 4) / src_h; in sc_set_vs_coeffs()
148 u32 *sc_reg17, unsigned int src_w, unsigned int src_h, in sc_config_scaler() argument
178 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
213 if (dst_h < (src_h >> 2)) { in sc_config_scaler()
222 factor = (u16) ((dst_h << 10) / src_h); in sc_config_scaler()
238 src_h, dst_h, factor, row_acc_init_rav, in sc_config_scaler()
242 row_acc_inc = ((src_h - 1) << 16) / (dst_h - 1); in sc_config_scaler()
[all …]
H A Dsc.h201 void sc_set_vs_coeffs(struct sc_data *sc, void *addr, unsigned int src_h,
204 u32 *sc_reg17, unsigned int src_w, unsigned int src_h,
/linux/drivers/gpu/drm/armada/
H A Darmada_trace.h34 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h),
35 TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),
47 __field(u32, src_h)
60 __entry->src_h = src_h;
67 __entry->src_w >> 16, __entry->src_h >> 16)
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Doverlay.c94 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, in verify_scaling() argument
97 if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) { in verify_scaling()
99 src_w, src_h, crtc_w, crtc_h); in verify_scaling()
117 uint32_t src_w, uint32_t src_h, in nv10_update_plane() argument
138 src_h >>= 16; in nv10_update_plane()
140 ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h); in nv10_update_plane()
156 nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); in nv10_update_plane()
159 nvif_wr32(dev, NV_PVIDEO_DT_DY(flip), (src_h << 20) / crtc_h); in nv10_update_plane()
368 uint32_t src_w, uint32_t src_h, in nv04_update_plane() argument
384 src_h >>= 16; in nv04_update_plane()
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/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_plane.c183 if (state->src_h > max_height) in mdp5_plane_atomic_check_with_state()
226 ((state->src_h >> 16) != state->crtc_h)) in mdp5_plane_atomic_check_with_state()
390 plane->state->src_h != new_plane_state->src_h || in mdp5_plane_atomic_async_check()
672 uint32_t src_h, int pe_top[COMP_MAX], int pe_bottom[COMP_MAX]) in mdp5_write_pixel_ext() argument
680 uint32_t roi_h = src_h; in mdp5_write_pixel_ext()
752 u32 src_w, u32 src_h) in mdp5_hwpipe_mode_set() argument
765 MDP5_PIPE_SRC_SIZE_HEIGHT(src_h)); in mdp5_hwpipe_mode_set()
810 src_h, pe->top, pe->bottom); in mdp5_hwpipe_mode_set()
859 uint32_t src_w, src_h; in mdp5_plane_mode_set() local
875 src_h = drm_rect_height(src); in mdp5_plane_mode_set()
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/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-plane.c129 static bool dcss_plane_is_source_size_allowed(u16 src_w, u16 src_h, u32 pix_fmt) in dcss_plane_is_source_size_allowed() argument
139 return src_w >= 16 && src_h >= 8; in dcss_plane_is_source_size_allowed()
170 new_plane_state->src_h >> 16, in dcss_plane_atomic_check()
262 state->src_h != old_state->src_h || in dcss_plane_needs_setup()
281 u32 src_w, src_h, dst_w, dst_h; in dcss_plane_atomic_update() local
305 src_h = drm_rect_height(&src) >> 16; in dcss_plane_atomic_update()
317 dcss_dpr_set_res(dcss->dpr, dcss_plane->ch_num, src_w, src_h); in dcss_plane_atomic_update()
331 is_rotation_90_or_270 ? src_h : src_w, in dcss_plane_atomic_update()
332 is_rotation_90_or_270 ? src_w : src_h, in dcss_plane_atomic_update()
/linux/drivers/gpu/drm/arm/
H A Dmalidp_planes.c268 u32 src_w, src_h; in malidp_se_check_scaling() local
282 src_w = state->src_h >> 16; in malidp_se_check_scaling()
283 src_h = state->src_w >> 16; in malidp_se_check_scaling()
286 src_h = state->src_h >> 16; in malidp_se_check_scaling()
289 if ((state->crtc_w == src_w) && (state->crtc_h == src_h)) { in malidp_se_check_scaling()
742 u32 src_w, src_h, val = 0, src_x, src_y; in malidp_de_set_plane_afbc() local
758 src_h = plane->state->src_h >> 16; in malidp_de_set_plane_afbc()
767 val = ((fb->height - (src_y + src_h)) << MALIDP_AD_CROP_BOTTOM_OFFSET) | in malidp_de_set_plane_afbc()
792 u32 src_w, src_h, dest_w, dest_h, val; in malidp_de_plane_update() local
804 src_h = fb->height; in malidp_de_plane_update()
[all …]
/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_framebuffer.c211 u32 src_x, u32 src_y, u32 src_w, u32 src_h) in komeda_fb_check_src_coords() argument
218 if ((src_x + src_w > fb->width) || (src_y + src_h > fb->height)) { in komeda_fb_check_src_coords()
224 (src_y % info->vsub) || (src_h % info->vsub)) { in komeda_fb_check_src_coords()
226 src_x, src_y, src_w, src_h, info->format); in komeda_fb_check_src_coords()
231 (src_y % block_h) || (src_h % block_h)) { in komeda_fb_check_src_coords()
233 src_x, src_y, src_w, src_h, info->format); in komeda_fb_check_src_coords()
H A Dkomeda_framebuffer.h43 u32 src_x, u32 src_y, u32 src_w, u32 src_h);
/linux/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_plane.c56 uint32_t src_h; member
294 if (state->crtc_w == state->src_w && state->crtc_h == state->src_h) { in atmel_hlcdc_plane_setup_scaler()
305 yfactor = atmel_hlcdc_plane_phiscaler_get_factor(state->src_h, in atmel_hlcdc_plane_setup_scaler()
317 state->crtc_h < state->src_h ? in atmel_hlcdc_plane_setup_scaler()
324 yfactor = (1024 * state->src_h) / state->crtc_h; in atmel_hlcdc_plane_setup_scaler()
343 if (state->crtc_w == state->src_w && state->crtc_h == state->src_h) { in atmel_xlcdc_plane_setup_scaler()
353 yfactor = (u32)(((1 << 20) * state->src_h) / state->crtc_h); in atmel_xlcdc_plane_setup_scaler()
419 state->src_h)); in atmel_hlcdc_plane_update_pos_and_size()
625 pixels = (plane_state->src_w * plane_state->src_h) - in atmel_hlcdc_plane_prepare_ahb_routing()
749 hstate->src_h = drm_rect_height(&s->src) >> 16; in atmel_hlcdc_plane_atomic_check()
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/linux/drivers/gpu/drm/
H A Ddrm_plane.c953 uint32_t src_w, uint32_t src_h) in __setplane_check() argument
980 ret = drm_framebuffer_check_src_coords(src_x, src_y, src_w, src_h, fb); in __setplane_check()
1025 uint32_t src_w, uint32_t src_h, in __setplane_internal() argument
1047 src_x, src_y, src_w, src_h); in __setplane_internal()
1054 src_x, src_y, src_w, src_h, ctx); in __setplane_internal()
1077 uint32_t src_w, uint32_t src_h, in __setplane_atomic() argument
1097 src_x, src_y, src_w, src_h); in __setplane_atomic()
1103 src_x, src_y, src_w, src_h, ctx); in __setplane_atomic()
1113 uint32_t src_w, uint32_t src_h) in setplane_internal() argument
1124 src_x, src_y, src_w, src_h, &ctx); in setplane_internal()
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H A Ddrm_plane_helper.c114 .src_h = drm_rect_height(src), in drm_plane_helper_check_update()
170 uint32_t src_w, uint32_t src_h, in drm_plane_helper_update_primary() argument
184 .y2 = src_y + src_h, in drm_plane_helper_update_primary()
/linux/drivers/gpu/drm/vc4/
H A Dvc4_plane.c515 vc4_state->src_h[0] = state->src.y2 - vc4_state->src_y; in vc4_plane_setup_clipping_and_scaling()
528 vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0], in vc4_plane_setup_clipping_and_scaling()
538 vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample; in vc4_plane_setup_clipping_and_scaling()
544 vc4_get_scaling_mode(vc4_state->src_h[1], in vc4_plane_setup_clipping_and_scaling()
850 vc4_write_ppf(vc4_state, vc4_state->src_h[channel], in vc4_write_scaling_parameters()
863 vc4_write_tpz(vc4_state, vc4_state->src_h[channel], in vc4_write_scaling_parameters()
911 vscale_factor = DIV_ROUND_UP(vc4_state->src_h[i] >> 16, in vc4_plane_calc_load()
914 (vc4_state->src_h[i] >> 16) * in vc4_plane_calc_load()
1235 if (!vc4_state->src_w[0] || !vc4_state->src_h[0] || in vc4_plane_mode_set()
1243 height = vc4_state->src_h[0] >> 16; in vc4_plane_mode_set()
[all …]
/linux/drivers/gpu/drm/virtio/
H A Dvirtgpu_plane.c254 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
269 plane->state->src_h != old_state->src_h || in virtio_gpu_primary_plane_update()
279 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
288 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
295 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
557 plane->state->src_h >> 16); in virtio_panic_flush()
/linux/drivers/gpu/drm/exynos/
H A Dexynos_drm_plane.c67 unsigned int src_w, src_h; in exynos_plane_mode_set() local
85 src_h = state->src_h >> 16; in exynos_plane_mode_set()
89 exynos_state->v_ratio = (src_h << 16) / crtc_h; in exynos_plane_mode_set()
/linux/drivers/gpu/drm/sti/
H A Dsti_vid.c148 int src_h = state->src_h >> 16; in sti_vid_commit() local
170 if (src_h >= VID_MIN_HD_HEIGHT) { in sti_vid_commit()
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop2.c550 u32 src_w, u32 src_h, u32 dst_w, in vop2_setup_scale() argument
557 uint16_t cbcr_src_h = src_h; in vop2_setup_scale()
564 if (src_h >= (4 * dst_h)) { in vop2_setup_scale()
566 src_h >>= 2; in vop2_setup_scale()
567 } else if (src_h >= (2 * dst_h)) { in vop2_setup_scale()
569 src_h >>= 1; in vop2_setup_scale()
573 ver_scl_mode = scl_get_scl_mode(src_h, dst_h); in vop2_setup_scale()
599 val = vop2_scale_factor(src_h, dst_h); in vop2_setup_scale()
996 int src_x, src_w, src_h; in vop2_plane_atomic_check() local
1029 src_h = drm_rect_height(src) >> 16; in vop2_plane_atomic_check()
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H A Drockchip_drm_vop.h370 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h, in scl_get_bili_dn_vskip() argument
375 act_height = DIV_ROUND_UP(src_h, vskiplines); in scl_get_bili_dn_vskip()
378 return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines; in scl_get_bili_dn_vskip()
/linux/drivers/gpu/drm/tests/
H A Ddrm_plane_helper_test.c71 mock->src_h = params->src.h; in drm_plane_helper_init()
84 unsigned int src_w, unsigned int src_h) in check_src_eq() argument
86 struct drm_rect expected = DRM_RECT_INIT(src_x, src_y, src_w, src_h); in check_src_eq()
/linux/include/drm/
H A Ddrm_plane.h119 uint32_t src_h, src_w; member
280 .y2 = state->src_y + state->src_h, in drm_plane_state_src()
332 uint32_t src_w, uint32_t src_h,
H A Ddrm_plane_helper.h39 uint32_t src_w, uint32_t src_h,
/linux/drivers/gpu/drm/i915/display/
H A Dintel_plane.c210 unsigned int src_w, src_h, dst_w, dst_h; in intel_adjusted_rate() local
213 src_h = drm_rect_height(src) >> 16; in intel_adjusted_rate()
219 dst_h = min(src_h, dst_h); in intel_adjusted_rate()
221 return DIV_ROUND_UP_ULL(mul_u32_u32(rate, src_w * src_h), in intel_adjusted_rate()
461 int src_h = drm_rect_height(&plane_state->uapi.src) >> 16; in intel_plane_is_scaled() local
465 return src_w != dst_w || src_h != dst_h; in intel_plane_is_scaled()
1069 u32 src_x, src_y, src_w, src_h, hsub, vsub; in intel_plane_check_src_coordinates() local
1091 src_h = drm_rect_height(src) >> 16; in intel_plane_check_src_coordinates()
1094 src_w << 16, src_h << 16); in intel_plane_check_src_coordinates()
1133 if (src_y % vsub || src_h % vsub) { in intel_plane_check_src_coordinates()
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/linux/drivers/gpu/drm/ingenic/
H A Dingenic-ipu.c316 state->src_h != oldstate->src_h || in osd_changed()
405 ((newstate->src_h >> 16) << JZ_IPU_IN_GS_H_LSB)); in ingenic_ipu_plane_atomic_update()
561 newstate->src_w >> 16, newstate->src_h >> 16, in ingenic_ipu_plane_atomic_update()
606 if ((new_plane_state->src_w >> 16) < 4 || (new_plane_state->src_h >> 16) < 4) in ingenic_ipu_plane_atomic_check()
619 yres = new_plane_state->src_h >> 16; in ingenic_ipu_plane_atomic_check()
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c427 uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, in _dpu_plane_setup_scaler3() argument
442 swap(src_w, src_h); in _dpu_plane_setup_scaler3()
447 mult_frac((1 << PHASE_STEP_SHIFT), src_h, dst_h); in _dpu_plane_setup_scaler3()
467 scale_cfg->src_height[i] = src_h; in _dpu_plane_setup_scaler3()
481 if (!(MSM_FORMAT_IS_YUV(fmt)) && (src_h == dst_h) in _dpu_plane_setup_scaler3()
497 uint32_t src_w, uint32_t src_h, in _dpu_plane_setup_pixel_ext() argument
503 uint32_t w = src_w, h = src_h; in _dpu_plane_setup_pixel_ext()
1190 old_plane_state->src_h != plane_state->src_h || in dpu_plane_virtual_atomic_check()
1273 (plane_state->src_h >> 16 != plane_state->crtc_h); in dpu_plane_virtual_assign_resources()
/linux/drivers/gpu/drm/imx/ipuv3/
H A Dipuv3-plane.h42 uint32_t src_h, bool interlaced);

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