| /freebsd/contrib/llvm-project/lld/ELF/ |
| H A D | LinkerScript.cpp | 1610 auto canSpillHelp = [&](PotentialSpillSection *spill) { in spillSections() argument
1613 spill->getParent()->memRegion == osec->memRegion) in spillSections()
1616 spill->getParent()->lmaRegion == osec->lmaRegion) in spillSections()
1621 PotentialSpillSection *spill; in spillSections() local
1622 for (spill = list.head; spill; spill = spill->next) { in spillSections()
1624 list.head = spill->next; in spillSections()
1627 if (canSpillHelp(spill)) in spillSections()
1629 skippedSpills.insert(spill); in spillSections()
1631 if (!spill) in spillSections()
1640 *llvm::find(spill->isd->sections, spill) = isec; in spillSections()
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| /freebsd/contrib/llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_trampoline_powerpc64_asm.S | 10 # floating point, and vector parameters, so that we only spill those live ones.
151 # floating point, and vector parameters, so that we only spill those live ones.
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| /freebsd/tests/sys/kern/tty/ |
| H A D | test_canon_fullbuf.orch | 21 -- Now fill up the next block, but spill the VEOF over to a third block.
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | Spiller.h | 40 virtual void spill(LiveRangeEdit &LRE, AllocationOrder *Order = nullptr) = 0;
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| H A D | RegisterScavenging.h | 13 /// to spill slots.
41 /// Information on scavenged registers (held in a spill slot).
45 /// A spill slot used for scavenging a register post register allocation.
139 /// If \p AllowSpill is false, fail if a spill is required to make the
158 ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in getScavengingFrameIndices()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegAllocBasic.cpp | 241 spiller().spill(LRE); in spillInterferences()
301 spiller().spill(LRE); in selectOrSplit()
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| H A D | RegisterScavenging.cpp | 222 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in spill() function in RegScavenger
325 ScavengedInfo &Scavenged = spill(Reg, RC, SPAdj, SpillBefore, ReloadBefore); in scavengeRegisterBackwards()
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| H A D | InlineSpiller.cpp | 196 void spill(LiveRangeEdit &, AllocationOrder *Order = nullptr) override;
1307 void InlineSpiller::spill(LiveRangeEdit &edit, AllocationOrder *order) { in spill() function in InlineSpiller
1676 for (const auto spill : EqValSpills) in hoistAllSpills()
1677 dbgs() << spill->getParent()->getNumber() << " "; in hoistAllSpills()
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| H A D | RegAllocFast.cpp | 386 void spill(MachineBasicBlock::iterator Before, Register VirtReg,
581 void RegAllocFastImpl::spill(MachineBasicBlock::iterator Before, in spill() function in RegAllocFastImpl
1108 spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut); in defineVirtReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastPreTileConfig.cpp | 70 void spill(MachineBasicBlock::iterator Before, Register VirtReg, bool Kill);
200 void X86FastPreTileConfig::spill(MachineBasicBlock::iterator Before, in spill() function in X86FastPreTileConfig
647 spill(++MI.getIterator(), TileReg, false); in configBasicBlock()
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| /freebsd/sys/contrib/openzfs/module/zfs/ |
| H A D | dsl_bookmark.c | 464 boolean_t spill = B_FALSE; in dsl_bookmark_create_sync_impl_snap() local
472 spill = B_TRUE; in dsl_bookmark_create_sync_impl_snap()
475 DMU_OTN_UINT64_METADATA, spill ? 0 : bonuslen, tx); in dsl_bookmark_create_sync_impl_snap()
478 if (spill) { in dsl_bookmark_create_sync_impl_snap()
487 if (!spill) { in dsl_bookmark_create_sync_impl_snap()
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| H A D | dmu_recv.c | 123 boolean_t spill; /* DRR_FLAG_SPILL_BLOCK set */ member
1958 (!rwa->spill && DRR_OBJECT_HAS_SPILL(drro->drr_flags))) { in receive_object()
2075 dn_slots << DNODE_SHIFT, rwa->spill ? in receive_object()
2077 } else if (rwa->spill && !DRR_OBJECT_HAS_SPILL(drro->drr_flags)) { in receive_object()
2573 if (rwa->spill && DRR_SPILL_IS_UNMODIFIED(drrs->drr_flags)) { in receive_spill()
3456 rwa->spill = drc->drc_spill; in dmu_recv_stream()
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| H A D | dmu_send.c | 1776 uint64_t spill = 0; in send_reader_thread() local
1784 spill = piggyback_unmodified_spill(srta, range); in send_reader_thread()
1789 bqueue_enqueue(outq, range, sizeof (*range) + spill); in send_reader_thread()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 355 // Register class for 64-bit mode, with a 64-bit spill slot size.
358 // spill slot is a stricter constraint than only requiring a 32-bit spill slot.
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| /freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/channel_program/synctask_core/ |
| H A D | tst.set_props.zcp | 36 -- add an extra character so we spill over the limit
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| /freebsd/contrib/llvm-project/lld/docs/ELF/ |
| H A D | linker_script.rst | 236 Sections cannot be specified to possibly spill into or out of
244 sections to spill to later pattern matches. (This globally changes the behavior
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | README.txt | 151 We might want to model all access registers and use them to spill
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| H A D | SystemZInstrFP.td | 161 // Reload f16 from 4-byte spill slot.
184 // Spill f16 to 4-byte spill slot.
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| H A D | SystemZRegisterInfo.td | 256 // Adjust the spill size of f16 to 32 bits in case of no vector support.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.td | 171 // These classes provide spill/restore order if used with MOVEM instruction
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| H A D | M68kInstrData.td | 267 // The mask is already pre-processed by the save/restore spill hook
333 // Pseudo versions. These a required by virtual register spill/restore since
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Passes/ |
| H A D | MachinePassRegistry.def | 88 MACHINE_FUNCTION_ANALYSIS("spill-code-placement", SpillPlacementAnalysis())
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFloat32InstrInfo.td | 128 // Pseudo instructions for spill/reload CFRs.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.td | 231 // know how to spill them. If we make our prologue/epilogue code smarter at
248 // know how to spill them. If we make our prologue/epilogue code smarter at
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrFormats.td | 49 // Combined SGPR/VGPR spill bit
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