| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 230 .socclk_mhz = 560.0,
241 .socclk_mhz = 694.0,
252 .socclk_mhz = 875.0,
263 .socclk_mhz = 1000.0,
274 .socclk_mhz = 1200.0,
286 .socclk_mhz = 1200.0,
341 .socclk_mhz = 560.0,
352 .socclk_mhz = 694.0,
363 .socclk_mhz = 875.0,
374 .socclk_mhz = 1000.0,
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 508 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
631 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn31_update_bw_bounding_box_fpu()
699 dcn3_15_soc.clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn315_update_bw_bounding_box_fpu()
771 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn316_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_translation_helper.c | 363 p->in_states->state_array[0].socclk_mhz = 620.0; in dml2_init_soc_states()
390 p->in_states->state_array[1].socclk_mhz = 1200.0; in dml2_init_soc_states()
399 p->in_states->state_array[0].socclk_mhz = 582.0; in dml2_init_soc_states()
426 p->in_states->state_array[1].socclk_mhz = 1200.0; in dml2_init_soc_states()
436 p->in_states->state_array[0].socclk_mhz = 300; //620.0; in dml2_init_soc_states()
463 p->in_states->state_array[1].socclk_mhz = 1600; //1200.0; in dml2_init_soc_states()
547 p->in_states->state_array[i].socclk_mhz = in dml2_init_soc_states()
548 dml2->config.bbox_overrides.clks_table.clk_entries[i].socclk_mhz; in dml2_init_soc_states()
576 if (p->in_states->state_array[i].socclk_mhz > max_socclk_mhz) in dml2_init_soc_states()
577 max_socclk_mhz = (int)p->in_states->state_array[i].socclk_mhz; in dml2_init_soc_states()
[all …]
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| H A D | dml2_wrapper_fpu.c | 420 …_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].socclk_mhz * 1000; in dml2_validate_and_build_resource()
478 …_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].socclk_mhz * 1000; in dml2_validate_and_build_resource()
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| H A D | display_mode_util.c | 635 dml_print("DML: state_bbox: socclk_mhz = %f\n", state->socclk_mhz); in dml_print_soc_state_bounding_box()
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| H A D | display_mode_core_structs.h | 278 dml_float_t socclk_mhz; member
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| H A D | display_mode_core.c | 6682 CalculateWatermarks_params->SOCCLK = mode_lib->ms.state.socclk_mhz; in dml_prefetch_check()
8264 mode_lib->ms.SOCCLK = mode_lib->ms.state.socclk_mhz; in dml_core_mode_support()
10101 mode_lib->ms.SOCCLK = (dml_float_t)state->socclk_mhz; in fetch_socbb_params()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_socbb.h | 30 uint32_t socclk_mhz; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 160 double socclk_mhz; member
554 double socclk_mhz; member
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| H A D | display_mode_vba.c | 381 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
397 mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
1094 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 149 .socclk_mhz = 1254.0,
160 .socclk_mhz = 1254.0,
171 .socclk_mhz = 1254.0,
182 .socclk_mhz = 1254.0,
194 .socclk_mhz = 1254.0,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 137 .socclk_mhz = 1200.0,
508 pipes[0].clks_cfg.socclk_mhz = socclk; in dcn32_set_phantom_stream_timing()
2400 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel_temp].socclk_mhz; in dcn32_calculate_wm_and_dlg_fpu()
2465 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn32_calculate_wm_and_dlg_fpu()
2753 if (max_clk_limit->socclk_mhz != 0) in override_max_clk_values()
2754 curr_clk_limit->socclk_mhz = max_clk_limit->socclk_mhz; in override_max_clk_values()
3252 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn32_update_bw_bounding_box_fpu()
3253 dcn3_2_soc.clock_limits[i].socclk_mhz = dcn3_2_soc.clock_limits[i-1].socclk_mhz; in dcn32_update_bw_bounding_box_fpu()
3255 dcn3_2_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn32_update_bw_bounding_box_fpu()
3323 if (dc->clk_mgr->bw_params->clk_table.entries[i].socclk_mhz) in dcn32_update_bw_bounding_box_fpu()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn42/ |
| H A D | dcn42_soc_and_ip_translator.c | 135 dml_clk_table->socclk.clk_values_khz[i] = dc_clk_table->entries[i].socclk_mhz * 1000; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/ |
| H A D | dcn42_clk_mgr.c | 967 dcn42_init_single_clock(&clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn42_get_smu_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 64 clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000; in dcn401_initialize_min_clocks()
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