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Searched refs:socclk_mhz (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c103 .socclk_mhz = 600.0,
116 .socclk_mhz = 733.0,
129 .socclk_mhz = 880.0,
142 .socclk_mhz = 978.0,
155 .socclk_mhz = 1100.0,
168 .socclk_mhz = 1257.0,
181 .socclk_mhz = 1257.0,
194 .socclk_mhz = 1467.0,
317 clock_limits[i].socclk_mhz = in dcn351_update_bw_bounding_box_fpu()
318 clk_table->entries[i].socclk_mhz; in dcn351_update_bw_bounding_box_fpu()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c508 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
631 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn31_update_bw_bounding_box()
699 dcn3_15_soc.clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn315_update_bw_bounding_box()
771 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn316_update_bw_bounding_box()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c584 .socclk_mhz = 0,
591 .socclk_mhz = 0,
598 .socclk_mhz = 0,
605 .socclk_mhz = 0,
671 bw_params->clk_table.entries[i].socclk_mhz = find_socclk_for_voltage(clock_table, in rn_clk_mgr_helper_populate_bw_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c283 clock_limits[i].socclk_mhz = in dcn35_update_bw_bounding_box_fpu()
284 clk_table->entries[i].socclk_mhz; in dcn35_update_bw_bounding_box_fpu()
366 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].socclk_mhz = in dcn35_update_bw_bounding_box_fpu()
367 clock_limits[i].socclk_mhz; in dcn35_update_bw_bounding_box_fpu()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_socbb.h30 uint32_t socclk_mhz; member
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h160 double socclk_mhz; member
554 double socclk_mhz; member
H A Ddisplay_mode_lib.c282 dml_print("DML PARAMS: socclk_mhz = %3.2f\n", clks_cfg->socclk_mhz); in dml_log_pipe_params()
H A Ddisplay_mode_vba.c381 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
397 mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
1094 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h120 unsigned int socclk_mhz; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c145 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn3_init_clocks()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h278 dml_float_t socclk_mhz; member
H A Ddisplay_mode_core.c6665 CalculateWatermarks_params->SOCCLK = mode_lib->ms.state.socclk_mhz; in dml_prefetch_check()
8247 mode_lib->ms.SOCCLK = mode_lib->ms.state.socclk_mhz; in dml_core_mode_support()
10084 mode_lib->ms.SOCCLK = (dml_float_t)state->socclk_mhz; in fetch_socbb_params()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c755 clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000; in dcn32_initialize_min_clocks()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c63 clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000; in dcn401_initialize_min_clocks()