| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 47 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in get_minimum_clocks_for_latency()
67 …/ ((double)in_out->soc_bb->qos_parameters.derate_table.system_active_average.dram_derate_percent_p… in calculate_system_active_minimums()
68 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_system_active_minimums()
72 …/ ((double)in_out->soc_bb->qos_parameters.derate_table.system_active_urgent.dram_derate_percent_pi… in calculate_system_active_minimums()
73 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_system_active_minimums()
76 …/ ((double)in_out->soc_bb->qos_parameters.derate_table.system_active_urgent.dram_derate_percent_pi… in calculate_system_active_minimums()
77 &in_out->soc_bb->clk_table.dram_config, &in_out->min_clk_table->dram_bw_table); in calculate_system_active_minimums()
81 …min_fclk_avg = (double)mode_support_result->global.active.average_bw_sdp_kbps / in_out->soc_bb->fa… in calculate_system_active_minimums()
82 …min_fclk_avg = (double)min_fclk_avg / ((double)in_out->soc_bb->qos_parameters.derate_table.system_… in calculate_system_active_minimums()
84 …min_fclk_urgent = (double)mode_support_result->global.active.urgent_bw_sdp_kbps / in_out->soc_bb->… in calculate_system_active_minimums()
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| /linux/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn42/ |
| H A D | dcn42_soc_and_ip_translator.c | 14 static void get_default_soc_bb(struct dml2_soc_bb *soc_bb, const struct dc *dc) in get_default_soc_bb() argument
17 memcpy(soc_bb, &dml2_socbb_dcn42, sizeof(struct dml2_soc_bb)); in get_default_soc_bb()
18 …memcpy(&soc_bb->qos_parameters, &dml_dcn42_variant_a_soc_qos_params, sizeof(struct dml2_soc_qos_pa… in get_default_soc_bb()
147 static void dcn42_update_soc_bb_with_values_from_clk_mgr(struct dml2_soc_bb *soc_bb, const struct d… in dcn42_update_soc_bb_with_values_from_clk_mgr() argument
149 soc_bb->dprefclk_mhz = dc->clk_mgr->dprefclk_khz / 1000; in dcn42_update_soc_bb_with_values_from_clk_mgr()
150 soc_bb->dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn42_update_soc_bb_with_values_from_clk_mgr()
151 soc_bb->mall_allocated_for_dcn_mbytes = dc->caps.mall_size_total / (1024 * 1024); in dcn42_update_soc_bb_with_values_from_clk_mgr()
155 dcn42_convert_dc_clock_table_to_soc_bb_clock_table(&soc_bb->clk_table, &soc_bb->vmin_limit, in dcn42_update_soc_bb_with_values_from_clk_mgr()
160 soc_bb->power_management_parameters = dcn42_ddr5_power_management_parameters; in dcn42_update_soc_bb_with_values_from_clk_mgr()
164 static void apply_soc_bb_updates(struct dml2_soc_bb *soc_bb, const struct dc *dc, const struct dml2… in apply_soc_bb_updates() argument
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 67 in_dc->soc_and_ip_translator->translator_funcs->get_soc_bb(&dml_init->soc_bb, in_dc, config); in dml21_populate_dml_init_params()
70 dml_init->soc_bb = config->external_socbb_ip_params->soc_bb; in dml21_populate_dml_init_params()
394 const struct dml2_soc_bb *soc_bb) in populate_dml21_dummy_plane_cfg() argument
438 plane->overrides.gpuvm_min_page_size_kbytes = soc_bb->gpuvm_min_page_size_kbytes; in populate_dml21_dummy_plane_cfg()
439 plane->overrides.hostvm_min_page_size_kbytes = soc_bb->hostvm_min_page_size_kbytes; in populate_dml21_dummy_plane_cfg()
510 const struct dc_state *context, unsigned int stream_index, const struct dml2_soc_bb *soc_bb) in populate_dml21_plane_config_from_plane_state() argument
654 plane->overrides.gpuvm_min_page_size_kbytes = soc_bb->gpuvm_min_page_size_kbytes; in populate_dml21_plane_config_from_plane_state()
655 plane->overrides.hostvm_min_page_size_kbytes = soc_bb->hostvm_min_page_size_kbytes; in populate_dml21_plane_config_from_plane_state()
758 if (dml_ctx->v21.dml_init.soc_bb.gpuvm_max_page_table_levels) in dml21_map_dc_state_into_dml_display_cfg()
759 …dml_dispcfg->gpuvm_max_page_table_levels = dml_ctx->v21.dml_init.soc_bb.gpuvm_max_page_table_level… in dml21_map_dc_state_into_dml_display_cfg()
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| H A D | dml21_wrapper_fpu.c | 119 if (in_ctx->v21.dml_init.soc_bb.clk_table.dispclk.num_clk_values > 1) { in dml21_calculate_rq_and_dlg_params()
121 …in_ctx->v21.dml_init.soc_bb.clk_table.dispclk.clk_values_khz[in_ctx->v21.dml_init.soc_bb.clk_table… in dml21_calculate_rq_and_dlg_params()
123 …context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dispc… in dml21_calculate_rq_and_dlg_params()
126 if (in_ctx->v21.dml_init.soc_bb.clk_table.dppclk.num_clk_values > 1) { in dml21_calculate_rq_and_dlg_params()
128 …in_ctx->v21.dml_init.soc_bb.clk_table.dppclk.clk_values_khz[in_ctx->v21.dml_init.soc_bb.clk_table.… in dml21_calculate_rq_and_dlg_params()
130 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dppclk… in dml21_calculate_rq_and_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/ |
| H A D | dml2_pmo_dcn4_fams2.c | 656 pmo->soc_bb = in_out->soc_bb; in pmo_dcn4_fams2_initialize()
1148 if (total_mcaches_required > pmo->soc_bb->num_dcc_mcaches) { in all_timings_support_svp()
1750 (unsigned int)math_ceil(pmo->soc_bb->power_management_parameters.dram_clk_change_blackout_us / in build_pstate_meta_per_stream()
1910 ….stream_plane_mask[stream_index]) >= (int)(MIN_VACTIVE_MARGIN_PCT * pmo->soc_bb->power_management_… in pmo_dcn4_fams2_init_for_pstate_support()
2069 …plane->overrides.reserved_vblank_time_ns = (long)math_max2(pmo->soc_bb->power_management_parameter… in setup_planes_for_vblank_by_mask()
2088 …plane->overrides.reserved_vblank_time_ns = (long)(pmo->soc_bb->power_management_parameters.dram_cl… in setup_planes_for_vblank_drr_by_mask()
2217 …REQUIRED_RESERVED_TIME = (int)in_out->instance->soc_bb->power_management_parameters.dram_clk_chang… in pmo_dcn4_fams2_test_for_pstate_support()
2227 …_plane_mask[stream_index]) < (MIN_VACTIVE_MARGIN_PCT * in_out->instance->soc_bb->power_management_… in pmo_dcn4_fams2_test_for_pstate_support()
2305 if (pmo->soc_bb->power_management_parameters.z8_stutter_exit_latency_us > 0 && in pmo_dcn4_fams2_init_for_stutter()
2306 pmo->soc_bb->power_management_parameters.stutter_enter_plus_exit_latency_us > 0 && in pmo_dcn4_fams2_init_for_stutter()
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| H A D | dml2_pmo_dcn42.c | 60 (int)in_out->instance->soc_bb->power_management_parameters.dram_clk_change_blackout_us; in pmo_dcn42_test_for_pstate_support()
98 pmo->soc_bb = in_out->soc_bb; in pmo_dcn42_initialize()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_lib.h | 97 const struct _vcs_dpi_soc_bounding_box_st *soc_bb,
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/ |
| H A D | dml2_top_soc15.c | 815 l->dppm_map_mode_params.soc_bb = &dml->soc_bbox; in dml2_top_soc15_check_mode_supported()
987 l->dppm_map_mode_params.soc_bb = &dml->soc_bbox; in dml2_top_soc15_build_mode_programming()
1124 memcpy(&dml->soc_bbox, &in_out->soc_bb, sizeof(struct dml2_soc_bb)); in dml2_top_soc15_initialize_instance()
1139 mcg_build_min_clk_params.soc_bb = &in_out->soc_bb; in dml2_top_soc15_initialize_instance()
1151 core_init_params.soc_bb = &in_out->soc_bb; in dml2_top_soc15_initialize_instance()
1164 pmo_init_params.soc_bb = &dml->soc_bbox; in dml2_top_soc15_initialize_instance()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4.c | 231 memcpy(&core->clean_me_up.mode_lib.soc, in_out->soc_bb, sizeof(struct dml2_soc_bb)); in core_dcn4_initialize()
262 memcpy(&core->clean_me_up.mode_lib.soc, in_out->soc_bb, sizeof(struct dml2_soc_bb)); in core_dcn42_initialize()
643 static int lookup_uclk_dpm_index_by_freq(unsigned long uclk_freq_khz, struct dml2_soc_bb *soc_bb) in lookup_uclk_dpm_index_by_freq() argument
647 for (i = 0; i < soc_bb->clk_table.uclk.num_clk_values; i++) { in lookup_uclk_dpm_index_by_freq()
648 if (uclk_freq_khz == soc_bb->clk_table.uclk.clk_values_khz[i]) in lookup_uclk_dpm_index_by_freq()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 3558 void dcn32_set_clock_limits(const struct _vcs_dpi_soc_bounding_box_st *soc_bb) in dcn32_set_clock_limits() argument
3560 (void)soc_bb; in dcn32_set_clock_limits()
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