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Searched refs:smu_data (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu7_smumgr.c327 struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in smu7_request_smu_load_fw() local
333 if (smu_data->soft_regs_start) in smu7_request_smu_load_fw()
335 smu_data->soft_regs_start + smum_get_offsetof(hwmgr, in smu7_request_smu_load_fw()
343 upper_32_bits(smu_data->smu_buffer.mc_addr), in smu7_request_smu_load_fw()
347 lower_32_bits(smu_data->smu_buffer.mc_addr), in smu7_request_smu_load_fw()
369 if (!smu_data->toc) { in smu7_request_smu_load_fw()
372 smu_data->toc = kzalloc(sizeof(struct SMU_DRAMData_TOC), GFP_KERNEL); in smu7_request_smu_load_fw()
373 if (!smu_data->toc) in smu7_request_smu_load_fw()
375 toc = smu_data->toc; in smu7_request_smu_load_fw()
411 memcpy_toio(smu_data->header_buffer.kaddr, smu_data->toc, in smu7_request_smu_load_fw()
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H A Dtonga_smumgr.c511 struct tonga_smumgr *smu_data = (struct tonga_smumgr *)(hwmgr->smu_backend); in tonga_populate_smc_link_level() local
530 smu_data->smc_state_table.LinkLevelCount = in tonga_populate_smc_link_level()
689 struct tonga_smumgr *smu_data = (struct tonga_smumgr *)(hwmgr->smu_backend); in tonga_populate_all_graphic_levels() local
694 uint32_t level_array_address = smu_data->smu7_data.dpm_table_start + in tonga_populate_all_graphic_levels()
700 SMU72_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel; in tonga_populate_all_graphic_levels()
713 &(smu_data->smc_state_table.GraphicsLevel[i])); in tonga_populate_all_graphic_levels()
719 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in tonga_populate_all_graphic_levels()
723 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in tonga_populate_all_graphic_levels()
727 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in tonga_populate_all_graphic_levels()
730 smu_data->smc_state_table.GraphicsDpmLevelCount = in tonga_populate_all_graphic_levels()
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H A Dpolaris10_smumgr.c99 struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in polaris10_perform_btc() local
101 if (0 != smu_data->avfs_btc_param) { in polaris10_perform_btc()
102 …if (0 != smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_PerformBtc, smu_data->avfs_btc_param, in polaris10_perform_btc()
108 if (smu_data->avfs_btc_param > 1) { in polaris10_perform_btc()
177 struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in polaris10_avfs_event_mgr() local
186 if (smu_data->avfs_btc_param > 1) { in polaris10_avfs_event_mgr()
295 struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(hwmgr->smu_backend); in polaris10_start_smu() local
299 …smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC… in polaris10_start_smu()
300 …smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS… in polaris10_start_smu()
303 if (smu_data->protected_mode == 0) in polaris10_start_smu()
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H A Dvegam_smumgr.c84 struct vegam_smumgr *smu_data; in vegam_smu_init() local
86 smu_data = kzalloc(sizeof(struct vegam_smumgr), GFP_KERNEL); in vegam_smu_init()
87 if (smu_data == NULL) in vegam_smu_init()
90 hwmgr->smu_backend = smu_data; in vegam_smu_init()
93 kfree(smu_data); in vegam_smu_init()
195 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_start_smu() local
199 smu_data->protected_mode = (uint8_t)(PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, in vegam_start_smu()
201 smu_data->smu7_data.security_hard_key = (uint8_t)(PHM_READ_VFPF_INDIRECT_FIELD( in vegam_start_smu()
205 if (smu_data->protected_mode == 0) in vegam_start_smu()
217 &(smu_data->smu7_data.soft_regs_start), in vegam_start_smu()
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H A Dfiji_smumgr.c201 struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in fiji_start_avfs_btc() local
203 if (0 != smu_data->avfs_btc_param) { in fiji_start_avfs_btc()
205 PPSMC_MSG_PerformBtc, smu_data->avfs_btc_param, in fiji_start_avfs_btc()
469 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_initialize_power_tune_defaults() local
476 smu_data->power_tune_defaults = in fiji_initialize_power_tune_defaults()
480 smu_data->power_tune_defaults = &fiji_power_tune_data_set_array[0]; in fiji_initialize_power_tune_defaults()
487 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_bapm_parameters_in_dpm_table() local
488 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; in fiji_populate_bapm_parameters_in_dpm_table()
490 SMU73_Discrete_DpmTable *dpm_table = &(smu_data->smc_state_table); in fiji_populate_bapm_parameters_in_dpm_table()
570 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_svi_load_line() local
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H A Diceland_smumgr.c282 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_initialize_power_tune_defaults() local
291 smu_data->power_tune_defaults = &defaults_icelandxt; in iceland_initialize_power_tune_defaults()
296 smu_data->power_tune_defaults = &defaults_icelandpro; in iceland_initialize_power_tune_defaults()
299 smu_data->power_tune_defaults = &defaults_iceland; in iceland_initialize_power_tune_defaults()
308 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_svi_load_line() local
309 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; in iceland_populate_svi_load_line()
311 smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; in iceland_populate_svi_load_line()
312 smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc; in iceland_populate_svi_load_line()
313 smu_data->power_tune_table.SviLoadLineTrimVddC = 3; in iceland_populate_svi_load_line()
314 smu_data->power_tune_table.SviLoadLineOffsetVddC = 0; in iceland_populate_svi_load_line()
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H A Dci_smumgr.c236 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend); in ci_initialize_power_tune_defaults() local
245 smu_data->power_tune_defaults = &defaults_hawaii_pro; in ci_initialize_power_tune_defaults()
249 smu_data->power_tune_defaults = &defaults_hawaii_xt; in ci_initialize_power_tune_defaults()
255 smu_data->power_tune_defaults = &defaults_saturn_xt; in ci_initialize_power_tune_defaults()
272 smu_data->power_tune_defaults = &defaults_bonaire_xt; in ci_initialize_power_tune_defaults()
475 struct ci_smumgr *smu_data = (struct ci_smumgr *)(hwmgr->smu_backend); in ci_populate_all_graphic_levels() local
478 uint32_t array = smu_data->dpm_table_start + in ci_populate_all_graphic_levels()
483 smu_data->smc_state_table.GraphicsLevel; in ci_populate_all_graphic_levels()
493 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in ci_populate_all_graphic_levels()
495 smu_data->smc_state_table.GraphicsLevel[i].DisplayWatermark = in ci_populate_all_graphic_levels()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c5336 struct polaris10_smumgr *smu_data = in smu7_set_watermarks_for_clocks_ranges() local
5338 SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table); in smu7_set_watermarks_for_clocks_ranges()
5368 smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, DisplayWatermark), in smu7_set_watermarks_for_clocks_ranges()