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Searched refs:smmu (Results 1 – 25 of 31) sorted by relevance

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/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu.c72 static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu) in arm_smmu_rpm_get() argument
74 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_get()
75 return pm_runtime_resume_and_get(smmu->dev); in arm_smmu_rpm_get()
80 static inline void arm_smmu_rpm_put(struct arm_smmu_device *smmu) in arm_smmu_rpm_put() argument
82 if (pm_runtime_enabled(smmu->dev)) { in arm_smmu_rpm_put()
83 pm_runtime_mark_last_busy(smmu->dev); in arm_smmu_rpm_put()
84 __pm_runtime_put_autosuspend(smmu->dev); in arm_smmu_rpm_put()
89 static void arm_smmu_rpm_use_autosuspend(struct arm_smmu_device *smmu) in arm_smmu_rpm_use_autosuspend() argument
102 pm_runtime_set_autosuspend_delay(smmu->dev, 20); in arm_smmu_rpm_use_autosuspend()
103 pm_runtime_use_autosuspend(smmu->dev); in arm_smmu_rpm_use_autosuspend()
[all …]
H A Darm-smmu-nvidia.c35 struct arm_smmu_device smmu; member
41 static inline struct nvidia_smmu *to_nvidia_smmu(struct arm_smmu_device *smmu) in to_nvidia_smmu() argument
43 return container_of(smmu, struct nvidia_smmu, smmu); in to_nvidia_smmu()
46 static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu, in nvidia_smmu_page() argument
51 nvidia_smmu = container_of(smmu, struct nvidia_smmu, smmu); in nvidia_smmu_page()
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
55 static u32 nvidia_smmu_read_reg(struct arm_smmu_device *smmu, in nvidia_smmu_read_reg() argument
58 void __iomem *reg = nvidia_smmu_page(smmu, 0, page) + offset; in nvidia_smmu_read_reg()
63 static void nvidia_smmu_write_reg(struct arm_smmu_device *smmu, in nvidia_smmu_write_reg() argument
66 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu); in nvidia_smmu_write_reg()
[all …]
H A Darm-smmu-qcom-debug.c59 static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu) in to_qcom_smmu() argument
61 return container_of(smmu, struct qcom_smmu, smmu); in to_qcom_smmu()
64 void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu) in qcom_smmu_tlb_sync_debug() argument
68 struct qcom_smmu *qsmmu = container_of(smmu, struct qcom_smmu, smmu); in qcom_smmu_tlb_sync_debug()
74 dev_err(smmu->dev, "TLB sync timed out -- SMMU may be deadlocked\n"); in qcom_smmu_tlb_sync_debug()
80 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_TBU_PWR_STATUS], in qcom_smmu_tlb_sync_debug()
83 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
86 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_STATS_SYNC_INV_TBU_ACK], in qcom_smmu_tlb_sync_debug()
89 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
92 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR], in qcom_smmu_tlb_sync_debug()
[all …]
H A DMakefile4 arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o
5 arm_smmu-$(CONFIG_ARM_SMMU_QCOM) += arm-smmu-qcom.o
6 arm_smmu-$(CONFIG_ARM_SMMU_QCOM_DEBUG) += arm-smmu-qcom-debug.o
/linux/drivers/iommu/
H A Dtegra-smmu.c26 struct tegra_smmu *smmu; member
59 struct tegra_smmu *smmu; member
75 static inline void smmu_writel(struct tegra_smmu *smmu, u32 value, in smmu_writel() argument
78 writel(value, smmu->regs + offset); in smmu_writel()
81 static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset) in smmu_readl() argument
83 return readl(smmu->regs + offset); in smmu_readl()
92 #define SMMU_TLB_CONFIG_ACTIVE_LINES(smmu) \ argument
93 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask)
179 static bool smmu_dma_addr_valid(struct tegra_smmu *smmu, dma_addr_t addr) in smmu_dma_addr_valid() argument
182 return (addr & smmu->pfn_mask) == addr; in smmu_dma_addr_valid()
[all …]
/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3-iommufd.c14 const struct arm_smmu_impl_ops *impl_ops = master->smmu->impl_ops; in arm_smmu_hw_info()
23 return impl_ops->hw_info(master->smmu, length, type); in arm_smmu_hw_info()
30 base_idr = master->smmu->base + ARM_SMMU_IDR0; in arm_smmu_hw_info()
33 info->iidr = readl_relaxed(master->smmu->base + ARM_SMMU_IIDR); in arm_smmu_hw_info()
34 info->aidr = readl_relaxed(master->smmu->base + ARM_SMMU_AIDR); in arm_smmu_hw_info()
138 mutex_lock(&master->smmu->streams_mutex); in arm_smmu_attach_commit_vmaster()
141 mutex_unlock(&master->smmu->streams_mutex); in arm_smmu_attach_commit_vmaster()
166 if (nested_domain->vsmmu->smmu != master->smmu) in arm_smmu_attach_dev_nested()
357 struct arm_smmu_device *smmu = vsmmu->smmu; in arm_vsmmu_cache_invalidate() local
389 ret = arm_smmu_cmdq_issue_cmdlist(smmu, &smmu->cmdq, last->cmd, in arm_vsmmu_cache_invalidate()
[all …]
H A DMakefile3 arm_smmu_v3-y := arm-smmu-v3.o
4 arm_smmu_v3-$(CONFIG_ARM_SMMU_V3_IOMMUFD) += arm-smmu-v3-iommufd.o
5 arm_smmu_v3-$(CONFIG_ARM_SMMU_V3_SVA) += arm-smmu-v3-sva.o
8 obj-$(CONFIG_ARM_SMMU_V3_KUNIT_TEST) += arm-smmu-v3-test.o
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040.dtsi14 <0x0 &smmu 0x480 0x20>,
15 <0x100 &smmu 0x4a0 0x20>,
16 <0x200 &smmu 0x4c0 0x20>;
30 iommus = <&smmu 0x444>;
34 iommus = <&smmu 0x445>;
38 iommus = <&smmu 0x440>;
42 iommus = <&smmu 0x441>;
46 iommus = <&smmu 0x454>;
50 iommus = <&smmu 0x450>;
54 iommus = <&smmu 0x451>;
H A Darmada-7040.dtsi14 <0x0 &smmu 0x480 0x20>,
15 <0x100 &smmu 0x4a0 0x20>,
16 <0x200 &smmu 0x4c0 0x20>;
21 iommus = <&smmu 0x444>;
25 iommus = <&smmu 0x445>;
29 iommus = <&smmu 0x440>;
33 iommus = <&smmu 0x441>;
H A Dcn9130-crb-A.dts22 <0x0 &smmu 0x480 0x20>,
23 <0x100 &smmu 0x4a0 0x20>,
24 <0x200 &smmu 0x4c0 0x20>;
H A Darmada-ap80x.dtsi79 smmu: iommu@100000 { label
80 compatible = "marvell,ap806-smmu-500", "arm,mmu-500";
/linux/drivers/acpi/arm64/
H A Diort.c437 struct acpi_iort_smmu_v3 *smmu; in iort_get_id_mapping_index() local
449 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; in iort_get_id_mapping_index()
455 if (smmu->event_gsiv && smmu->pri_gsiv && in iort_get_id_mapping_index()
456 smmu->gerr_gsiv && smmu->sync_gsiv) in iort_get_id_mapping_index()
458 } else if (!(smmu->flags & ACPI_IORT_SMMU_V3_DEVICEID_VALID)) { in iort_get_id_mapping_index()
462 if (smmu->id_mapping_index >= node->mapping_count) { in iort_get_id_mapping_index()
468 return smmu->id_mapping_index; in iort_get_id_mapping_index()
1009 struct acpi_iort_node *smmu, in iort_get_rmrs() argument
1104 struct acpi_iort_node *smmu = NULL; in iort_node_get_rmr_info() local
1155 iort_get_rmrs(node, smmu, sids, num_sids, head); in iort_node_get_rmr_info()
[all …]
/linux/Documentation/devicetree/bindings/iommu/
H A Dnvidia,tegra30-smmu.txt4 - compatible : "nvidia,tegra30-smmu"
13 smmu {
14 compatible = "nvidia,tegra30-smmu";
/linux/arch/arm64/boot/dts/xilinx/
H A Dversal-net-vn-x-b2197-01-revA.dts79 iommus = <&smmu 0x235>;
93 iommus = <&smmu 0x245>;
100 iommus = <&smmu 0x243>;
114 &smmu {
/linux/drivers/iommu/arm/
H A DMakefile2 obj-y += arm-smmu/ arm-smmu-v3/
/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi184 iommus = <&smmu 1>;
202 iommus = <&smmu 2>;
220 iommus = <&smmu 3>;
334 iommus = <&smmu 5>;
403 smmu: iommu@fa000000 { label
404 compatible = "arm,mmu-500", "arm,smmu-v2";
554 iommus = <&smmu 6>;
566 iommus = <&smmu 7>;
H A Dsocfpga_agilex5_socdk_013b.dts116 &smmu {
H A Dsocfpga_agilex3_socdk.dts122 &smmu {
/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi36 compatible = "arm,mmu-400", "arm,smmu-v1";
48 compatible = "arm,mmu-401", "arm,smmu-v1";
59 compatible = "arm,mmu-401", "arm,smmu-v1";
804 compatible = "arm,mmu-401", "arm,smmu-v1";
814 compatible = "arm,mmu-401", "arm,smmu-v1";
823 compatible = "arm,mmu-401", "arm,smmu-v1";
832 compatible = "arm,mmu-401", "arm,smmu-v1";
H A Dfvp-base-revc.dts344 iommu-map = <0x0 &smmu 0x0 0x10000>;
350 smmu: iommu@2b400000 { label
351 compatible = "arm,smmu-v3";
H A Dmorello.dtsi275 compatible = "arm,smmu-v3";
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip07.dtsi1227 * systems. Hence please make sure that the smmu pcie node on
1233 compatible = "arm,smmu-v3";
1241 compatible = "arm,smmu-v3";
1253 compatible = "arm,smmu-v3";
1265 compatible = "arm,smmu-v3";
1277 compatible = "arm,smmu-v3";
H A Dhip06.dtsi378 * systems. Hence please make sure that the smmu pcie node on
384 compatible = "arm,smmu-v3";
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-platform30 arm smmu which are populated by arm64 acpi_iort.
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65.dtsi598 compatible = "qcom,sdx65-smmu-500", "qcom,smmu-500", "arm,mmu-500";

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