| /linux/block/partitions/ |
| H A D | sysv68.c | 51 int i, slices; in sysv68_partition() local
68 slices = be16_to_cpu(b->dk_ios.ios_slccnt); in sysv68_partition()
76 slices -= 1; /* last slice is the whole disk */ in sysv68_partition()
77 snprintf(tmp, sizeof(tmp), "sysV68: %s(s%u)", state->name, slices); in sysv68_partition()
80 for (i = 0; i < slices; i++, slice++) { in sysv68_partition()
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| /linux/drivers/hte/ |
| H A D | hte-tegra194.c | 120 u32 slices; member
326 .slices = 3,
335 .slices = 3,
342 .slices = 11,
349 .slices = 17,
689 u32 i, slices, val = 0; in tegra_hte_probe() local
709 ret = of_property_read_u32(dev->of_node, "nvidia,slices", &slices); in tegra_hte_probe()
711 slices = hte_dev->prov_data->slices; in tegra_hte_probe()
713 dev_dbg(dev, "slices:%d\n", slices); in tegra_hte_probe()
714 nlines = slices << 5; in tegra_hte_probe()
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| /linux/drivers/phy/lantiq/ |
| H A D | phy-lantiq-vrx200-pcie.c | 202 static const struct reg_default slices[] = { in ltq_vrx200_pcie_phy_apply_workarounds() local
218 for (i = 0; i < ARRAY_SIZE(slices); i++) { in ltq_vrx200_pcie_phy_apply_workarounds()
220 regmap_update_bits(priv->phy_regmap, slices[i].reg, in ltq_vrx200_pcie_phy_apply_workarounds()
221 slices[i].def, slices[i].def); in ltq_vrx200_pcie_phy_apply_workarounds()
226 regmap_update_bits(priv->phy_regmap, slices[i].reg, in ltq_vrx200_pcie_phy_apply_workarounds()
227 slices[i].def, 0x0); in ltq_vrx200_pcie_phy_apply_workarounds()
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_admin.c | 334 struct icp_qat_fw_init_admin_slice_cnt *slices) in adf_send_admin_rl_init() argument
347 memcpy(slices, &resp.slices, sizeof(*slices)); in adf_send_admin_rl_init()
521 memcpy(slice_count, &resp.slices, sizeof(*slice_count)); in adf_send_admin_tl_start()
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| H A D | adf_admin.h | 18 struct icp_qat_fw_init_admin_slice_cnt *slices);
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| H A D | adf_rl.c | 565 avail_slice_cycles *= device_data->slices.pke_cnt; in adf_rl_calculate_slice_tokens()
568 avail_slice_cycles *= device_data->slices.cph_cnt; in adf_rl_calculate_slice_tokens()
571 avail_slice_cycles *= device_data->slices.dcpr_cnt; in adf_rl_calculate_slice_tokens()
623 sla_to_bytes *= device_data->slices.dcpr_cnt - in adf_rl_calculate_pci_bw()
1139 ret = adf_rl_send_admin_init_msg(accel_dev, &rl_hw_data->slices); in adf_rl_start()
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| H A D | adf_rl.h | 97 struct rl_slice_cnt slices; member
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| H A D | icp_qat_fw_init_admin.h | 160 struct icp_qat_fw_init_admin_slice_cnt slices; member
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| /linux/Documentation/admin-guide/perf/ |
| H A D | qcom_l3_pmu.rst | 6 Centriq SoCs. The L3 cache on these SOCs is composed of multiple slices, shared
9 for aggregating across slices.
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| /linux/Documentation/scheduler/ |
| H A D | sched-eevdf.rst | 21 allows latency-sensitive tasks with shorter time slices to be prioritized,
31 can request specific time slices using the new sched_setattr() system call,
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| H A D | schedutil.rst | 15 individual tasks to task-group slices to CPU runqueues. As the basis for this
31 Note that blocked tasks still contribute to the aggregates (task-group slices
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| H A D | sched-bwc.rst | 15 slices as threads in the cgroup become runnable. Once all quota has been
169 The fact that cpu-local slices do not expire results in some interesting corner
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| /linux/drivers/misc/cxl/ |
| H A D | pci.c | 1304 CXL_READ_VSEC_NAFUS(dev, vsec, &adapter->slices); in cxl_read_vsec()
1318 adapter->user_irqs = pnv_cxl_get_irq_count(dev) - 1 - 2*adapter->slices; in cxl_read_vsec()
1376 if (!adapter->slices) { in cxl_vsec_looks_ok()
1554 for (slice = 0; slice < adapter->slices; slice++) { in cxl_stop_trace_psl8()
1753 for (slice = 0; slice < adapter->slices; slice++) { in cxl_probe()
1777 for (i = 0; i < adapter->slices; i++) { in cxl_remove()
1838 for (i = 0; i < adapter->slices; i++) { in cxl_pci_error_detected()
1932 for (i = 0; i < adapter->slices; i++) { in cxl_pci_error_detected()
1986 for (i = 0; i < adapter->slices; i++) { in cxl_pci_slot_reset()
2069 for (i = 0; i < adapter->slices; i++) { in cxl_pci_resume()
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| H A D | of.c | 279 for (afu = 0; afu < adapter->slices; afu++) in cxl_of_remove()
323 adapter->slices = 0; in cxl_of_probe()
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| H A D | guest.c | 273 for (i = 0; i < adapter->slices; i++) { in guest_reset()
282 for (i = 0; i < adapter->slices; i++) { in guest_reset()
943 adapter->slices++; in cxl_guest_init_afu()
1117 adapter->slices = 0; in cxl_guest_init_adapter()
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| H A D | main.c | 89 for (slice = 0; slice < adapter->slices; slice++) { in cxl_slbia_core()
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| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_sseu.c | 662 u8 slices, subslices; in intel_sseu_make_rpcs() local
679 slices = hweight8(req_sseu->slice_mask); in intel_sseu_make_rpcs()
708 slices == 1 && in intel_sseu_make_rpcs()
713 slices *= 2; in intel_sseu_make_rpcs()
723 u32 mask, val = slices; in intel_sseu_make_rpcs()
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| /linux/drivers/gpu/drm/i915/gem/selftests/ |
| H A D | i915_gem_context.c | 1137 __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected, in __check_rpcs() argument
1140 if (slices == expected) in __check_rpcs()
1143 if (slices < 0) { in __check_rpcs()
1145 name, prefix, slices, suffix); in __check_rpcs()
1146 return slices; in __check_rpcs()
1150 name, prefix, slices, expected, suffix); in __check_rpcs()
1153 rpcs, slices, in __check_rpcs()
1169 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish() local
1186 ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!"); in __sseu_finish()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | skl_watermark.c | 633 if (dbuf_state->slices[pipe] != dbuf_state->slices[for_pipe]) in intel_crtc_dbuf_weights()
669 dbuf_slice_mask = new_dbuf_state->slices[pipe]; in skl_crtc_allocate_ddb()
686 if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe] && in skl_crtc_allocate_ddb()
709 old_dbuf_state->slices[pipe], new_dbuf_state->slices[pipe], in skl_crtc_allocate_ddb()
2491 enabled_slices |= dbuf_state->slices[pipe]; in intel_dbuf_enabled_slices()
2541 new_dbuf_state->slices[pipe] = in skl_compute_ddb()
2545 if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe]) in skl_compute_ddb()
2998 u8 slices; in skl_wm_get_hw_state() local
3030 slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes, in skl_wm_get_hw_state()
3032 mbus_offset = mbus_ddb_offset(i915, slices); in skl_wm_get_hw_state()
[all …]
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| /linux/fs/bfs/ |
| H A D | Kconfig | 13 to "UnixWare slices support", below. More information about the BFS
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| /linux/drivers/accel/qaic/ |
| H A D | qaic.h | 189 struct list_head slices; member
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| H A D | qaic_data.c | 425 list_add_tail(&slice->slice, &bo->slices); in qaic_map_one_slice()
658 INIT_LIST_HEAD(&bo->slices); in qaic_init_bo()
906 list_for_each_entry_safe(slice, temp, &bo->slices, slice) in qaic_free_slices_bo()
1215 list_for_each_entry(slice, &bo->slices, slice) { in send_bo_list_to_device()
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| /linux/Documentation/filesystems/ |
| H A D | bfs.rst | 12 know the partition number and the kernel must support UnixWare disk slices
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| /linux/tools/perf/Documentation/ |
| H A D | perf-diff.txt | 142 Select the first and the second 10% time slices to diff:
146 Select from 0% to 10% and 30% to 40% slices to diff:
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| /linux/tools/sched_ext/ |
| H A D | README.md | 186 single CPU, allowing other cores to run with infinite slices, without timer
192 infinite slices and no timer ticks allows the VM to avoid unnecessary expensive
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