Searched refs:slice_mask (Results 1 – 14 of 14) sorted by relevance
| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_sseu.h | 69 u8 slice_mask; member 102 u8 slice_mask; member 112 .slice_mask = sseu->slice_mask, in intel_sseu_from_device_info()
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| H A D | intel_workarounds.c | 1159 slice = ffs(sseu->slice_mask) - 1; in gen9_wa_init_mcr() 1308 GEM_BUG_ON(hweight8(sseu->slice_mask) > 1); in icl_wa_init_mcr() 1336 unsigned long slice, subslice = 0, slice_mask = 0; in xehp_init_mcr() local 1367 slice_mask = intel_slicemask_from_xehp_dssmask(sseu->subslice_mask, in xehp_init_mcr() 1381 if (slice_mask & lncf_mask) { in xehp_init_mcr() 1382 slice_mask &= lncf_mask; in xehp_init_mcr() 1387 if (slice_mask & gt->info.mslice_mask) { in xehp_init_mcr() 1388 slice_mask &= gt->info.mslice_mask; in xehp_init_mcr() 1392 slice = __ffs(slice_mask); in xehp_init_mcr()
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| /linux/arch/powerpc/include/asm/book3s/64/ |
| H A D | mmu-hash.h | 707 struct slice_mask { struct 720 struct slice_mask mask_64k; argument 722 struct slice_mask mask_4k; 724 struct slice_mask mask_16m; 725 struct slice_mask mask_16g;
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| H A D | mmu.h | 169 static inline struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) in slice_mask_for_size()
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| /linux/drivers/gpu/drm/i915/gem/ |
| H A D | i915_gem_context.c | 1000 if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS)) in intel_context_set_gem() 1915 if (!user->slice_mask || !user->subslice_mask || in i915_gem_user_to_context_sseu() 1927 if (overflows_type(user->slice_mask, context->slice_mask) || in i915_gem_user_to_context_sseu() 1936 if (user->slice_mask & ~device->slice_mask) in i915_gem_user_to_context_sseu() 1945 context->slice_mask = user->slice_mask; in i915_gem_user_to_context_sseu() 1952 unsigned int hw_s = hweight8(device->slice_mask); in i915_gem_user_to_context_sseu() 1954 unsigned int req_s = hweight8(context->slice_mask); in i915_gem_user_to_context_sseu() 2509 user_sseu.slice_mask = ce->sseu.slice_mask; in get_sseu()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | skl_watermark.c | 410 hweight8(DISPLAY_INFO(display)->dbuf.slice_mask); in intel_dbuf_slice_size() 414 skl_ddb_entry_for_slices(struct intel_display *display, u8 slice_mask, in skl_ddb_entry_for_slices() argument 419 if (!slice_mask) { in skl_ddb_entry_for_slices() 425 ddb->start = (ffs(slice_mask) - 1) * slice_size; in skl_ddb_entry_for_slices() 426 ddb->end = fls(slice_mask) * slice_size; in skl_ddb_entry_for_slices() 432 static unsigned int mbus_ddb_offset(struct intel_display *display, u8 slice_mask) in mbus_ddb_offset() argument 436 if (slice_mask & (BIT(DBUF_S1) | BIT(DBUF_S2))) in mbus_ddb_offset() 437 slice_mask = BIT(DBUF_S1); in mbus_ddb_offset() 438 else if (slice_mask & (BIT(DBUF_S3) | BIT(DBUF_S4))) in mbus_ddb_offset() 439 slice_mask = BIT(DBUF_S3); in mbus_ddb_offset() [all …]
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| H A D | intel_display_device.c | 663 .dbuf.slice_mask = BIT(DBUF_S1), 813 .dbuf.slice_mask = BIT(DBUF_S1), \ 872 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \ 962 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \ 1129 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \ 1307 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
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| /linux/drivers/gpu/drm/i915/gem/selftests/ |
| H A D | i915_gem_context.c | 1170 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish() 1227 hweight32(sseu.slice_mask), spin); in __sseu_test() 1272 if (hweight32(engine->sseu.slice_mask) < 2) in __igt_ctx_sseu() 1283 pg_sseu.slice_mask = 1; in __igt_ctx_sseu() 1289 hweight32(engine->sseu.slice_mask), in __igt_ctx_sseu() 1290 hweight32(pg_sseu.slice_mask)); in __igt_ctx_sseu()
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| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gpu.h | 114 u32 slice_mask; member
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| /linux/include/uapi/drm/ |
| H A D | i915_drm.h | 2218 __u64 slice_mask; member
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| /linux/tools/include/uapi/drm/ |
| H A D | i915_drm.h | 2218 __u64 slice_mask; member
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| /linux/drivers/gpu/drm/i915/gt/uc/ |
| H A D | intel_guc_ads.c | 900 hweight8(gt->info.sseu.slice_mask)); in __guc_ads_init()
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | qat_hal.c | 801 handle->hal_handle->slice_mask = hw_data->accel_mask; in qat_hal_chip_init()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_perf.c | 3172 out_sseu->slice_mask = 0x1; in get_default_sseu_config()
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