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Searched refs:shift (Results 1 – 25 of 1574) sorted by relevance

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/linux/drivers/bus/
H A Domap_l3_smx.h29 static const u64 shift = 1; variable
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
32 #define L3_STATUS_0_MPUIA_RSP (shift << 1)
33 #define L3_STATUS_0_MPUIA_INBAND (shift << 2)
34 #define L3_STATUS_0_IVAIA_BRST (shift << 6)
35 #define L3_STATUS_0_IVAIA_RSP (shift << 7)
36 #define L3_STATUS_0_IVAIA_INBAND (shift << 8)
37 #define L3_STATUS_0_SGXIA_BRST (shift << 9)
38 #define L3_STATUS_0_SGXIA_RSP (shift << 10)
39 #define L3_STATUS_0_SGXIA_MERROR (shift << 11)
[all …]
H A Dda8xx-mstpri.c55 int shift; member
62 .shift = 0,
67 .shift = 4,
72 .shift = 16,
77 .shift = 20,
82 .shift = 0,
87 .shift = 4,
92 .shift = 8,
97 .shift = 12,
102 .shift = 16,
[all …]
/linux/drivers/clk/imx/
H A Dclk.h118 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ argument
119 to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))
127 #define imx_clk_divider(name, parent, reg, shift, width) \ argument
128 to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
130 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \ argument
131 to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
133 #define imx_clk_gate(name, parent, reg, shift) \ argument
134 to_clk(imx_clk_hw_gate(name, parent, reg, shift))
136 #define imx_clk_gate_dis(name, parent, reg, shift) \ argument
137 to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift))
[all …]
/linux/arch/alpha/include/uapi/asm/
H A Dcompiler.h14 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
15 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
16 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
17 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
18 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
19 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
22 # define __kernel_insbl(val, shift) \ argument
24 __asm__("insbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
26 # define __kernel_inswl(val, shift) \ argument
28 __asm__("inswl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
[all …]
/linux/drivers/memory/tegra/
H A Dtegra114.c21 .shift = 0,
37 .shift = 0,
53 .shift = 0,
69 .shift = 16,
85 .shift = 16,
101 .shift = 0,
117 .shift = 0,
133 .shift = 0,
149 .shift = 0,
165 .shift = 16,
[all …]
H A Dtegra124.c22 .shift = 0,
38 .shift = 0,
54 .shift = 0,
70 .shift = 16,
86 .shift = 16,
102 .shift = 0,
118 .shift = 0,
134 .shift = 0,
150 .shift = 0,
166 .shift = 0,
[all …]
H A Dtegra210.c26 .shift = 0,
42 .shift = 0,
58 .shift = 16,
74 .shift = 16,
90 .shift = 0,
106 .shift = 0,
122 .shift = 0,
138 .shift = 0,
154 .shift = 0,
170 .shift = 0,
[all …]
H A Dtegra30.c43 .shift = 0,
60 .shift = 0,
77 .shift = 0,
94 .shift = 16,
111 .shift = 16,
128 .shift = 0,
145 .shift = 0,
162 .shift = 16,
179 .shift = 16,
196 .shift = 0,
[all …]
/linux/include/linux/
H A Dbitops.h104 static inline __u64 rol64(__u64 word, unsigned int shift) in rol64() argument
106 return (word << (shift & 63)) | (word >> ((-shift) & 63)); in rol64()
114 static inline __u64 ror64(__u64 word, unsigned int shift) in ror64() argument
116 return (word >> (shift & 63)) | (word << ((-shift) & 63)); in ror64()
124 static inline __u32 rol32(__u32 word, unsigned int shift) in rol32() argument
126 return (word << (shift & 31)) | (word >> ((-shift) & 31)); in rol32()
134 static inline __u32 ror32(__u32 word, unsigned int shift) in ror32() argument
136 return (word >> (shift & 31)) | (word << ((-shift) & 31)); in ror32()
144 static inline __u16 rol16(__u16 word, unsigned int shift) in rol16() argument
146 return (word << (shift & 15)) | (word >> ((-shift) & 15)); in rol16()
[all …]
/linux/drivers/clk/meson/
H A Dparm.h14 #define SETPMASK(width, shift) GENMASK(shift + width - 1, shift) argument
15 #define CLRPMASK(width, shift) (~SETPMASK(width, shift)) argument
17 #define PARM_GET(width, shift, reg) \ argument
18 (((reg) & SETPMASK(width, shift)) >> (shift))
19 #define PARM_SET(width, shift, reg, val) \ argument
20 (((reg) & CLRPMASK(width, shift)) | ((val) << (shift)))
26 u8 shift; member
35 return PARM_GET(p->width, p->shift, val); in meson_parm_read()
41 regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift), in meson_parm_write()
42 val << p->shift); in meson_parm_write()
H A Ds4-pll.c58 .shift = 28,
63 .shift = 0,
68 .shift = 0,
73 .shift = 10,
78 .shift = 31,
83 .shift = 29,
100 .shift = 16,
297 .shift = 28,
302 .shift = 0,
307 .shift = 10,
[all …]
/linux/include/drm/
H A Ddrm_fixed.h123 unsigned shift, sign = (a >> 63) & 1; in drm_fixp_msbset() local
125 for (shift = 62; shift > 0; --shift) in drm_fixp_msbset()
126 if (((a >> shift) & 1) != sign) in drm_fixp_msbset()
127 return shift; in drm_fixp_msbset()
134 unsigned shift = drm_fixp_msbset(a) + drm_fixp_msbset(b); in drm_fixp_mul() local
137 if (shift > 61) { in drm_fixp_mul()
138 shift = shift - 61; in drm_fixp_mul()
139 a >>= (shift >> 1) + (shift & 1); in drm_fixp_mul()
140 b >>= shift >> 1; in drm_fixp_mul()
142 shift = 0; in drm_fixp_mul()
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap24xx-clocks.dtsi12 ti,bit-shift = <2>;
26 ti,bit-shift = <6>;
78 ti,bit-shift = <23>;
94 ti,bit-shift = <6>;
103 ti,bit-shift = <6>;
132 ti,bit-shift = <2>;
133 ti,idlest-shift = <8>;
142 ti,bit-shift = <6>;
143 ti,idlest-shift = <9>;
152 ti,bit-shift = <5>;
[all …]
H A Domap2430-clocks.dtsi26 ti,bit-shift = <2>;
40 ti,bit-shift = <4>;
56 ti,bit-shift = <0>;
64 ti,bit-shift = <5>;
80 ti,bit-shift = <0>;
102 ti,bit-shift = <1>;
110 ti,bit-shift = <3>;
118 ti,bit-shift = <3>;
126 ti,bit-shift = <4>;
134 ti,bit-shift = <4>;
[all …]
/linux/drivers/mtd/maps/
H A Dphysmap-bt1-rom.c33 unsigned int shift; in bt1_rom_map_read() local
38 shift = (uintptr_t)src & 0x3; in bt1_rom_map_read()
39 data = readl_relaxed(src - shift); in bt1_rom_map_read()
40 if (!shift) { in bt1_rom_map_read()
44 ret.x[0] = data >> (shift * BITS_PER_BYTE); in bt1_rom_map_read()
47 shift = 4 - shift; in bt1_rom_map_read()
48 if (ofs + shift >= map->size) in bt1_rom_map_read()
51 data = readl_relaxed(src + shift); in bt1_rom_map_read()
52 ret.x[0] |= data << (shift * BITS_PER_BYTE); in bt1_rom_map_read()
62 unsigned int shift, chunk; in bt1_rom_map_copy_from() local
[all …]
/linux/arch/mips/kernel/
H A Dcmpxchg.c14 unsigned int shift; in __xchg_small() local
28 shift = (unsigned long)ptr & 0x3; in __xchg_small()
30 shift ^= sizeof(u32) - size; in __xchg_small()
31 shift *= BITS_PER_BYTE; in __xchg_small()
32 mask <<= shift; in __xchg_small()
43 new32 = (load32 & ~mask) | (val << shift); in __xchg_small()
47 return (load32 & mask) >> shift; in __xchg_small()
55 unsigned int shift; in __cmpxchg_small() local
70 shift = (unsigned long)ptr & 0x3; in __cmpxchg_small()
72 shift ^= sizeof(u32) - size; in __cmpxchg_small()
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.c98 s32 qm_shl32(s32 op, int shift) in qm_shl32() argument
103 if (shift > 31) in qm_shl32()
104 shift = 31; in qm_shl32()
105 else if (shift < -31) in qm_shl32()
106 shift = -31; in qm_shl32()
107 if (shift >= 0) { in qm_shl32()
108 for (i = 0; i < shift; i++) in qm_shl32()
111 result = result >> (-shift); in qm_shl32()
123 s16 qm_shl16(s16 op, int shift) in qm_shl16() argument
128 if (shift > 15) in qm_shl16()
[all …]
/linux/drivers/soc/fsl/qe/
H A Ducc.c89 unsigned int *reg_num, unsigned int *shift) in get_cmxucr_reg() argument
95 *shift = 16 - 8 * (ucc_num & 2); in get_cmxucr_reg()
102 unsigned int shift; in ucc_mux_set_grant_tsa_bkpt() local
108 get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift); in ucc_mux_set_grant_tsa_bkpt()
111 qe_setbits_be32(cmxucr, mask << shift); in ucc_mux_set_grant_tsa_bkpt()
113 qe_clrbits_be32(cmxucr, mask << shift); in ucc_mux_set_grant_tsa_bkpt()
124 unsigned int shift; in ucc_set_qe_mux_rxtx() local
135 get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift); in ucc_set_qe_mux_rxtx()
208 shift += 4; in ucc_set_qe_mux_rxtx()
210 qe_clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, in ucc_set_qe_mux_rxtx()
[all …]
/linux/drivers/gpio/
H A Dgpio-tangier.c77 u8 shift = offset % 32; in gpio_reg_and_bit() local
79 *bit = shift; in gpio_reg_and_bit()
86 u8 shift; in tng_gpio_get() local
88 gplr = gpio_reg_and_bit(chip, offset, GPLR, &shift); in tng_gpio_get()
90 return !!(readl(gplr) & BIT(shift)); in tng_gpio_get()
97 u8 shift; in tng_gpio_set() local
99 reg = gpio_reg_and_bit(chip, offset, value ? GPSR : GPCR, &shift); in tng_gpio_set()
103 writel(BIT(shift), reg); in tng_gpio_set()
113 u8 shift; in tng_gpio_direction_input() local
115 gpdr = gpio_reg_and_bit(chip, offset, GPDR, &shift); in tng_gpio_direction_input()
[all …]
/linux/arch/arm64/lib/
H A Dinsn.c28 int shift; in aarch64_get_imm_shift_mask() local
33 shift = 0; in aarch64_get_imm_shift_mask()
37 shift = 5; in aarch64_get_imm_shift_mask()
41 shift = 5; in aarch64_get_imm_shift_mask()
45 shift = 5; in aarch64_get_imm_shift_mask()
49 shift = 10; in aarch64_get_imm_shift_mask()
53 shift = 12; in aarch64_get_imm_shift_mask()
57 shift = 15; in aarch64_get_imm_shift_mask()
62 shift = 10; in aarch64_get_imm_shift_mask()
66 shift = 16; in aarch64_get_imm_shift_mask()
[all …]
/linux/drivers/md/persistent-data/
H A Ddm-btree-remove.c60 static void node_shift(struct btree_node *n, int shift) in node_shift() argument
65 if (shift < 0) { in node_shift()
66 shift = -shift; in node_shift()
67 BUG_ON(shift > nr_entries); in node_shift()
68 BUG_ON((void *) key_ptr(n, shift) >= value_ptr(n, shift)); in node_shift()
70 key_ptr(n, shift), in node_shift()
71 (nr_entries - shift) * sizeof(__le64)); in node_shift()
73 value_ptr(n, shift), in node_shift()
74 (nr_entries - shift) * value_size); in node_shift()
76 BUG_ON(nr_entries + shift > le32_to_cpu(n->header.max_entries)); in node_shift()
[all …]
/linux/samples/bpf/
H A Dlwt_len_hist.bpf.c27 unsigned int shift; in log2() local
30 shift = (v > 0xFF) << 3; v >>= shift; r |= shift; in log2()
31 shift = (v > 0xF) << 2; v >>= shift; r |= shift; in log2()
32 shift = (v > 0x3) << 1; v >>= shift; r |= shift; in log2()
/linux/drivers/clk/sunxi-ng/
H A Dccu_mp.c13 static unsigned int next_div(unsigned int div, bool shift) in next_div() argument
15 if (shift) in next_div()
22 bool shift, in ccu_mp_find_best() argument
29 for (_p = 1; _p <= max_p; _p = next_div(_p, shift)) { in ccu_mp_find_best()
55 bool shift) in ccu_mp_find_best_with_parent_adj() argument
72 for (_p = 1; _p <= max_p; _p = next_div(_p, shift)) { in ccu_mp_find_best_with_parent_adj()
115 bool shift = true; in ccu_mp_round_rate() local
121 shift = false; in ccu_mp_round_rate()
124 if (shift) in ccu_mp_round_rate()
130 rate = ccu_mp_find_best(*parent_rate, rate, max_m, max_p, shift, in ccu_mp_round_rate()
[all …]
/linux/drivers/infiniband/core/
H A Dpacker.c71 int shift; in ib_pack() local
76 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
80 structure) << shift; in ib_pack()
84 mask = cpu_to_be32(((1ull << desc[i].size_bits) - 1) << shift); in ib_pack()
88 int shift; in ib_pack() local
93 shift = 64 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
97 structure) << shift; in ib_pack()
101 mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift); in ib_pack()
160 int shift; in ib_unpack() local
165 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_unpack()
[all …]
/linux/drivers/clk/at91/
H A Dclk-peripheral.c143 int shift = 0; in clk_sam9x5_peripheral_autodiv() local
154 for (; shift < PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_autodiv()
155 if (parent_rate >> shift <= periph->range.max) in clk_sam9x5_peripheral_autodiv()
161 periph->div = shift; in clk_sam9x5_peripheral_autodiv()
258 u32 shift, long *best_diff, in clk_sam9x5_peripheral_best_diff() argument
261 unsigned long tmp_rate = parent_rate >> shift; in clk_sam9x5_peripheral_best_diff()
281 u32 shift; in clk_sam9x5_peripheral_determine_rate() local
290 for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_determine_rate()
291 tmp_rate = parent_rate >> shift; in clk_sam9x5_peripheral_determine_rate()
297 shift, &best_diff, &best_rate); in clk_sam9x5_peripheral_determine_rate()
[all …]

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