89 	unsigned int *reg_num, unsigned int *shift)  in get_cmxucr_reg()  argument
95 	*shift = 16 - 8 * (ucc_num & 2);  in get_cmxucr_reg()
102 	unsigned int shift;  in ucc_mux_set_grant_tsa_bkpt()  local
108 	get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift);  in ucc_mux_set_grant_tsa_bkpt()
111 		qe_setbits_be32(cmxucr, mask << shift);  in ucc_mux_set_grant_tsa_bkpt()
113 		qe_clrbits_be32(cmxucr, mask << shift);  in ucc_mux_set_grant_tsa_bkpt()
124 	unsigned int shift;  in ucc_set_qe_mux_rxtx()  local
135 	get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift);  in ucc_set_qe_mux_rxtx()
208 		shift += 4;  in ucc_set_qe_mux_rxtx()
210 	qe_clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift,  in ucc_set_qe_mux_rxtx()
211 			   clock_bits << shift);  in ucc_set_qe_mux_rxtx()
506 	u32 shift;  in ucc_get_tdm_clk_shift()  local
508 	shift = (mode == COMM_DIR_RX) ? RX_CLK_SHIFT_BASE : TX_CLK_SHIFT_BASE;  in ucc_get_tdm_clk_shift()
510 		shift -= tdm_num * 4;  in ucc_get_tdm_clk_shift()
512 		shift -= (tdm_num - 4) * 4;  in ucc_get_tdm_clk_shift()
514 	return shift;  in ucc_get_tdm_clk_shift()
521 	u32 shift;  in ucc_set_tdm_rxtx_clk()  local
538 	shift = ucc_get_tdm_clk_shift(mode, tdm_num);  in ucc_set_tdm_rxtx_clk()
543 	qe_clrsetbits_be32(cmxs1cr, QE_CMXUCR_TX_CLK_SRC_MASK << shift,  in ucc_set_tdm_rxtx_clk()
544 			   clock_bits << shift);  in ucc_set_tdm_rxtx_clk()
623 	u32 shift;  in ucc_get_tdm_sync_shift()  local
625 	shift = (mode == COMM_DIR_RX) ? RX_SYNC_SHIFT_BASE : TX_SYNC_SHIFT_BASE;  in ucc_get_tdm_sync_shift()
626 	shift -= tdm_num * 2;  in ucc_get_tdm_sync_shift()
628 	return shift;  in ucc_get_tdm_sync_shift()
635 	u32 shift;  in ucc_set_tdm_rxtx_sync()  local
651 	shift = ucc_get_tdm_sync_shift(mode, tdm_num);  in ucc_set_tdm_rxtx_sync()
654 			   QE_CMXUCR_TX_CLK_SRC_MASK << shift,  in ucc_set_tdm_rxtx_sync()
655 			   source << shift);  in ucc_set_tdm_rxtx_sync()