| /linux/drivers/gpu/drm/vmwgfx/ |
| H A D | vmwgfx_shader.c | 45 struct vmw_shader shader; member
167 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_init() local
186 shader->size = size; in vmw_gb_shader_init()
187 shader->type = type; in vmw_gb_shader_init()
188 shader->num_input_sig = num_input_sig; in vmw_gb_shader_init()
189 shader->num_output_sig = num_output_sig; in vmw_gb_shader_init()
202 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_create() local
232 cmd->body.type = shader->type; in vmw_gb_shader_create()
233 cmd->body.sizeInBytes = shader->size; in vmw_gb_shader_create()
357 struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res); in vmw_dx_shader_commit_notify() local
[all …]
|
| H A D | vmwgfx_binding.h | 190 struct vmw_ctx_bindinfo_shader shader; member
|
| /linux/drivers/gpu/drm/vc4/ |
| H A D | vc4_validate_shaders.c | 34 * The shader validator walks over a shader's BO, ensuring that its
55 /* IP at the end of the BO, do not read shader[max_ip] */
58 uint64_t *shader; member
89 * stream, even if the shader didn't need to read uniforms in later
96 * a threaded shader, then the other shader running on our
189 uint64_t inst = validation_state->shader[validation_state->ip]; in check_tmu_write()
314 uint64_t inst = validation_state->shader[validation_state->ip]; in validate_uniform_address_write()
393 uint64_t inst = validation_state->shader[validation_stat in check_reg_write()
[all...] |
| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | mcp77.c | 203 const int shader = cstate->domain[nv_clk_src_shader]; in mcp77_clk_calc() local
239 if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) { in mcp77_clk_calc()
242 clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in mcp77_clk_calc()
244 out = calc_P((core << 1), shader, &divs); in mcp77_clk_calc()
246 if (abs(shader - out) <= in mcp77_clk_calc()
247 abs(shader - clock) && in mcp77_clk_calc()
|
| H A D | nv50.c | 375 const int shader = cstate->domain[nv_clk_src_shader]; in nv50_clk_calc() local
474 if (P1-- && shader == (core << 1)) { in nv50_clk_calc()
478 freq = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in nv50_clk_calc()
|
| H A D | base.c | 432 cstate->domain[nv_clk_src_shader] = perfE.shader; in nvkm_pstate_new()
|
| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| H A D | perf.c | 116 info->shader = nvbios_rd16(bios, perf + 0x06) * 1000; in nvbios_perfEp()
117 info->core = info->shader + (signed char) in nvbios_perfEp()
133 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp()
143 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp()
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc7180-el2.dtso | 10 /* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
|
| H A D | sc8280xp-el2.dtso | 10 /* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
|
| H A D | sc7180-acer-aspire1.dts | 34 gpu_mem: zap-shader@80840000 {
|
| H A D | agatti.dtsi | 1736 gpu_zap_shader: zap-shader {
|
| H A D | monaco.dtsi | 4965 gpu_zap_shader: zap-shader {
|
| H A D | hamoa.dtsi | 4068 gpu_zap_shader: zap-shader {
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8-ss-gpu0.dtsi | 21 clock-names = "core", "shader";
|
| H A D | imx8mq.dtsi | 1622 clock-names = "core", "shader", "bus", "reg";
|
| /linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| H A D | perf.h | 12 u32 shader; member
|
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_3_0_cleaner_shader.asm | 39 shader main label
|
| H A D | gfx_v10_1_10_cleaner_shader.asm | 38 shader main label
|
| H A D | gfx_v9_4_3_cleaner_shader.asm | 47 shader main label
|
| /linux/arch/arc/boot/dts/ |
| H A D | hsdk.dts | 323 clock-names = "bus", "reg", "core", "shader";
|
| /linux/arch/mips/boot/dts/ingenic/ |
| H A D | jz4770.dtsi | 393 clock-names = "bus", "core", "shader";
|
| /linux/Documentation/gpu/rfc/ |
| H A D | color_pipeline.rst | 26 transformations with no, or minimal CPU or shader load. The switch between HW
42 When fixed-function HW is not available the compositor will assemble a shader to
|
| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx8.asm | 152 shader main label
|
| H A D | cwsr_trap_handler_gfx9.asm | 205 shader main label
|
| H A D | cwsr_trap_handler_gfx10.asm | 205 shader main label
|