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/linux/Documentation/userspace-api/media/v4l/
H A Dsdr-formats.rst9 These formats are used for :ref:`SDR <sdr>` interface only.
15 pixfmt-sdr-cu08
16 pixfmt-sdr-cu16le
17 pixfmt-sdr-cs08
18 pixfmt-sdr-cs14le
19 pixfmt-sdr-ru12le
20 pixfmt-sdr-pcu16be
21 pixfmt-sdr-pcu18be
22 pixfmt-sdr-pcu20be
H A Ddevices.rst22 dev-sdr
H A Dpixfmt-sdr-cs08.rst3 .. _v4l2-sdr-fmt-cs8:
H A Dpixfmt-sdr-cu08.rst3 .. _v4l2-sdr-fmt-cu8:
H A Ddev-sdr.rst72 the struct :c:type:`v4l2_sdr_format` ``sdr`` member
95 formats in :ref:`sdr-formats`.
/linux/drivers/mtd/nand/raw/
H A Dnand_toshiba.c35 const struct nand_sdr_timings *sdr = in toshiba_nand_benand_read_eccstatus_op() local
39 PSEC_TO_NSEC(sdr->tADL_min)), in toshiba_nand_benand_read_eccstatus_op()
223 struct nand_sdr_timings *sdr = &iface->timings.sdr; in th58nvg2s3hbai4_choose_interface_config() local
229 sdr->tALS_min = 12000; in th58nvg2s3hbai4_choose_interface_config()
230 sdr->tCHZ_max = 20000; in th58nvg2s3hbai4_choose_interface_config()
231 sdr->tCLS_min = 12000; in th58nvg2s3hbai4_choose_interface_config()
232 sdr->tCOH_min = 0; in th58nvg2s3hbai4_choose_interface_config()
233 sdr->tDS_min = 12000; in th58nvg2s3hbai4_choose_interface_config()
234 sdr->tRHOH_min = 25000; in th58nvg2s3hbai4_choose_interface_config()
235 sdr->tRHW_min = 30000; in th58nvg2s3hbai4_choose_interface_config()
[all …]
H A Drenesas-nand-controller.c895 const struct nand_sdr_timings *sdr; in rnandc_setup_interface() local
898 sdr = nand_get_sdr_timings(conf); in rnandc_setup_interface()
899 if (IS_ERR(sdr)) in rnandc_setup_interface()
900 return PTR_ERR(sdr); in rnandc_setup_interface()
902 if (sdr->tRP_min != sdr->tWP_min || sdr->tREH_min != sdr->tWH_min) { in rnandc_setup_interface()
911 TIMINGS_ASYN_TRWP(TO_CYCLES64(sdr->tRP_min, period_ns)) | in rnandc_setup_interface()
912 TIMINGS_ASYN_TRWH(TO_CYCLES64(sdr->tREH_min, period_ns)); in rnandc_setup_interface()
914 TIM_SEQ0_TCCS(TO_CYCLES64(sdr->tCCS_min, period_ns)) | in rnandc_setup_interface()
915 TIM_SEQ0_TADL(TO_CYCLES64(sdr->tADL_min, period_ns)) | in rnandc_setup_interface()
916 TIM_SEQ0_TRHW(TO_CYCLES64(sdr->tRHW_min, period_ns)) | in rnandc_setup_interface()
[all …]
H A Dcadence-nand-controller.c2352 const struct nand_sdr_timings *sdr; in cadence_nand_setup_interface() local
2373 sdr = nand_get_sdr_timings(conf); in cadence_nand_setup_interface()
2374 if (IS_ERR(sdr)) in cadence_nand_setup_interface()
2375 return PTR_ERR(sdr); in cadence_nand_setup_interface()
2387 tdvw_min = sdr->tREA_max + board_delay_skew_max; in cadence_nand_setup_interface()
2397 if (sdr->tRC_min <= clk_period && in cadence_nand_setup_interface()
2398 sdr->tRP_min <= (clk_period / 2) && in cadence_nand_setup_interface()
2399 sdr->tREH_min <= (clk_period / 2)) { in cadence_nand_setup_interface()
2402 tdvw = calc_tdvw(trp_cnt, clk_period, sdr->tRHOH_min, in cadence_nand_setup_interface()
2403 sdr->tREA_max, ext_rd_mode); in cadence_nand_setup_interface()
[all …]
H A Dnand_timings.c27 .timings.sdr = {
72 .timings.sdr = {
117 .timings.sdr = {
162 .timings.sdr = {
207 .timings.sdr = {
252 .timings.sdr = {
568 onfi_timings = &onfi_sdr_timings[mode].timings.sdr; in onfi_find_closest_sdr_mode()
669 struct nand_sdr_timings *timings = &iface->timings.sdr; in onfi_fill_sdr_interface_config()
H A Dpl35x-nand-controller.c595 const struct nand_sdr_timings *sdr = in pl35x_nand_read_page_hwecc() local
631 ndelay(PSEC_TO_NSEC(sdr->tRR_min)); in pl35x_nand_read_page_hwecc()
790 const struct nand_sdr_timings *sdr; in pl35x_nfc_setup_interface() local
794 sdr = nand_get_sdr_timings(conf); in pl35x_nfc_setup_interface()
795 if (IS_ERR(sdr)) in pl35x_nfc_setup_interface()
796 return PTR_ERR(sdr); in pl35x_nfc_setup_interface()
815 val = TO_CYCLES(sdr->tRC_min, period_ns); in pl35x_nfc_setup_interface()
816 if (sdr->tRC_min <= 20000) in pl35x_nfc_setup_interface()
823 val = TO_CYCLES(sdr->tWC_min, period_ns); in pl35x_nfc_setup_interface()
834 val = TO_CYCLES(sdr->tWP_min, period_ns); in pl35x_nfc_setup_interface()
[all …]
H A Dams-delta.c198 const struct nand_sdr_timings *sdr = nand_get_sdr_timings(cf); in gpio_nand_setup_interface() local
201 if (IS_ERR(sdr)) in gpio_nand_setup_interface()
202 return PTR_ERR(sdr); in gpio_nand_setup_interface()
208 priv->tRP = DIV_ROUND_UP(sdr->tRP_min, 1000); in gpio_nand_setup_interface()
212 priv->tWP = DIV_ROUND_UP(sdr->tWP_min, 1000); in gpio_nand_setup_interface()
H A Dmxic_nand.c458 const struct nand_sdr_timings *sdr; in mxic_nfc_setup_interface() local
462 sdr = nand_get_sdr_timings(conf); in mxic_nfc_setup_interface()
463 if (IS_ERR(sdr)) in mxic_nfc_setup_interface()
464 return PTR_ERR(sdr); in mxic_nfc_setup_interface()
469 freq = NSEC_PER_SEC / (sdr->tRC_min / 1000); in mxic_nfc_setup_interface()
475 if (sdr->tRC_min < 30000) in mxic_nfc_setup_interface()
H A Dmarvell_nand.c1150 const struct nand_sdr_timings *sdr = in marvell_nfc_hw_ecc_hmg_do_write_page() local
1198 PSEC_TO_MSEC(sdr->tPROG_max)); in marvell_nfc_hw_ecc_hmg_do_write_page()
1630 const struct nand_sdr_timings *sdr = in marvell_nfc_hw_ecc_bch_write_page() local
1669 ret = marvell_nfc_wait_op(chip, PSEC_TO_MSEC(sdr->tPROG_max)); in marvell_nfc_hw_ecc_bch_write_page()
2392 const struct nand_sdr_timings *sdr; in marvell_nfc_setup_interface() local
2396 sdr = nand_get_sdr_timings(conf); in marvell_nfc_setup_interface()
2397 if (IS_ERR(sdr)) in marvell_nfc_setup_interface()
2398 return PTR_ERR(sdr); in marvell_nfc_setup_interface()
2414 nfc_tmg.tRP = TO_CYCLES(DIV_ROUND_UP(sdr->tRC_min, 2), period_ns) - 1; in marvell_nfc_setup_interface()
2416 nfc_tmg.tWP = TO_CYCLES(DIV_ROUND_UP(sdr->tWC_min, 2), period_ns) - 1; in marvell_nfc_setup_interface()
[all …]
H A Dnand_legacy.c358 const struct nand_sdr_timings *sdr = in nand_ccs_delay() local
372 if (!IS_ERR(sdr) && nand_controller_can_setup_interface(chip)) in nand_ccs_delay()
373 ndelay(sdr->tCCS_min / 1000); in nand_ccs_delay()
/linux/Documentation/devicetree/bindings/arm/altera/
H A Dsocfpga-sdram-edac.txt6 - altr,sdr-syscon : phandle of the sdr module
13 altr,sdr-syscon = <&sdr>;
/linux/arch/powerpc/boot/
H A D4xx.c471 unsigned int sdr; in eplike_fixup_uart_clk() local
476 sdr = SDR0_READ(DCRN_SDR0_UART0); in eplike_fixup_uart_clk()
479 sdr = SDR0_READ(DCRN_SDR0_UART1); in eplike_fixup_uart_clk()
482 sdr = SDR0_READ(DCRN_SDR0_UART2); in eplike_fixup_uart_clk()
485 sdr = SDR0_READ(DCRN_SDR0_UART3); in eplike_fixup_uart_clk()
491 if (sdr & 0x00800000u) in eplike_fixup_uart_clk()
494 clock = plb_clk / __fix_zero(sdr & 0xff, 256); in eplike_fixup_uart_clk()
/linux/drivers/mtd/nand/raw/atmel/
H A Dnand-controller.c1257 if (conf->timings.sdr.tRC_min < 30000) in atmel_smc_nand_prepare_smcconf()
1270 ncycles = DIV_ROUND_UP(conf->timings.sdr.tWP_min, mckperiodps); in atmel_smc_nand_prepare_smcconf()
1288 timeps = max3(conf->timings.sdr.tCLS_min, conf->timings.sdr.tCS_min, in atmel_smc_nand_prepare_smcconf()
1289 conf->timings.sdr.tALS_min); in atmel_smc_nand_prepare_smcconf()
1290 timeps = max(timeps, conf->timings.sdr.tDS_min); in atmel_smc_nand_prepare_smcconf()
1305 timeps = max3(conf->timings.sdr.tCLH_min, conf->timings.sdr.tCH_min, in atmel_smc_nand_prepare_smcconf()
1306 conf->timings.sdr.tALH_min); in atmel_smc_nand_prepare_smcconf()
1307 timeps = max3(timeps, conf->timings.sdr.tDH_min, in atmel_smc_nand_prepare_smcconf()
1308 conf->timings.sdr.tWH_min); in atmel_smc_nand_prepare_smcconf()
1319 ncycles = DIV_ROUND_UP(conf->timings.sdr.tWC_min, mckperiodps); in atmel_smc_nand_prepare_smcconf()
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5260-xyref5260.dts99 samsung,dw-mshc-sdr-timing = <0 4>;
111 samsung,dw-mshc-sdr-timing = <2 3>;
H A Dexynos5410-smdk5410.dts71 samsung,dw-mshc-sdr-timing = <2 3>;
81 samsung,dw-mshc-sdr-timing = <2 3>;
/linux/drivers/mtd/nand/raw/gpmi-nand/
H A Dgpmi-nand.c841 const struct nand_sdr_timings *sdr) in gpmi_nfc_compute_timings() argument
856 if (sdr->tRC_min >= 30000) { in gpmi_nfc_compute_timings()
861 } else if (sdr->tRC_min >= 25000) { in gpmi_nfc_compute_timings()
884 addr_setup_cycles = TO_CYCLES(sdr->tALS_min, period_ps); in gpmi_nfc_compute_timings()
885 data_setup_cycles = TO_CYCLES(sdr->tDS_min, period_ps); in gpmi_nfc_compute_timings()
886 data_hold_cycles = TO_CYCLES(sdr->tDH_min, period_ps); in gpmi_nfc_compute_timings()
887 busy_timeout_ps = max(sdr->tBERS_max, sdr->tPROG_max); in gpmi_nfc_compute_timings()
911 sample_delay_ps = (sdr->tREA_max + 4000 - tRP_ps) * 8; in gpmi_nfc_compute_timings()
977 const struct nand_sdr_timings *sdr; in gpmi_setup_interface() local
981 sdr = nand_get_sdr_timings(conf); in gpmi_setup_interface()
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/linux/arch/powerpc/boot/dts/
H A Dredwood.dts95 SDR0: sdr {
96 compatible = "ibm,sdr-460sx";
249 sdr-base = <0x300>;
290 sdr-base = <0x340>;
331 sdr-base = <0x370>;
H A Dkatmai.dts102 SDR0: sdr {
103 compatible = "ibm,sdr-440spe";
333 sdr-base = <0x300>;
374 sdr-base = <0x340>;
415 sdr-base = <0x370>;
/linux/drivers/media/v4l2-core/
H A Dv4l2-compat-ioctl32.c102 struct v4l2_sdr_format sdr; member
163 return copy_from_user(&p64->fmt.sdr, &p32->fmt.sdr, in get_v4l2_format32()
164 sizeof(p64->fmt.sdr)) ? -EFAULT : 0; in get_v4l2_format32()
213 return copy_to_user(&p32->fmt.sdr, &p64->fmt.sdr, in put_v4l2_format32()
214 sizeof(p64->fmt.sdr)) ? -EFAULT : 0; in put_v4l2_format32()
/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi576 sdr: sdr@f8011100 { label
577 compatible = "altr,sdr-ctl", "syscon";
594 altr,sdr-syscon = <&sdr>;
/linux/drivers/media/test-drivers/vivid/
H A DMakefile5 vivid-rds-gen.o vivid-sdr-cap.o vivid-vbi-cap.o vivid-vbi-out.o \

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