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Searched refs:sclk_mask (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c1728 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega12_get_profiling_clk_mask() argument
1735 *sclk_mask = 0; in vega12_get_profiling_clk_mask()
1742 *sclk_mask = VEGA12_UMD_PSTATE_GFXCLK_LEVEL; in vega12_get_profiling_clk_mask()
1748 *sclk_mask = 0; in vega12_get_profiling_clk_mask()
1752 *sclk_mask = gfx_dpm_table->count - 1; in vega12_get_profiling_clk_mask()
1782 uint32_t sclk_mask = 0; in vega12_dpm_force_dpm_level() local
1800 ret = vega12_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega12_dpm_force_dpm_level()
1803 vega12_force_clock_level(hwmgr, PP_SCLK, 1 << sclk_mask); in vega12_dpm_force_dpm_level()
H A Dvega20_hwmgr.c2535 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega20_get_profiling_clk_mask() argument
2542 *sclk_mask = 0; in vega20_get_profiling_clk_mask()
2549 *sclk_mask = VEGA20_UMD_PSTATE_GFXCLK_LEVEL; in vega20_get_profiling_clk_mask()
2555 *sclk_mask = 0; in vega20_get_profiling_clk_mask()
2559 *sclk_mask = gfx_dpm_table->count - 1; in vega20_get_profiling_clk_mask()
2735 uint32_t sclk_mask, mclk_mask, soc_mask; in vega20_dpm_force_dpm_level() local
2754 ret = vega20_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega20_dpm_force_dpm_level()
2757 vega20_force_clock_level(hwmgr, PP_SCLK, 1 << sclk_mask); in vega20_dpm_force_dpm_level()
H A Dsmu7_hwmgr.c3284 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) in smu7_get_profiling_clk() argument
3314 *sclk_mask = count; in smu7_get_profiling_clk()
3319 *sclk_mask = 0; in smu7_get_profiling_clk()
3322 *sclk_mask = hwmgr->dyn_state.vddc_dependency_on_sclk->count-1; in smu7_get_profiling_clk()
3329 *sclk_mask = count; in smu7_get_profiling_clk()
3334 *sclk_mask = 0; in smu7_get_profiling_clk()
3337 *sclk_mask = table_info->vdd_dep_on_sclk->count - 1; in smu7_get_profiling_clk()
3354 uint32_t sclk_mask = 0; in smu7_force_dpm_level() local
3372 ret = smu7_get_profiling_clk(hwmgr, level, &sclk_mask, &mclk_mask, &pcie_mask); in smu7_force_dpm_level()
3375 smu7_force_clock_level(hwmgr, PP_SCLK, 1<<sclk_mask); in smu7_force_dpm_level()