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Searched refs:samsung_pll_rate_table (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/clk/samsung/
H A Dclk-pll.c33 const struct samsung_pll_rate_table *rate_table;
38 static const struct samsung_pll_rate_table *samsung_get_pll_settings( in samsung_get_pll_settings()
41 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_get_pll_settings()
56 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_pll_round_rate()
238 const struct samsung_pll_rate_table *rate, u32 pll_con) in samsung_pll35xx_mp_change()
252 const struct samsung_pll_rate_table *rate; in samsung_pll35xx_set_rate()
346 const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1) in samsung_pll36xx_mpk_change()
363 const struct samsung_pll_rate_table *rate; in samsung_pll36xx_set_rate()
463 const struct samsung_pll_rate_table *rate; in samsung_pll0822x_set_rate()
557 const struct samsung_pll_rate_table *rate; in samsung_pll0831x_set_rate()
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H A Dclk-fsd.c148 static const struct samsung_pll_rate_table pll_shared0_rate_table[] __initconst = {
152 static const struct samsung_pll_rate_table pll_shared1_rate_table[] __initconst = {
156 static const struct samsung_pll_rate_table pll_shared2_rate_table[] __initconst = {
160 static const struct samsung_pll_rate_table pll_shared3_rate_table[] __initconst = {
1475 static const struct samsung_pll_rate_table pll_mfc_rate_table[] __initconst = {
1635 static const struct samsung_pll_rate_table pll_cam_csi_rate_table[] __initconst = {
H A Dclk-exynos4.c1075 static const struct samsung_pll_rate_table exynos4210_apll_rates[] __initconst = {
1088 static const struct samsung_pll_rate_table exynos4210_epll_rates[] __initconst = {
1099 static const struct samsung_pll_rate_table exynos4210_vpll_rates[] __initconst = {
1108 static const struct samsung_pll_rate_table exynos4x12_apll_rates[] __initconst = {
1128 static const struct samsung_pll_rate_table exynos4x12_epll_rates[] __initconst = {
1140 static const struct samsung_pll_rate_table exynos4x12_vpll_rates[] __initconst = {
H A Dclk-pll.h108 struct samsung_pll_rate_table { struct
H A Dclk-exynos5250.c691 static const struct samsung_pll_rate_table vpll_24mhz_tbl[] __initconst = {
700 static const struct samsung_pll_rate_table epll_24mhz_tbl[] __initconst = {
714 static const struct samsung_pll_rate_table apll_24mhz_tbl[] __initconst = {
H A Dclk-exynos3250.c674 static const struct samsung_pll_rate_table exynos3250_pll_rates[] __initconst = {
696 static const struct samsung_pll_rate_table exynos3250_epll_rates[] __initconst = {
715 static const struct samsung_pll_rate_table exynos3250_vpll_rates[] __initconst = {
H A Dclk-exynos5420.c1402 static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] __initconst = {
1424 static const struct samsung_pll_rate_table exynos5422_bpll_rate_table[] = {
1435 static const struct samsung_pll_rate_table exynos5420_epll_24mhz_tbl[] = {
1453 static const struct samsung_pll_rate_table exynos5420_vpll_24mhz_tbl[] = {
H A Dclk-exynos5410.c229 static const struct samsung_pll_rate_table exynos5410_pll2550x_24mhz_tbl[] __initconst = {
H A Dclk.h267 const struct samsung_pll_rate_table *rate_table;
H A Dclk-exynos5260.c37 static const struct samsung_pll_rate_table pll2550_24mhz_tbl[] __initconst = {
70 static const struct samsung_pll_rate_table pll2650_24mhz_tbl[] __initconst = {
H A Dclk-exynos7885.c731 static const struct samsung_pll_rate_table pll_usb_rate_table[] __initconst = {
H A Dclk-exynos7.c138 static const struct samsung_pll_rate_table pll1460x_24mhz_tbl[] __initconst = {
H A Dclk-exynos850.c1158 static const struct samsung_pll_rate_table cpu_pll_rates[] __initconst = {
H A Dclk-exynos5433.c737 static const struct samsung_pll_rate_table exynos5433_pll_rates[] __initconst = {
790 static const struct samsung_pll_rate_table exynos5433_aud_pll_rates[] __initconst = {
H A Dclk-gs101.c2147 static const struct samsung_pll_rate_table cmu_hsi0_usb_pll_rates[] __initconst = {