Home
last modified time | relevance | path

Searched refs:rx_reg (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/mailbox/
H A Dplatform_mhu.c37 void __iomem *rx_reg; member
53 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); in platform_mhu_rx_interrupt()
59 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); in platform_mhu_rx_interrupt()
141 mhu->mlink[i].rx_reg = mhu->base + platform_mhu_reg[i]; in platform_mhu_probe()
142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in platform_mhu_probe()
/linux/include/linux/
H A Dpch_dma.h21 dma_addr_t rx_reg; member
/linux/arch/mips/include/asm/txx9/
H A Ddmac.h41 u64 rx_reg; member
/linux/drivers/spi/
H A Dspi-omap2-mcspi.c709 void __iomem *rx_reg; in omap2_mcspi_txrx_pio() local
722 rx_reg = base + OMAP2_MCSPI_RX0; in omap2_mcspi_txrx_pio()
757 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
771 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
806 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
820 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
855 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
869 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
H A Dspi-topcliff-pch.c859 param->rx_reg = data->io_base_addr + PCH_SPDRR; in pch_spi_request_dma()
/linux/drivers/net/ethernet/intel/ice/
H A Dice_base.c855 u32 rx_reg; in ice_vsi_ctrl_one_rx_ring() local
857 rx_reg = rd32(hw, QRX_CTRL(pf_q)); in ice_vsi_ctrl_one_rx_ring()
860 if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M)) in ice_vsi_ctrl_one_rx_ring()
865 rx_reg |= QRX_CTRL_QENA_REQ_M; in ice_vsi_ctrl_one_rx_ring()
867 rx_reg &= ~QRX_CTRL_QENA_REQ_M; in ice_vsi_ctrl_one_rx_ring()
868 wr32(hw, QRX_CTRL(pf_q), rx_reg); in ice_vsi_ctrl_one_rx_ring()
H A Dice_lib.c2047 u32 rx_reg; in ice_vsi_is_rx_queue_active() local
2051 rx_reg = rd32(hw, QRX_CTRL(pf_q)); in ice_vsi_is_rx_queue_active()
2052 if (rx_reg & QRX_CTRL_QENA_STAT_M) in ice_vsi_is_rx_queue_active()
/linux/drivers/dma/
H A Dtxx9dmac.c845 desc->hwdesc.SAR = ds->rx_reg; in txx9dmac_prep_slave_sg()
854 desc->hwdesc32.SAR = ds->rx_reg; in txx9dmac_prep_slave_sg()
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg)) in txx9dmac_alloc_chan_resources()
H A Dpch_dma.c581 reg = pd_slave->rx_reg; in pd_prep_slave_sg()
/linux/drivers/net/phy/
H A Dmotorcomm.c886 u32 rx_reg, tx_reg; in ytphy_rgmii_clk_delay_config() local
890 rx_reg = ytphy_get_delay_reg_value(phydev, "rx-internal-delay-ps", in ytphy_rgmii_clk_delay_config()
903 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg); in ytphy_rgmii_clk_delay_config()
910 val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg) | in ytphy_rgmii_clk_delay_config()
/linux/drivers/net/ethernet/marvell/
H A Dsky2.c902 u32 rx_reg; in sky2_mac_init() local
986 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON; in sky2_mac_init()
989 rx_reg |= GMF_RX_OVER_ON; in sky2_mac_init()
991 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); in sky2_mac_init()
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c4793 u32 rx_reg; in i40e_pf_rxq_wait() local
4796 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); in i40e_pf_rxq_wait()
4797 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) in i40e_pf_rxq_wait()
4821 u32 rx_reg; in i40e_control_rx_q() local
4825 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); in i40e_control_rx_q()
4826 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == in i40e_control_rx_q()
4827 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) in i40e_control_rx_q()
4833 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) in i40e_control_rx_q()
4838 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; in i40e_control_rx_q()
4840 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; in i40e_control_rx_q()
[all …]
/linux/drivers/tty/serial/
H A Dpch_uart.c702 param->rx_reg = port->mapbase + UART_RX; in pch_request_dma()