| /linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | rtw8852b.c | 369 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, in rtw8852b_pwr_sps_dig_off() 371 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, in rtw8852b_pwr_sps_dig_off() 373 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, in rtw8852b_pwr_sps_dig_off() 375 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, in rtw8852b_pwr_sps_dig_off() 378 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, in rtw8852b_pwr_sps_dig_off() 380 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, in rtw8852b_pwr_sps_dig_off() 485 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VOL_L1_MASK, 0x9); in rtw8852b_pwr_on_func() 486 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VREFPFM_L_MASK, 0xA); in rtw8852b_pwr_on_func() 508 rtw89_write32_mask(rtwdev, R_AX_EECS_EESK_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_MASK, in rtw8852b_pwr_on_func() 576 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_REG_ZCDC_H_MASK, 0x3); in rtw8852b_pwr_off_func()
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| H A D | mac_be.c | 628 rtw89_write32_mask(rtwdev, R_BE_FW_AUTO_CAL_DELAY, B_BE_WCPU_FW_DELAY_COUNT_MASK, 0); in rtw89_mac_fwdl_preconfig_be() 689 rtw89_write32_mask(rtwdev, R_BE_WCPU_FW_CTRL, in wcpu_on() 1229 rtw89_write32_mask(rtwdev, reg, B_BE_PREBKF_TIME_MASK, in scheduler_init_be() 1233 rtw89_write32_mask(rtwdev, reg, B_BE_PREBKF_TIME_NONAC_MASK, in scheduler_init_be() 1238 rtw89_write32_mask(rtwdev, reg, B_BE_BCNQ_CW_MASK, 0x32); in scheduler_init_be() 1239 rtw89_write32_mask(rtwdev, reg, B_BE_BCNQ_AIFS_MASK, BCN_IFS_25US); in scheduler_init_be() 1411 rtw89_write32_mask(rtwdev, reg, B_BE_EHT_HE_PPDU_4XLTF_ZLD_USTIMER_MASK, 0x12); in tmac_init_be() 1412 rtw89_write32_mask(rtwdev, reg, B_BE_EHT_HE_PPDU_2XLTF_ZLD_USTIMER_MASK, 0xe); in tmac_init_be() 1481 rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data); in trxptcl_init_be() 1496 rtw89_write32_mask(rtwdev, reg, B_BE_RSC_MASK, 1); in trxptcl_init_be() [all …]
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| H A D | phy_be.c | 581 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_BY_RATE_DBW_ON, 0x3); in rtw89_phy_bb_wrap_tpu_set_all() 597 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_OFST_LMT_DB, 0); in rtw89_phy_bb_wrap_tpu_set_all() 599 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_OFST_LMTBF_DB, 0); in rtw89_phy_bb_wrap_tpu_set_all() 601 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_OFST_BYRATE_DB, 0); in rtw89_phy_bb_wrap_tpu_set_all() 603 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_OFST_RULMT_DB, 0); in rtw89_phy_bb_wrap_tpu_set_all() 605 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_OFST_SW_DB, 0); in rtw89_phy_bb_wrap_tpu_set_all() 619 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_LISTEN_PATH_EN, 0x2); in rtw89_phy_bb_wrap_listen_path_en_init() 628 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_LMT_ON, 0); in rtw89_phy_bb_wrap_force_cr_init() 630 rtw89_write32_mask(rtwdev, addr, B_BE_FORCE_PWR_BY_RATE_EN, 0); in rtw89_phy_bb_wrap_force_cr_init() 632 rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_RU_ENON, 0); in rtw89_phy_bb_wrap_force_cr_init() [all …]
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| H A D | pci_be.c | 67 rtw89_write32_mask(rtwdev, R_BE_PCIE_LAT_CTRL, B_BE_CLK_REQ_LAT_MASK, in rtw89_pci_clkreq_set_be() 186 rtw89_write32_mask(rtwdev, R_BE_HAXI_MST_WDT_TIMEOUT_SEL_V1, in rtw89_pci_ctrl_trxdma_pcie_be() 380 rtw89_write32_mask(rtwdev, R_BE_SER_PL1_CTRL, in rtw89_pci_ser_setting_be() 398 rtw89_write32_mask(rtwdev, R_BE_SER_PL1_CTRL, in rtw89_pci_ser_setting_be() 448 rtw89_write32_mask(rtwdev, R_BE_SER_PL1_CTRL, B_BE_PL1_TIMER_UNIT_MASK, in rtw89_pci_ser_setting_be() 621 rtw89_write32_mask(rtwdev, R_BE_PCIE_MIT0_TMR, in rtw89_pci_configure_mit_be()
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| H A D | mac.c | 391 rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, in rtw89_mac_dump_dmac_err_status() 393 rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, in rtw89_mac_dump_dmac_err_status() 395 rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, in rtw89_mac_dump_dmac_err_status() 398 rtw89_write32_mask(rtwdev, R_AX_SEC_ENG_CTRL, in rtw89_mac_dump_dmac_err_status() 1138 rtw89_write32_mask(rtwdev, regs->hci_fc_ctrl, in hfc_h2c_cfg_ax() 2356 rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_USEMAXSZ_MASK, max_preld_size); in preload_init_set_ax() 2362 rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_NXT_TXENDWIN_MASK, PRELD_NEXT_WND); in preload_init_set_ax() 2363 rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_NXT_RSVMINSZ_MASK, min_rsvd_size); in preload_init_set_ax() 2421 rtw89_write32_mask(rtwdev, R_AX_SS2FINFO_PATH, B_AX_SS_DEST_QUEUE_MASK, in _patch_ss2f_path() 2513 rtw89_write32_mask(rtwdev, R_AX_SEC_DEBUG1, in sec_eng_init_ax() [all …]
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| H A D | rtw8852bt.c | 311 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_OCP_L1_MASK, 7); in rtw8852bt_pwr_on_func() 389 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VOL_L1_MASK, 0x9); in rtw8852bt_pwr_on_func() 390 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VREFPFM_L_MASK, 0xA); in rtw8852bt_pwr_on_func() 406 rtw89_write32_mask(rtwdev, R_AX_EECS_EESK_FUNC_SEL, in rtw8852bt_pwr_on_func() 468 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_REG_ZCDC_H_MASK, 0x3); in rtw8852bt_pwr_off_func()
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| H A D | pci.c | 2849 rtw89_write32_mask(rtwdev, R_AX_PCIE_EXP_CTRL, in rtw89_pci_set_dbg() 2990 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, in rtw89_pci_mode_op() 2995 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_PCIE_MAX_TXDMA_MASK, tx_burst); in rtw89_pci_mode_op() 2996 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG1, B_AX_PCIE_MAX_RXDMA_MASK, rx_burst); in rtw89_pci_mode_op() 2998 rtw89_write32_mask(rtwdev, R_AX_HAXI_INIT_CFG1, B_AX_HAXI_MAX_TXDMA_MASK, tx_burst); in rtw89_pci_mode_op() 2999 rtw89_write32_mask(rtwdev, R_AX_HAXI_INIT_CFG1, B_AX_HAXI_MAX_RXDMA_MASK, rx_burst); in rtw89_pci_mode_op() 3014 rtw89_write32_mask(rtwdev, info->exp_ctrl_reg, info->max_tag_num_mask, in rtw89_pci_mode_op() 3018 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, B_AX_WD_ITVL_IDLE, in rtw89_pci_mode_op() 3020 rtw89_write32_mask(rtwdev, R_AX_PCIE_INIT_CFG2, B_AX_WD_ITVL_ACT, in rtw89_pci_mode_op() 3023 rtw89_write32_mask(rtwdev, R_AX_HAXI_INIT_CFG1, B_AX_WD_ITVL_IDLE_V1_MASK, in rtw89_pci_mode_op() [all …]
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| H A D | led.c | 25 rtw89_write32_mask(rtwdev, e->pinmux.addr, e->pinmux.mask, e->pinmux.data); in rtw89_led_gpio_config()
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| H A D | rtw8922d.c | 1259 rtw89_write32_mask(rtwdev, reg, B_BE_SIFS_MACTXEN_TB_T1_DOT05US_MASK, sifs); in rtw8922d_set_channel_mac() 1265 rtw89_write32_mask(rtwdev, reg, B_BE_AMPDU_MAX_TIME_MASK, tx_time); in rtw8922d_set_channel_mac() 2112 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, glbrst_mask[phy_idx], 0x0); in rtw8922d_bb_preinit() 2113 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, bbrst_mask[phy_idx], 0x0); in rtw8922d_bb_preinit() 2114 rtw89_write32_mask(rtwdev, R_BE_DMAC_SYS_CR32B, chip_top_bitmask[phy_idx], 0x74F9); in rtw8922d_bb_preinit() 2115 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, glbrst_mask[phy_idx], 0x1); in rtw8922d_bb_preinit() 2117 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, bbrst_mask[phy_idx], 0x1); in rtw8922d_bb_preinit() 2431 rtw89_write32_mask(rtwdev, reg0, B_BBWRAP_ELMSR_EN_BE4, 0); in rtw8922d_ctrl_mlo() 2432 rtw89_write32_mask(rtwdev, reg1, B_BBWRAP_ELMSR_EN_BE4, 0); in rtw8922d_ctrl_mlo() 2436 rtw89_write32_mask(rtwdev, reg0, B_BBWRAP_ELMSR_EN_BE4, 0); in rtw8922d_ctrl_mlo() [all …]
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| H A D | rtw8922a.c | 1126 rtw89_write32_mask(rtwdev, reg, B_BE_SIFS_MACTXEN_T1_MASK, 0x41); in rtw8922a_set_channel_mac() 1128 rtw89_write32_mask(rtwdev, reg, B_BE_SIFS_MACTXEN_TB_T1_MASK, 0x41); in rtw8922a_set_channel_mac() 1132 rtw89_write32_mask(rtwdev, reg, B_BE_SIFS_MACTXEN_T1_MASK, 0x3f); in rtw8922a_set_channel_mac() 1134 rtw89_write32_mask(rtwdev, reg, B_BE_SIFS_MACTXEN_TB_T1_MASK, 0x3e); in rtw8922a_set_channel_mac() 1809 rtw89_write32_mask(rtwdev, R_BE_DMAC_SYS_CR32B, dmac_sys_mask[phy_idx], 0x7FF9); in rtw8922a_bb_preinit() 1810 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, glbrst_mask[phy_idx], 0x0); in rtw8922a_bb_preinit() 1811 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, bbrst_mask[phy_idx], 0x0); in rtw8922a_bb_preinit() 1812 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, glbrst_mask[phy_idx], 0x1); in rtw8922a_bb_preinit() 1813 rtw89_write32_mask(rtwdev, R_BE_FEN_RST_ENABLE, mcu_bootrdy_mask[phy_idx], rdy); in rtw8922a_bb_preinit() 1814 rtw89_write32_mask(rtwdev, R_BE_MEM_PWR_CTRL, B_BE_MEM_BBMCU0_DS_V1, 0); in rtw8922a_bb_preinit() [all …]
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| H A D | rtw8852c.c | 344 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, in rtw8852c_pwr_on_func() 447 rtw89_write32_mask(rtwdev, R_AX_LED1_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_V1_MASK, in rtw8852c_pwr_on_func() 516 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, in rtw8852c_pwr_off_func() 1879 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_channel_bb() 1885 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_channel_bb() 2092 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_txpwr_ul_tb_offset() 2097 rtw89_write32_mask(rtwdev, reg, in rtw8852c_set_txpwr_ul_tb_offset() 3010 rtw89_write32_mask(rtwdev, R_AX_AFE_OFF_CTRL1, B_AX_S0_LDO_VSEL_F_MASK, 0x1); in rtw8852c_mac_enable_bb_rf() 3011 rtw89_write32_mask(rtwdev, R_AX_AFE_OFF_CTRL1, B_AX_S1_LDO_VSEL_F_MASK, 0x1); in rtw8852c_mac_enable_bb_rf()
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| H A D | mac.h | 1208 rtw89_write32_mask(rtwdev, addr, mask, data); in rtw89_write32_idx() 1257 rtw89_write32_mask(rtwdev, reg, mask, data); in rtw89_write32_port_mask() 1612 rtw89_write32_mask(rtwdev, cr, mask, val); in rtw89_mac_txpwr_write32_mask()
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| H A D | rtw8852b_common.c | 1400 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); in __rtw8852bx_set_txpwr_ul_tb_offset() 1404 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, pw_ofst); in __rtw8852bx_set_txpwr_ul_tb_offset() 2006 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_REG_ZCDC_H_MASK, 0x1); in __rtw8852bx_mac_enable_bb_rf()
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| H A D | debug.c | 1514 rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, in rtw89_debug_mac_dump_dmac_dbg() 1516 rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, in rtw89_debug_mac_dump_dmac_dbg() 1518 rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, in rtw89_debug_mac_dump_dmac_dbg() 1521 rtw89_write32_mask(rtwdev, R_AX_SEC_ENG_CTRL, in rtw89_debug_mac_dump_dmac_dbg() 2968 rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, in rtw89_debug_mac_dbg_port_sel() 2970 rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, in rtw89_debug_mac_dbg_port_sel() 3451 rtw89_write32_mask(rtwdev, info->sel_addr, in rtw89_debug_mac_dbg_port_dump()
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| H A D | phy.c | 1957 rtw89_write32_mask(rtwdev, addr, mask, val); in rtw89_phy_init_bb_afe() 1961 rtw89_write32_mask(rtwdev, addr, mask, val); in rtw89_phy_init_bb_afe() 4971 rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); in rtw89_phy_cfo_set_xcap_reg() 5063 rtw89_write32_mask(rtwdev, R_AX_PWR_UL_CTRL2, in rtw89_dcfo_comp_init() 5521 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_NORM_BW160, in rtw89_phy_ofdma_power_diff() 5525 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_NORM_BW160, in rtw89_phy_ofdma_power_diff() 5529 rtw89_write32_mask(rtwdev, reg, B_AX_PATH_COM1_NORM_1STS, in rtw89_phy_ofdma_power_diff() 5533 rtw89_write32_mask(rtwdev, reg, B_AX_PATH_COM2_RESP_1STS_PATH, in rtw89_phy_ofdma_power_diff() 8496 rtw89_write32_mask(rtwdev, reg, regs[i].mask, val); in rtw89_phy_tssi_ctrl_set_fast_mode_cfg() 8558 rtw89_write32_mask(rtwdev, reg, regs[i].mask, data[i]); in rtw89_phy_tssi_ctrl_set_bandedge_cfg() [all …]
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| H A D | rtw8851b.c | 512 rtw89_write32_mask(rtwdev, R_AX_EECS_EESK_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_MASK, in rtw8851b_pwr_on_func() 1964 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); in rtw8851b_set_txpwr_ul_tb_offset() 1968 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, pw_ofst); in rtw8851b_set_txpwr_ul_tb_offset()
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| H A D | rtw8852a.c | 1569 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, val_1t); in rtw8852a_set_txpwr_ul_tb_offset() 1572 rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, val_2t); in rtw8852a_set_txpwr_ul_tb_offset()
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| H A D | phy.h | 759 rtw89_write32_mask(rtwdev, addr + phy->cr_base, mask, data); in rtw89_phy_write32_mask()
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| H A D | rtw8851b_rfk.c | 3296 rtw89_write32_mask(rtwdev, R_AX_PWR_SWING_OTHER_CTRL0, in rtw8851b_by_rate_dpd()
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| H A D | core.h | 8224 rtw89_write32_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u32 data) in rtw89_write32_mask() function
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| H A D | fw.c | 1933 rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_SEL_0XC0_MASK, MAC_DBG_SEL); in rtw89_fw_prog_cnt_dump()
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