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Searched refs:rtw89_write32 (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw89/
H A Dpci_be.c117 rtw89_write32(rtwdev, R_BE_AON_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be()
118 rtw89_write32(rtwdev, R_BE_MDIO_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be()
119 rtw89_write32(rtwdev, R_BE_LA_MODE_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be()
120 rtw89_write32(rtwdev, R_BE_WDT_AR_TMR, val32); in rtw89_pci_set_io_rcy_be()
121 rtw89_write32(rtwdev, R_BE_WDT_AW_TMR, val32); in rtw89_pci_set_io_rcy_be()
122 rtw89_write32(rtwdev, R_BE_WDT_W_TMR, val32); in rtw89_pci_set_io_rcy_be()
123 rtw89_write32(rtwdev, R_BE_WDT_B_TMR, val32); in rtw89_pci_set_io_rcy_be()
124 rtw89_write32(rtwdev, R_BE_WDT_R_TMR, val32); in rtw89_pci_set_io_rcy_be()
129 rtw89_write32(rtwdev, R_BE_WLAN_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be()
130 rtw89_write32(rtwdev, R_BE_AXIDMA_WDT_TMR, val32); in rtw89_pci_set_io_rcy_be()
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H A Dmac_be.c159 rtw89_write32(rtwdev, R_BE_CH_PAGE_CTRL, val); in hfc_h2c_cfg_be()
174 rtw89_write32(rtwdev, R_BE_CH_PAGE_CTRL, val); in hfc_mix_cfg_be()
177 rtw89_write32(rtwdev, R_BE_PUB_PAGE_CTRL2, val); in hfc_mix_cfg_be()
187 rtw89_write32(rtwdev, R_BE_WP_PAGE_CTRL1, val); in hfc_mix_cfg_be()
199 rtw89_write32(rtwdev, R_BE_HCI_FC_CTRL, val); in hfc_mix_cfg_be()
213 rtw89_write32(rtwdev, R_BE_HCI_FC_CTRL, val); in hfc_func_en_be()
269 rtw89_write32(rtwdev, R_BE_WDE_PKTBUF_CFG, val); in dle_mix_cfg_be()
292 rtw89_write32(rtwdev, R_BE_PLE_PKTBUF_CFG, val); in dle_mix_cfg_be()
319 rtw89_write32(rtwdev, \
400 rtw89_write32(rtwdev, R_BE_HAXI_INIT_CFG1, val); in rtw89_mac_dmac_func_pre_en_be()
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H A Dmac.c48 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_write()
49 rtw89_write32(rtwdev, mac->indir_access_addr, val); in rtw89_mac_mem_write()
58 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_read()
96 rtw89_write32(rtwdev, R_AX_LTE_WDATA, val); in rtw89_mac_write_lte()
97 rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0xC00F0000 | offset); in rtw89_mac_write_lte()
112 rtw89_write32(rtwdev, R_AX_LTE_CTRL, 0x800F0000 | offset); in rtw89_mac_read_lte()
144 rtw89_write32(rtwdev, ctrl_reg, ctrl_data); in rtw89_mac_dle_dfi_cfg()
831 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); in rtw89_mac_get_err_status()
849 rtw89_write32(rtwdev, R_AX_HALT_C2H, 0); in rtw89_mac_get_err_status()
852 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); in rtw89_mac_get_err_status()
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H A Dpci.c782 rtw89_write32(rtwdev, R_AX_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs()
783 rtw89_write32(rtwdev, R_AX_PCIE_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs()
784 rtw89_write32(rtwdev, R_AX_PCIE_HISR10, isrs->isrs[1]); in rtw89_pci_recognize_intrs()
801 rtw89_write32(rtwdev, R_AX_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs_v1()
803 rtw89_write32(rtwdev, R_AX_HAXI_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs_v1()
805 rtw89_write32(rtwdev, R_AX_HISR1, isrs->isrs[1]); in rtw89_pci_recognize_intrs_v1()
821 rtw89_write32(rtwdev, R_BE_HISR0, isrs->halt_c2h_isrs); in rtw89_pci_recognize_intrs_v2()
823 rtw89_write32(rtwdev, R_BE_HAXI_HISR00, isrs->isrs[0]); in rtw89_pci_recognize_intrs_v2()
825 rtw89_write32(rtwdev, R_BE_PCIE_DMA_ISR, isrs->isrs[1]); in rtw89_pci_recognize_intrs_v2()
826 rtw89_write32(rtwdev, R_BE_PCIE_HISR, isrs->ind_isrs); in rtw89_pci_recognize_intrs_v2()
[all …]
H A Ddebug.c343 rtw89_write32(rtwdev, addr, (u32)val); in rtw89_debug_priv_write_reg_set()
1218 rtw89_write32(rtwdev, filter_model_addr, base_addr); in rtw89_debug_dump_mac_mem()
1340 rtw89_write32(rtwdev, __reg_ctrl, __ctrl); \ in rtw89_debug_mac_dump_dle_dbg()
2709 rtw89_write32(rtwdev, R_AX_SCH_DBG_SEL, val32); in rtw89_debug_mac_dbg_port_sel()
2716 rtw89_write32(rtwdev, R_AX_SCH_DBG_SEL_C1, val32); in rtw89_debug_mac_dbg_port_sel()
2724 rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL, val32); in rtw89_debug_mac_dbg_port_sel()
2729 rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); in rtw89_debug_mac_dbg_port_sel()
2733 rtw89_write32(rtwdev, R_AX_SYS_STATUS1, val32); in rtw89_debug_mac_dbg_port_sel()
2741 rtw89_write32(rtwdev, R_AX_DBGSEL_TRXPTCL_C1, val32); in rtw89_debug_mac_dbg_port_sel()
2746 rtw89_write32(rtwdev, R_AX_DBG_CTRL, val32); in rtw89_debug_mac_dbg_port_sel()
[all …]
H A Dphy_be.c540 rtw89_write32(rtwdev, flush_addr, val32); in rtw89_write_bb_wrap_flush()
543 rtw89_write32(rtwdev, addr, data); in rtw89_write_bb_wrap_flush()
585 rtw89_write32(rtwdev, t, 0); in rtw89_phy_bb_wrap_tpu_set_all()
589 rtw89_write32(rtwdev, t, 0); in rtw89_phy_bb_wrap_tpu_set_all()
593 rtw89_write32(rtwdev, t, 0); in rtw89_phy_bb_wrap_tpu_set_all()
648 rtw89_write32(rtwdev, addr, 0xE4E431); in rtw89_phy_bb_wrap_ftm_init()
699 rtw89_write32(rtwdev, reg, val[0]); in rtw89_phy_bb_wrap_set_rfsi_ct_opt()
702 rtw89_write32(rtwdev, reg, val[1]); in rtw89_phy_bb_wrap_set_rfsi_ct_opt()
1172 rtw89_write32(rtwdev, addr, 0x0201FE00); in rtw89_phy_bb_wrap_ul_pwr()
1174 rtw89_write32(rtwdev, addr, 0x00FFEC7E); in rtw89_phy_bb_wrap_ul_pwr()
H A Drtw8922a.c724 rtw89_write32(rtwdev, R_BE_WLLPS_CTRL, 0x0000A1B2); in rtw8922a_pwr_off_func()
736 rtw89_write32(rtwdev, R_BE_SYS_PW_CTRL, val32); in rtw8922a_pwr_off_func()
739 rtw89_write32(rtwdev, R_BE_UDM1, 0); in rtw8922a_pwr_off_func()
1101 rtw89_write32(rtwdev, sub_carr, txsb); in rtw8922a_set_channel_mac()
1917 rtw89_write32(rtwdev, reg, path_com_cr[i].data); in rtw8922a_ctrl_tx_path_tmac()
2874 rtw89_write32(rtwdev, R_BTC_COEX_WL_REQ_BE, wl_pri); in rtw8922a_btc_init_cfg()
2877 rtw89_write32(rtwdev, R_BE_BT_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8922a_btc_init_cfg()
2880 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_0, 0xda5a5a5a); in rtw8922a_btc_init_cfg()
2882 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_1, 0xda5a5a5a); in rtw8922a_btc_init_cfg()
2884 rtw89_write32(rtwdev, R_BTC_ZB_BREAK_TBL, 0xf0ffffff); in rtw8922a_btc_init_cfg()
[all …]
H A Drtw8852b_common.c474 rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); in __rtw8852bx_set_channel_mac()
478 rtw89_write32(rtwdev, sub_carr, txsc20); in __rtw8852bx_set_channel_mac()
482 rtw89_write32(rtwdev, sub_carr, 0); in __rtw8852bx_set_channel_mac()
1835 rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); in __rtw8852bx_btc_init_cfg()
2015 rtw89_write32(rtwdev, R_AX_AFE_OFF_CTRL1, val32); in __rtw8852bx_mac_enable_bb_rf()
H A Drtw8851b.c569 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8851b_pwr_off_func()
586 rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32); in rtw8851b_pwr_off_func()
951 rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); in rtw8851b_set_channel_mac()
955 rtw89_write32(rtwdev, sub_carr, txsc20); in rtw8851b_set_channel_mac()
959 rtw89_write32(rtwdev, sub_carr, 0); in rtw8851b_set_channel_mac()
2226 rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8851b_btc_init_cfg()
H A Drtw8852b.c571 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8852b_pwr_off_func()
584 rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32); in rtw8852b_pwr_off_func()
H A Drtw8852c.c510 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8852c_pwr_off_func()
525 rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32); in rtw8852c_pwr_off_func()
873 rtw89_write32(rtwdev, sub_carr, txsc); in rtw8852c_set_channel_mac()
2458 rtw89_write32(rtwdev, reg, 0); in rtw8852c_ctrl_tx_path_tmac()
2488 rtw89_write32(rtwdev, reg, path_com[i].data); in rtw8852c_ctrl_tx_path_tmac()
2730 rtw89_write32(rtwdev, R_AX_BT_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8852c_btc_init_cfg()
H A Drtw8852a.c900 rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); in rtw8852a_set_channel_mac()
904 rtw89_write32(rtwdev, sub_carr, txsc20); in rtw8852a_set_channel_mac()
908 rtw89_write32(rtwdev, sub_carr, 0); in rtw8852a_set_channel_mac()
1917 rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); in rtw8852a_btc_init_cfg()
H A Dphy.h717 rtw89_write32(rtwdev, addr + phy->cr_base, data); in rtw89_raw_phy_write32()
797 rtw89_write32(rtwdev, addr + RTW89_BBMCU_ADDR_OFFSET, data); in rtw89_bbmcu_write32()
H A Defuse_be.c91 rtw89_write32(rtwdev, R_BE_EFUSE_CTRL, efuse_ctl & ~B_BE_EF_RDY); in rtw89_dump_physical_efuse_map_ddv_be()
H A Dmac.h1246 rtw89_write32(rtwdev, reg, data); in rtw89_write32_port()
1598 rtw89_write32(rtwdev, cr, val); in rtw89_mac_txpwr_write32()
H A Drtw8922d.c526 rtw89_write32(rtwdev, R_BE_SYS_PW_CTRL, val32); in rtw8922d_pwr_on_func()
743 rtw89_write32(rtwdev, R_BE_WLLPS_CTRL, 0x00015002); in rtw8922d_pwr_off_func()
746 rtw89_write32(rtwdev, R_BE_UDM1, 0); in rtw8922d_pwr_off_func()
1224 rtw89_write32(rtwdev, sub_carr, txsb); in rtw8922d_set_channel_mac()
2184 rtw89_write32(rtwdev, reg, path_com_cr[i].data); in rtw8922d_ctrl_tx_path_tmac()
H A Drtw8852bt.c466 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); in rtw8852bt_pwr_off_func()
H A Dcore.h8125 static inline void rtw89_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data) in rtw89_write32() function
8154 rtw89_write32(rtwdev, addr, val | bit); in rtw89_write32_set()
8181 rtw89_write32(rtwdev, addr, val & ~bit); in rtw89_write32_clr()
8234 rtw89_write32(rtwdev, addr, set); in rtw89_write32_mask()
H A Dmac80211.c467 rtw89_write32(rtwdev, reg, val); in ____rtw89_conf_tx_mu_edca()
H A Dfw.c1804 rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); in rtw89_fw_download_hdr()
1805 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); in rtw89_fw_download_hdr()
1930 rtw89_write32(rtwdev, R_AX_DBG_CTRL, in rtw89_fw_prog_cnt_dump()
1974 rtw89_write32(rtwdev, R_BE_SECURE_BOOT_MALLOC_INFO, 0x20248000); in rtw89_fw_download_suit()
9201 rtw89_write32(rtwdev, h2c_reg[i], info->u.h2creg[i]); in rtw89_fw_write_h2c_reg()
H A Drtw8852b_rfk.c373 rtw89_write32(rtwdev, R_AX_PHYREG_SET, 0xf); in _afe_init()
H A Dcoex.c6615 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_0, zb_tbl0); in _update_zb_coex_tbl()
6616 rtw89_write32(rtwdev, R_BTC_ZB_COEX_TBL_1, zb_tbl1); in _update_zb_coex_tbl()