Home
last modified time | relevance | path

Searched refs:rtl8xxxu_write32 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A D8723b.c402 rtl8xxxu_write32(priv, REG_TX_AGC_A_CCK1_MCS32, val32); in rtl8723b_set_tx_power()
407 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32); in rtl8723b_set_tx_power()
413 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE18_06, ofdm); in rtl8723b_set_tx_power()
414 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE54_24, ofdm); in rtl8723b_set_tx_power()
423 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS03_MCS00, mcs); in rtl8723b_set_tx_power()
424 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS07_MCS04, mcs); in rtl8723b_set_tx_power()
498 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00); in rtl8723bu_init_phy_bb()
534 rtl8xxxu_write32(priv, REG_PAD_CTRL1, val32); in rtl8723bu_phy_init_antenna_selection()
538 rtl8xxxu_write32(priv, REG_GPIO_MUXCFG, val32); in rtl8723bu_phy_init_antenna_selection()
542 rtl8xxxu_write32(priv, REG_GPIO_MUXCFG, val32); in rtl8723bu_phy_init_antenna_selection()
[all …]
H A Dcore.c725 int rtl8xxxu_write32(struct rtl8xxxu_priv *priv, u16 addr, u32 val) in rtl8xxxu_write32() function
789 return rtl8xxxu_write32(priv, addr, val32); in rtl8xxxu_write32_set()
798 return rtl8xxxu_write32(priv, addr, val32); in rtl8xxxu_write32_clear()
810 return rtl8xxxu_write32(priv, addr, new); in rtl8xxxu_write32_mask()
882 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM2, hssia); in rtl8xxxu_read_rfreg()
886 rtl8xxxu_write32(priv, rtl8xxxu_rfregs[path].hssiparm2, val32); in rtl8xxxu_read_rfreg()
890 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM2, hssia); in rtl8xxxu_read_rfreg()
928 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_write_rfreg()
932 ret = rtl8xxxu_write32(priv, rtl8xxxu_rfregs[path].lssiparm, dataaddr); in rtl8xxxu_write_rfreg()
943 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8xxxu_write_rfreg()
[all …]