1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2022 Richtek Technology Corp.
4 *
5 * Authors: Alina Yu <alina_yu@richtek.com>
6 * ChiYuan Huang <cy_huang@richtek.com>
7 */
8
9 #include <linux/bits.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/kstrtox.h>
14 #include <linux/linear_range.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/of.h>
18 #include <linux/power_supply.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/driver.h>
21 #include <linux/sysfs.h>
22
23 #define RT9471_REG_OTGCFG 0x00
24 #define RT9471_REG_TOP 0x01
25 #define RT9471_REG_FUNC 0x02
26 #define RT9471_REG_IBUS 0x03
27 #define RT9471_REG_VBUS 0x04
28 #define RT9471_REG_PRECHG 0x05
29 #define RT9471_REG_VCHG 0x07
30 #define RT9471_REG_ICHG 0x08
31 #define RT9471_REG_CHGTMR 0x09
32 #define RT9471_REG_EOC 0x0A
33 #define RT9471_REG_INFO 0x0B
34 #define RT9471_REG_JEITA 0x0C
35 #define RT9471_REG_PUMP_EXP 0x0D
36 #define RT9471_REG_DPDMDET 0x0E
37 #define RT9471_REG_ICSTAT 0x0F
38 #define RT9471_REG_STAT0 0x10
39 #define RT9471_REG_STAT1 0x11
40 #define RT9471_REG_STAT2 0x12
41 #define RT9471_REG_IRQ0 0x20
42 #define RT9471_REG_MASK0 0x30
43
44 #define RT9471_OTGCV_MASK GENMASK(7, 6)
45 #define RT9471_OTGCC_MASK BIT(0)
46 #define RT9471_OTGEN_MASK BIT(1)
47 #define RT9471_CHGFAULT_MASK GENMASK(4, 1)
48
49 #define RT9471_NUM_IRQ_REGS 4
50 #define RT9471_OTGCV_MINUV 4850000
51 #define RT9471_OTGCV_STEPUV 150000
52 #define RT9471_NUM_VOTG 4
53 #define RT9471_VCHG_MAXUV 4700000
54 #define RT9471_ICHG_MAXUA 3150000
55
56 /* Device ID */
57 #define RT9470_DEVID 0x09
58 #define RT9470D_DEVID 0x0A
59 #define RT9471_DEVID 0x0D
60 #define RT9471D_DEVID 0x0E
61
62 /* IRQ number */
63 #define RT9471_IRQ_BC12_DONE 0
64 #define RT9471_IRQ_DETACH 1
65 #define RT9471_IRQ_RECHG 2
66 #define RT9471_IRQ_CHG_DONE 3
67 #define RT9471_IRQ_BG_CHG 4
68 #define RT9471_IRQ_IE0C 5
69 #define RT9471_IRQ_CHG_RDY 6
70 #define RT9471_IRQ_VBUS_GD 7
71 #define RT9471_IRQ_CHG_BATOV 9
72 #define RT9471_IRQ_CHG_SYSOV 10
73 #define RT9471_IRQ_CHG_TOUT 11
74 #define RT9471_IRQ_CHG_BUSUV 12
75 #define RT9471_IRQ_CHG_THREG 13
76 #define RT9471_IRQ_CHG_AICR 14
77 #define RT9471_IRQ_CHG_MIVR 15
78 #define RT9471_IRQ_SYS_SHORT 16
79 #define RT9471_IRQ_SYS_MIN 17
80 #define RT9471_IRQ_AICC_DONE 18
81 #define RT9471_IRQ_PE_DONE 19
82 #define RT9471_IRQ_JEITA_COLD 20
83 #define RT9471_IRQ_JEITA_COOL 21
84 #define RT9471_IRQ_JEITA_WARM 22
85 #define RT9471_IRQ_JEITA_HOT 23
86 #define RT9471_IRQ_OTG_FAULT 24
87 #define RT9471_IRQ_OTG_LBP 25
88 #define RT9471_IRQ_OTG_CC 26
89 #define RT9471_IRQ_WDT 29
90 #define RT9471_IRQ_VAC_OV 30
91 #define RT9471_IRQ_OTP 31
92
93 enum rt9471_fields {
94 F_WDT = 0,
95 F_WDT_RST,
96 F_CHG_EN,
97 F_HZ,
98 F_BATFET_DIS,
99 F_AICR,
100 F_AICC_EN,
101 F_MIVR,
102 F_IPRE_CHG,
103 F_VPRE_CHG,
104 F_VBAT_REG,
105 F_ICHG_REG,
106 F_EOC_RST,
107 F_TE,
108 F_IEOC_CHG,
109 F_DEVICE_ID,
110 F_REG_RST,
111 F_BC12_EN,
112 F_IC_STAT,
113 F_PORT_STAT,
114 F_ST_CHG_DONE,
115 F_ST_CHG_RDY,
116 F_ST_VBUS_GD,
117 F_MAX_FIELDS
118 };
119
120 enum rt9471_ranges {
121 RT9471_RANGE_AICR = 0,
122 RT9471_RANGE_MIVR,
123 RT9471_RANGE_IPRE,
124 RT9471_RANGE_VCHG,
125 RT9471_RANGE_ICHG,
126 RT9471_RANGE_IEOC,
127 RT9471_MAX_RANGES
128 };
129
130 enum {
131 RT9471_PORTSTAT_APPLE_10W = 8,
132 RT9471_PORTSTAT_SAMSUNG_10W,
133 RT9471_PORTSTAT_APPLE_5W,
134 RT9471_PORTSTAT_APPLE_12W,
135 RT9471_PORTSTAT_NSTD,
136 RT9471_PORTSTAT_SDP,
137 RT9471_PORTSTAT_CDP,
138 RT9471_PORTSTAT_DCP,
139 };
140
141 enum {
142 RT9471_ICSTAT_SLEEP = 0,
143 RT9471_ICSTAT_VBUSRDY,
144 RT9471_ICSTAT_TRICKLECHG,
145 RT9471_ICSTAT_PRECHG,
146 RT9471_ICSTAT_FASTCHG,
147 RT9471_ICSTAT_IEOC,
148 RT9471_ICSTAT_BGCHG,
149 RT9471_ICSTAT_CHGDONE,
150 RT9471_ICSTAT_CHGFAULT,
151 RT9471_ICSTAT_OTG = 15,
152 };
153
154 struct rt9471_chip {
155 struct device *dev;
156 struct regmap *regmap;
157 struct regmap_field *rm_fields[F_MAX_FIELDS];
158 struct regmap_irq_chip_data *irq_chip_data;
159 struct regulator_dev *otg_rdev;
160 struct power_supply *psy;
161 struct power_supply_desc psy_desc;
162 struct mutex var_lock;
163 enum power_supply_usb_type psy_usb_type;
164 int psy_usb_curr;
165 };
166
167 static const struct reg_field rt9471_reg_fields[F_MAX_FIELDS] = {
168 [F_WDT] = REG_FIELD(RT9471_REG_TOP, 0, 1),
169 [F_WDT_RST] = REG_FIELD(RT9471_REG_TOP, 2, 2),
170 [F_CHG_EN] = REG_FIELD(RT9471_REG_FUNC, 0, 0),
171 [F_HZ] = REG_FIELD(RT9471_REG_FUNC, 5, 5),
172 [F_BATFET_DIS] = REG_FIELD(RT9471_REG_FUNC, 7, 7),
173 [F_AICR] = REG_FIELD(RT9471_REG_IBUS, 0, 5),
174 [F_AICC_EN] = REG_FIELD(RT9471_REG_IBUS, 7, 7),
175 [F_MIVR] = REG_FIELD(RT9471_REG_VBUS, 0, 3),
176 [F_IPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 0, 3),
177 [F_VPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 4, 6),
178 [F_VBAT_REG] = REG_FIELD(RT9471_REG_VCHG, 0, 6),
179 [F_ICHG_REG] = REG_FIELD(RT9471_REG_ICHG, 0, 5),
180 [F_EOC_RST] = REG_FIELD(RT9471_REG_EOC, 0, 0),
181 [F_TE] = REG_FIELD(RT9471_REG_EOC, 1, 1),
182 [F_IEOC_CHG] = REG_FIELD(RT9471_REG_EOC, 4, 7),
183 [F_DEVICE_ID] = REG_FIELD(RT9471_REG_INFO, 3, 6),
184 [F_REG_RST] = REG_FIELD(RT9471_REG_INFO, 7, 7),
185 [F_BC12_EN] = REG_FIELD(RT9471_REG_DPDMDET, 7, 7),
186 [F_IC_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 0, 3),
187 [F_PORT_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 4, 7),
188 [F_ST_CHG_DONE] = REG_FIELD(RT9471_REG_STAT0, 3, 3),
189 [F_ST_CHG_RDY] = REG_FIELD(RT9471_REG_STAT0, 6, 6),
190 [F_ST_VBUS_GD] = REG_FIELD(RT9471_REG_STAT0, 7, 7),
191 };
192
193 static const struct linear_range rt9471_chg_ranges[RT9471_MAX_RANGES] = {
194 [RT9471_RANGE_AICR] = LINEAR_RANGE(50000, 1, 63, 50000),
195 [RT9471_RANGE_MIVR] = LINEAR_RANGE(3900000, 0, 15, 100000),
196 [RT9471_RANGE_IPRE] = LINEAR_RANGE(50000, 0, 15, 50000),
197 [RT9471_RANGE_VCHG] = LINEAR_RANGE(3900000, 0, 80, 10000),
198 [RT9471_RANGE_ICHG] = LINEAR_RANGE(0, 0, 63, 50000),
199 [RT9471_RANGE_IEOC] = LINEAR_RANGE(50000, 0, 15, 50000),
200 };
201
rt9471_set_value_by_field_range(struct rt9471_chip * chip,enum rt9471_fields field,enum rt9471_ranges range,int val)202 static int rt9471_set_value_by_field_range(struct rt9471_chip *chip,
203 enum rt9471_fields field,
204 enum rt9471_ranges range, int val)
205 {
206 unsigned int sel;
207
208 if (val < 0)
209 return -EINVAL;
210
211 linear_range_get_selector_within(rt9471_chg_ranges + range, val, &sel);
212
213 return regmap_field_write(chip->rm_fields[field], sel);
214 }
215
216
rt9471_get_value_by_field_range(struct rt9471_chip * chip,enum rt9471_fields field,enum rt9471_ranges range,int * val)217 static int rt9471_get_value_by_field_range(struct rt9471_chip *chip,
218 enum rt9471_fields field,
219 enum rt9471_ranges range, int *val)
220 {
221 unsigned int sel, rvalue;
222 int ret;
223
224 ret = regmap_field_read(chip->rm_fields[field], &sel);
225 if (ret)
226 return ret;
227
228 ret = linear_range_get_value(rt9471_chg_ranges + range, sel, &rvalue);
229 if (ret)
230 return ret;
231
232 *val = rvalue;
233 return 0;
234 }
235
rt9471_set_ieoc(struct rt9471_chip * chip,int microamp)236 static int rt9471_set_ieoc(struct rt9471_chip *chip, int microamp)
237 {
238 int ret;
239
240 if (microamp == 0)
241 return regmap_field_write(chip->rm_fields[F_TE], 0);
242
243 ret = rt9471_set_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp);
244 if (ret)
245 return ret;
246
247 /* After applying the new IEOC value, enable charge termination */
248 return regmap_field_write(chip->rm_fields[F_TE], 1);
249 }
250
rt9471_get_ieoc(struct rt9471_chip * chip,int * microamp)251 static int rt9471_get_ieoc(struct rt9471_chip *chip, int *microamp)
252 {
253 unsigned int chg_term_enable;
254 int ret;
255
256 ret = regmap_field_read(chip->rm_fields[F_TE], &chg_term_enable);
257 if (ret)
258 return ret;
259
260 if (!chg_term_enable) {
261 *microamp = 0;
262 return 0;
263 }
264
265 return rt9471_get_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp);
266 }
267
rt9471_get_status(struct rt9471_chip * chip,int * status)268 static int rt9471_get_status(struct rt9471_chip *chip, int *status)
269 {
270 unsigned int ic_stat;
271 int ret;
272
273 ret = regmap_field_read(chip->rm_fields[F_IC_STAT], &ic_stat);
274 if (ret)
275 return ret;
276
277 switch (ic_stat) {
278 case RT9471_ICSTAT_VBUSRDY:
279 case RT9471_ICSTAT_CHGFAULT:
280 *status = POWER_SUPPLY_STATUS_NOT_CHARGING;
281 break;
282 case RT9471_ICSTAT_TRICKLECHG ... RT9471_ICSTAT_BGCHG:
283 *status = POWER_SUPPLY_STATUS_CHARGING;
284 break;
285 case RT9471_ICSTAT_CHGDONE:
286 *status = POWER_SUPPLY_STATUS_FULL;
287 break;
288 case RT9471_ICSTAT_SLEEP:
289 case RT9471_ICSTAT_OTG:
290 *status = POWER_SUPPLY_STATUS_DISCHARGING;
291 break;
292 default:
293 *status = POWER_SUPPLY_STATUS_UNKNOWN;
294 break;
295 }
296
297 return 0;
298 }
299
rt9471_get_vbus_good(struct rt9471_chip * chip,int * stat)300 static int rt9471_get_vbus_good(struct rt9471_chip *chip, int *stat)
301 {
302 unsigned int vbus_gd;
303 int ret;
304
305 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd);
306 if (ret)
307 return ret;
308
309 *stat = vbus_gd;
310 return 0;
311 }
312
rt9471_get_usb_type(struct rt9471_chip * chip,int * usb_type)313 static int rt9471_get_usb_type(struct rt9471_chip *chip, int *usb_type)
314 {
315 mutex_lock(&chip->var_lock);
316 *usb_type = chip->psy_usb_type;
317 mutex_unlock(&chip->var_lock);
318
319 return 0;
320 }
321
rt9471_get_usb_type_current(struct rt9471_chip * chip,int * microamp)322 static int rt9471_get_usb_type_current(struct rt9471_chip *chip,
323 int *microamp)
324 {
325 mutex_lock(&chip->var_lock);
326 *microamp = chip->psy_usb_curr;
327 mutex_unlock(&chip->var_lock);
328
329 return 0;
330 }
331
332 static enum power_supply_property rt9471_charger_properties[] = {
333 POWER_SUPPLY_PROP_STATUS,
334 POWER_SUPPLY_PROP_ONLINE,
335 POWER_SUPPLY_PROP_CURRENT_MAX,
336 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
337 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
338 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
339 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
340 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
341 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
342 POWER_SUPPLY_PROP_USB_TYPE,
343 POWER_SUPPLY_PROP_PRECHARGE_CURRENT,
344 POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
345 POWER_SUPPLY_PROP_MODEL_NAME,
346 POWER_SUPPLY_PROP_MANUFACTURER,
347 };
348
rt9471_charger_property_is_writeable(struct power_supply * psy,enum power_supply_property psp)349 static int rt9471_charger_property_is_writeable(struct power_supply *psy,
350 enum power_supply_property psp)
351 {
352 switch (psp) {
353 case POWER_SUPPLY_PROP_STATUS:
354 case POWER_SUPPLY_PROP_ONLINE:
355 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
356 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
357 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
358 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
359 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
360 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
361 return 1;
362 default:
363 return 0;
364 }
365 }
366
rt9471_charger_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)367 static int rt9471_charger_set_property(struct power_supply *psy,
368 enum power_supply_property psp,
369 const union power_supply_propval *val)
370 {
371 struct rt9471_chip *chip = power_supply_get_drvdata(psy);
372
373 switch (psp) {
374 case POWER_SUPPLY_PROP_STATUS:
375 return regmap_field_write(chip->rm_fields[F_CHG_EN],
376 !!val->intval);
377 case POWER_SUPPLY_PROP_ONLINE:
378 return regmap_field_write(chip->rm_fields[F_HZ], !val->intval);
379 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
380 return rt9471_set_value_by_field_range(
381 chip, F_ICHG_REG, RT9471_RANGE_ICHG, val->intval);
382 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
383 return rt9471_set_value_by_field_range(
384 chip, F_VBAT_REG, RT9471_RANGE_VCHG, val->intval);
385 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
386 return rt9471_set_value_by_field_range(
387 chip, F_AICR, RT9471_RANGE_AICR, val->intval);
388 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
389 return rt9471_set_value_by_field_range(
390 chip, F_MIVR, RT9471_RANGE_MIVR, val->intval);
391 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
392 return rt9471_set_value_by_field_range(
393 chip, F_IPRE_CHG, RT9471_RANGE_IPRE, val->intval);
394 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
395 return rt9471_set_ieoc(chip, val->intval);
396 default:
397 return -EINVAL;
398 }
399 }
400
401 static const char * const rt9471_manufacturer = "Richtek Technology Corp.";
402 static const char * const rt9471_model = "RT9471";
403
rt9471_charger_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)404 static int rt9471_charger_get_property(struct power_supply *psy,
405 enum power_supply_property psp,
406 union power_supply_propval *val)
407 {
408 struct rt9471_chip *chip = power_supply_get_drvdata(psy);
409
410 switch (psp) {
411 case POWER_SUPPLY_PROP_STATUS:
412 return rt9471_get_status(chip, &val->intval);
413 case POWER_SUPPLY_PROP_ONLINE:
414 return rt9471_get_vbus_good(chip, &val->intval);
415 case POWER_SUPPLY_PROP_CURRENT_MAX:
416 return rt9471_get_usb_type_current(chip, &val->intval);
417 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
418 return rt9471_get_value_by_field_range(
419 chip, F_ICHG_REG, RT9471_RANGE_ICHG, &val->intval);
420 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
421 val->intval = RT9471_ICHG_MAXUA;
422 return 0;
423 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
424 return rt9471_get_value_by_field_range(
425 chip, F_VBAT_REG, RT9471_RANGE_VCHG, &val->intval);
426 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
427 val->intval = RT9471_VCHG_MAXUV;
428 return 0;
429 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
430 return rt9471_get_value_by_field_range(
431 chip, F_AICR, RT9471_RANGE_AICR, &val->intval);
432 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
433 return rt9471_get_value_by_field_range(
434 chip, F_MIVR, RT9471_RANGE_MIVR, &val->intval);
435 case POWER_SUPPLY_PROP_USB_TYPE:
436 return rt9471_get_usb_type(chip, &val->intval);
437 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
438 return rt9471_get_value_by_field_range(
439 chip, F_IPRE_CHG, RT9471_RANGE_IPRE, &val->intval);
440 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
441 return rt9471_get_ieoc(chip, &val->intval);
442 case POWER_SUPPLY_PROP_MODEL_NAME:
443 val->strval = rt9471_model;
444 return 0;
445 case POWER_SUPPLY_PROP_MANUFACTURER:
446 val->strval = rt9471_manufacturer;
447 return 0;
448 default:
449 return -ENODATA;
450 }
451 }
452
rt9471_vbus_gd_handler(int irqno,void * devid)453 static irqreturn_t rt9471_vbus_gd_handler(int irqno, void *devid)
454 {
455 struct rt9471_chip *chip = devid;
456
457 power_supply_changed(chip->psy);
458
459 return IRQ_HANDLED;
460 }
461
rt9471_detach_handler(int irqno,void * devid)462 static irqreturn_t rt9471_detach_handler(int irqno, void *devid)
463 {
464 struct rt9471_chip *chip = devid;
465 unsigned int vbus_gd;
466 int ret;
467
468 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd);
469 if (ret)
470 return IRQ_NONE;
471
472 /* Only focus on really detached */
473 if (vbus_gd)
474 return IRQ_HANDLED;
475
476 mutex_lock(&chip->var_lock);
477 chip->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
478 chip->psy_usb_curr = 0;
479 mutex_unlock(&chip->var_lock);
480
481 power_supply_changed(chip->psy);
482
483 return IRQ_HANDLED;
484 }
485
rt9471_bc12_done_handler(int irqno,void * devid)486 static irqreturn_t rt9471_bc12_done_handler(int irqno, void *devid)
487 {
488 struct rt9471_chip *chip = devid;
489 enum power_supply_usb_type usb_type;
490 unsigned int port_stat;
491 int usb_curr, ret;
492
493 ret = regmap_field_read(chip->rm_fields[F_PORT_STAT], &port_stat);
494 if (ret)
495 return IRQ_NONE;
496
497 switch (port_stat) {
498 case RT9471_PORTSTAT_APPLE_10W:
499 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID;
500 usb_curr = 2000000;
501 break;
502 case RT9471_PORTSTAT_APPLE_5W:
503 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID;
504 usb_curr = 1000000;
505 break;
506 case RT9471_PORTSTAT_APPLE_12W:
507 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID;
508 usb_curr = 2400000;
509 break;
510 case RT9471_PORTSTAT_SAMSUNG_10W:
511 usb_type = POWER_SUPPLY_USB_TYPE_DCP;
512 usb_curr = 2000000;
513 break;
514 case RT9471_PORTSTAT_DCP:
515 usb_type = POWER_SUPPLY_USB_TYPE_DCP;
516 usb_curr = 1500000;
517 break;
518 case RT9471_PORTSTAT_NSTD:
519 case RT9471_PORTSTAT_SDP:
520 usb_type = POWER_SUPPLY_USB_TYPE_SDP;
521 usb_curr = 500000;
522 break;
523 case RT9471_PORTSTAT_CDP:
524 usb_type = POWER_SUPPLY_USB_TYPE_CDP;
525 usb_curr = 1500000;
526 break;
527 default:
528 usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
529 usb_curr = 0;
530 break;
531 }
532
533 mutex_lock(&chip->var_lock);
534 chip->psy_usb_type = usb_type;
535 chip->psy_usb_curr = usb_curr;
536 mutex_unlock(&chip->var_lock);
537
538 power_supply_changed(chip->psy);
539
540 return IRQ_HANDLED;
541 }
542
rt9471_wdt_handler(int irqno,void * devid)543 static irqreturn_t rt9471_wdt_handler(int irqno, void *devid)
544 {
545 struct rt9471_chip *chip = devid;
546 int ret;
547
548 ret = regmap_field_write(chip->rm_fields[F_WDT_RST], 1);
549
550 return ret ? IRQ_NONE : IRQ_HANDLED;
551 }
552
rt9471_otg_fault_handler(int irqno,void * devid)553 static irqreturn_t rt9471_otg_fault_handler(int irqno, void *devid)
554 {
555 struct rt9471_chip *chip = devid;
556
557 regulator_notifier_call_chain(chip->otg_rdev, REGULATOR_EVENT_FAIL, NULL);
558
559 return IRQ_HANDLED;
560 }
561
562 #define RT9471_IRQ_DESC(_name, _hwirq) \
563 { \
564 .name = #_name, \
565 .hwirq = _hwirq, \
566 .handler = rt9471_##_name##_handler, \
567 }
568
rt9471_register_interrupts(struct rt9471_chip * chip)569 static int rt9471_register_interrupts(struct rt9471_chip *chip)
570 {
571 struct device *dev = chip->dev;
572 static const struct {
573 char *name;
574 int hwirq;
575 irq_handler_t handler;
576 } chg_irqs[] = {
577 RT9471_IRQ_DESC(vbus_gd, RT9471_IRQ_VBUS_GD),
578 RT9471_IRQ_DESC(detach, RT9471_IRQ_DETACH),
579 RT9471_IRQ_DESC(bc12_done, RT9471_IRQ_BC12_DONE),
580 RT9471_IRQ_DESC(wdt, RT9471_IRQ_WDT),
581 RT9471_IRQ_DESC(otg_fault, RT9471_IRQ_OTG_FAULT),
582 }, *curr;
583 int i, virq, ret;
584
585 for (i = 0; i < ARRAY_SIZE(chg_irqs); i++) {
586 curr = chg_irqs + i;
587
588 virq = regmap_irq_get_virq(chip->irq_chip_data, curr->hwirq);
589 if (virq <= 0)
590 return virq;
591
592 ret = devm_request_threaded_irq(dev, virq, NULL, curr->handler,
593 IRQF_ONESHOT, curr->name, chip);
594 if (ret)
595 return ret;
596 }
597
598 return 0;
599 }
600
601 static const struct regulator_ops rt9471_otg_ops = {
602 .enable = regulator_enable_regmap,
603 .disable = regulator_disable_regmap,
604 .is_enabled = regulator_is_enabled_regmap,
605 .list_voltage = regulator_list_voltage_linear,
606 .get_voltage_sel = regulator_get_voltage_sel_regmap,
607 .set_voltage_sel = regulator_set_voltage_sel_regmap,
608 .set_current_limit = regulator_set_current_limit_regmap,
609 .get_current_limit = regulator_get_current_limit_regmap,
610 };
611
612 static const unsigned int rt9471_otg_microamp[] = { 500000, 1200000, };
613
614 static const struct regulator_desc rt9471_otg_rdesc = {
615 .of_match = of_match_ptr("usb-otg-vbus-regulator"),
616 .name = "rt9471-otg-vbus",
617 .owner = THIS_MODULE,
618 .type = REGULATOR_VOLTAGE,
619 .ops = &rt9471_otg_ops,
620 .min_uV = RT9471_OTGCV_MINUV,
621 .uV_step = RT9471_OTGCV_STEPUV,
622 .n_voltages = RT9471_NUM_VOTG,
623 .curr_table = rt9471_otg_microamp,
624 .n_current_limits = ARRAY_SIZE(rt9471_otg_microamp),
625 .enable_mask = RT9471_OTGEN_MASK,
626 .enable_reg = RT9471_REG_FUNC,
627 .vsel_reg = RT9471_REG_OTGCFG,
628 .vsel_mask = RT9471_OTGCV_MASK,
629 .csel_reg = RT9471_REG_OTGCFG,
630 .csel_mask = RT9471_OTGCC_MASK,
631 };
632
rt9471_register_otg_regulator(struct rt9471_chip * chip)633 static int rt9471_register_otg_regulator(struct rt9471_chip *chip)
634 {
635 struct device *dev = chip->dev;
636 struct regulator_config cfg = { .dev = dev, .driver_data = chip };
637
638 chip->otg_rdev = devm_regulator_register(dev, &rt9471_otg_rdesc, &cfg);
639
640 return PTR_ERR_OR_ZERO(chip->otg_rdev);
641 }
642
psy_device_to_chip(struct device * dev)643 static inline struct rt9471_chip *psy_device_to_chip(struct device *dev)
644 {
645 return power_supply_get_drvdata(to_power_supply(dev));
646 }
647
sysoff_enable_show(struct device * dev,struct device_attribute * attr,char * buf)648 static ssize_t sysoff_enable_show(struct device *dev,
649 struct device_attribute *attr, char *buf)
650 {
651 struct rt9471_chip *chip = psy_device_to_chip(dev);
652 unsigned int sysoff_enable;
653 int ret;
654
655 ret = regmap_field_read(chip->rm_fields[F_BATFET_DIS], &sysoff_enable);
656 if (ret)
657 return ret;
658
659 return sysfs_emit(buf, "%d\n", sysoff_enable);
660 }
661
sysoff_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)662 static ssize_t sysoff_enable_store(struct device *dev,
663 struct device_attribute *attr,
664 const char *buf, size_t count)
665 {
666 struct rt9471_chip *chip = psy_device_to_chip(dev);
667 unsigned int tmp;
668 int ret;
669
670 ret = kstrtouint(buf, 10, &tmp);
671 if (ret)
672 return ret;
673
674 ret = regmap_field_write(chip->rm_fields[F_BATFET_DIS], !!tmp);
675 if (ret)
676 return ret;
677
678 return count;
679 }
680
port_detect_enable_show(struct device * dev,struct device_attribute * attr,char * buf)681 static ssize_t port_detect_enable_show(struct device *dev,
682 struct device_attribute *attr, char *buf)
683 {
684 struct rt9471_chip *chip = psy_device_to_chip(dev);
685 unsigned int bc12_enable;
686 int ret;
687
688 ret = regmap_field_read(chip->rm_fields[F_BC12_EN], &bc12_enable);
689 if (ret)
690 return ret;
691
692 return sysfs_emit(buf, "%d\n", bc12_enable);
693 }
694
port_detect_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)695 static ssize_t port_detect_enable_store(struct device *dev,
696 struct device_attribute *attr,
697 const char *buf, size_t count)
698 {
699 struct rt9471_chip *chip = psy_device_to_chip(dev);
700 unsigned int tmp;
701 int ret;
702
703 ret = kstrtouint(buf, 10, &tmp);
704 if (ret)
705 return ret;
706
707 ret = regmap_field_write(chip->rm_fields[F_BC12_EN], !!tmp);
708 if (ret)
709 return ret;
710
711 return count;
712 }
713
714 static DEVICE_ATTR_RW(sysoff_enable);
715 static DEVICE_ATTR_RW(port_detect_enable);
716
717 static struct attribute *rt9471_sysfs_attrs[] = {
718 &dev_attr_sysoff_enable.attr,
719 &dev_attr_port_detect_enable.attr,
720 NULL
721 };
722
723 ATTRIBUTE_GROUPS(rt9471_sysfs);
724
rt9471_register_psy(struct rt9471_chip * chip)725 static int rt9471_register_psy(struct rt9471_chip *chip)
726 {
727 struct device *dev = chip->dev;
728 struct power_supply_desc *desc = &chip->psy_desc;
729 struct power_supply_config cfg = {};
730 char *psy_name;
731
732 cfg.drv_data = chip;
733 cfg.fwnode = dev_fwnode(dev);
734 cfg.attr_grp = rt9471_sysfs_groups;
735
736 psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9471-%s", dev_name(dev));
737 if (!psy_name)
738 return -ENOMEM;
739
740 desc->name = psy_name;
741 desc->type = POWER_SUPPLY_TYPE_USB;
742 desc->usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
743 BIT(POWER_SUPPLY_USB_TYPE_CDP) |
744 BIT(POWER_SUPPLY_USB_TYPE_DCP) |
745 BIT(POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID) |
746 BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN);
747 desc->properties = rt9471_charger_properties;
748 desc->num_properties = ARRAY_SIZE(rt9471_charger_properties);
749 desc->get_property = rt9471_charger_get_property;
750 desc->set_property = rt9471_charger_set_property;
751 desc->property_is_writeable = rt9471_charger_property_is_writeable;
752
753 chip->psy = devm_power_supply_register(dev, desc, &cfg);
754
755 return PTR_ERR_OR_ZERO(chip->psy);
756 }
757
758 static const struct regmap_irq rt9471_regmap_irqs[] = {
759 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BC12_DONE, 8),
760 REGMAP_IRQ_REG_LINE(RT9471_IRQ_DETACH, 8),
761 REGMAP_IRQ_REG_LINE(RT9471_IRQ_RECHG, 8),
762 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_DONE, 8),
763 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BG_CHG, 8),
764 REGMAP_IRQ_REG_LINE(RT9471_IRQ_IE0C, 8),
765 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_RDY, 8),
766 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VBUS_GD, 8),
767 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BATOV, 8),
768 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_SYSOV, 8),
769 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_TOUT, 8),
770 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BUSUV, 8),
771 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_THREG, 8),
772 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_AICR, 8),
773 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_MIVR, 8),
774 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_SHORT, 8),
775 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_MIN, 8),
776 REGMAP_IRQ_REG_LINE(RT9471_IRQ_AICC_DONE, 8),
777 REGMAP_IRQ_REG_LINE(RT9471_IRQ_PE_DONE, 8),
778 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COLD, 8),
779 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COOL, 8),
780 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_WARM, 8),
781 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_HOT, 8),
782 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_FAULT, 8),
783 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_LBP, 8),
784 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_CC, 8),
785 REGMAP_IRQ_REG_LINE(RT9471_IRQ_WDT, 8),
786 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VAC_OV, 8),
787 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTP, 8),
788 };
789
790 static const struct regmap_irq_chip rt9471_irq_chip = {
791 .name = "rt9471-irqs",
792 .status_base = RT9471_REG_IRQ0,
793 .mask_base = RT9471_REG_MASK0,
794 .num_regs = RT9471_NUM_IRQ_REGS,
795 .irqs = rt9471_regmap_irqs,
796 .num_irqs = ARRAY_SIZE(rt9471_regmap_irqs),
797 };
798
799 static const struct reg_sequence rt9471_init_regs[] = {
800 REG_SEQ0(RT9471_REG_INFO, 0x80), /* REG_RST */
801 REG_SEQ0(RT9471_REG_TOP, 0xC0), /* WDT = 0 */
802 REG_SEQ0(RT9471_REG_FUNC, 0x01), /* BATFET_DIS_DLY = 0 */
803 REG_SEQ0(RT9471_REG_IBUS, 0x0A), /* AUTO_AICR = 0 */
804 REG_SEQ0(RT9471_REG_VBUS, 0xC6), /* VAC_OVP = 14V */
805 REG_SEQ0(RT9471_REG_JEITA, 0x38), /* JEITA = 0 */
806 REG_SEQ0(RT9471_REG_DPDMDET, 0x31), /* BC12_EN = 0, DCP_DP_OPT = 1 */
807 };
808
rt9471_check_devinfo(struct rt9471_chip * chip)809 static int rt9471_check_devinfo(struct rt9471_chip *chip)
810 {
811 struct device *dev = chip->dev;
812 unsigned int dev_id;
813 int ret;
814
815 ret = regmap_field_read(chip->rm_fields[F_DEVICE_ID], &dev_id);
816 if (ret)
817 return dev_err_probe(dev, ret, "Failed to read device_id\n");
818
819 switch (dev_id) {
820 case RT9470_DEVID:
821 case RT9470D_DEVID:
822 case RT9471_DEVID:
823 case RT9471D_DEVID:
824 return 0;
825 default:
826 return dev_err_probe(dev, -ENODEV, "Incorrect device id\n");
827 }
828 }
829
rt9471_accessible_reg(struct device * dev,unsigned int reg)830 static bool rt9471_accessible_reg(struct device *dev, unsigned int reg)
831 {
832 switch (reg) {
833 case 0x00 ... 0x0F:
834 case 0x10 ... 0x13:
835 case 0x20 ... 0x33:
836 case 0x40 ... 0xA1:
837 return true;
838 default:
839 return false;
840 }
841 }
842
843 static const struct regmap_config rt9471_regmap_config = {
844 .reg_bits = 8,
845 .val_bits = 8,
846 .max_register = 0xA1,
847 .writeable_reg = rt9471_accessible_reg,
848 .readable_reg = rt9471_accessible_reg,
849 };
850
rt9471_probe(struct i2c_client * i2c)851 static int rt9471_probe(struct i2c_client *i2c)
852 {
853 struct device *dev = &i2c->dev;
854 struct rt9471_chip *chip;
855 struct gpio_desc *ce_gpio;
856 struct regmap *regmap;
857 int ret;
858
859 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
860 if (!chip)
861 return -ENOMEM;
862
863 chip->dev = dev;
864 mutex_init(&chip->var_lock);
865 i2c_set_clientdata(i2c, chip);
866
867 /* Default pull charge enable gpio to make 'CHG_EN' by SW control only */
868 ce_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH);
869 if (IS_ERR(ce_gpio))
870 return dev_err_probe(dev, PTR_ERR(ce_gpio),
871 "Failed to config charge enable gpio\n");
872
873 regmap = devm_regmap_init_i2c(i2c, &rt9471_regmap_config);
874 if (IS_ERR(regmap))
875 return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n");
876
877 chip->regmap = regmap;
878
879 ret = devm_regmap_field_bulk_alloc(dev, regmap, chip->rm_fields,
880 rt9471_reg_fields,
881 ARRAY_SIZE(rt9471_reg_fields));
882 if (ret)
883 return dev_err_probe(dev, ret, "Failed to alloc regmap field\n");
884
885 ret = rt9471_check_devinfo(chip);
886 if (ret)
887 return ret;
888
889 ret = regmap_register_patch(regmap, rt9471_init_regs,
890 ARRAY_SIZE(rt9471_init_regs));
891 if (ret)
892 return dev_err_probe(dev, ret, "Failed to init registers\n");
893
894 ret = devm_regmap_add_irq_chip(dev, regmap, i2c->irq,
895 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0,
896 &rt9471_irq_chip, &chip->irq_chip_data);
897 if (ret)
898 return dev_err_probe(dev, ret, "Failed to add IRQ chip\n");
899
900 ret = rt9471_register_psy(chip);
901 if (ret)
902 return dev_err_probe(dev, ret, "Failed to register psy\n");
903
904 ret = rt9471_register_otg_regulator(chip);
905 if (ret)
906 return dev_err_probe(dev, ret, "Failed to register otg\n");
907
908 ret = rt9471_register_interrupts(chip);
909 if (ret)
910 return ret;
911
912 /* After IRQs are all initialized, enable port detection by default */
913 return regmap_field_write(chip->rm_fields[F_BC12_EN], 1);
914 }
915
rt9471_shutdown(struct i2c_client * i2c)916 static void rt9471_shutdown(struct i2c_client *i2c)
917 {
918 struct rt9471_chip *chip = i2c_get_clientdata(i2c);
919
920 /*
921 * There's no external reset pin. Do register reset to guarantee charger
922 * function is normal after shutdown
923 */
924 regmap_field_write(chip->rm_fields[F_REG_RST], 1);
925 }
926
927 static const struct of_device_id rt9471_of_device_id[] = {
928 { .compatible = "richtek,rt9471" },
929 {}
930 };
931 MODULE_DEVICE_TABLE(of, rt9471_of_device_id);
932
933 static struct i2c_driver rt9471_driver = {
934 .driver = {
935 .name = "rt9471",
936 .of_match_table = rt9471_of_device_id,
937 },
938 .probe = rt9471_probe,
939 .shutdown = rt9471_shutdown,
940 };
941 module_i2c_driver(rt9471_driver);
942
943 MODULE_DESCRIPTION("Richtek RT9471 charger driver");
944 MODULE_AUTHOR("Alina Yu <alina_yu@richtek.com>");
945 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
946 MODULE_LICENSE("GPL");
947