1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt712-sdca.h -- RT712 SDCA ALSA SoC audio driver header 4 * 5 * Copyright(c) 2023 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT712_H__ 9 #define __RT712_H__ 10 11 #include <linux/pm.h> 12 #include <linux/regmap.h> 13 #include <linux/soundwire/sdw.h> 14 #include <linux/soundwire/sdw_type.h> 15 #include <sound/soc.h> 16 #include <linux/workqueue.h> 17 18 struct rt712_sdca_priv { 19 struct regmap *regmap; 20 struct regmap *mbq_regmap; 21 struct snd_soc_component *component; 22 struct snd_soc_component *dmic_component; 23 struct sdw_slave *slave; 24 struct sdw_bus_params params; 25 bool hw_init; 26 bool first_hw_init; 27 struct snd_soc_jack *hs_jack; 28 struct delayed_work jack_detect_work; 29 struct delayed_work jack_btn_check_work; 30 struct mutex calibrate_mutex; /* for headset calibration */ 31 struct mutex disable_irq_lock; /* SDCA irq lock protection */ 32 bool disable_irq; 33 int jack_type; 34 int jd_src; 35 unsigned int scp_sdca_stat1; 36 unsigned int scp_sdca_stat2; 37 unsigned int hw_id; 38 unsigned int version_id; 39 bool dmic_function_found; 40 bool fu0f_dapm_mute; 41 bool fu0f_mixer_l_mute; 42 bool fu0f_mixer_r_mute; 43 bool fu1e_dapm_mute; 44 bool fu1e_mixer_mute[4]; 45 bool fu05_dapm_mute; 46 bool fu05_mixer_l_mute; 47 bool fu05_mixer_r_mute; 48 }; 49 50 struct rt712_dmic_kctrl_priv { 51 unsigned int reg_base; 52 unsigned int count; 53 unsigned int max; 54 unsigned int invert; 55 }; 56 57 /* SDCA (Channel) */ 58 #define CH_01 0x01 59 #define CH_02 0x02 60 #define CH_03 0x03 61 #define CH_04 0x04 62 63 /* NID */ 64 #define RT712_VENDOR_REG 0x20 65 #define RT712_EQ_CTRL 0x53 66 #define RT712_CHARGE_PUMP 0x57 67 #define RT712_VENDOR_CALI 0x58 68 #define RT712_ULTRA_SOUND_DET 0x59 69 #define RT712_VENDOR_IMS_DRE 0x5b 70 #define RT712_VENDOR_ANALOG_CTL 0x5f 71 #define RT712_VENDOR_HDA_CTL 0x61 72 73 /* Index (NID:20h) */ 74 #define RT712_JD_PRODUCT_NUM 0x00 75 #define RT712_ANALOG_BIAS_CTL3 0x04 76 #define RT712_JD_CTL1 0x09 77 #define RT712_JD_CTL3 0x0b 78 #define RT712_IO_CTL 0x0c 79 #define RT712_LDO2_3_CTL1 0x0e 80 #define RT712_PARA_VERB_CTL 0x1a 81 #define RT712_CC_DET1 0x24 82 #define RT712_CLASSD_AMP_CTL1 0x37 83 #define RT712_CLASSD_AMP_CTL6 0x3c 84 #define RT712_COMBO_JACK_AUTO_CTL1 0x45 85 #define RT712_COMBO_JACK_AUTO_CTL2 0x46 86 #define RT712_COMBO_JACK_AUTO_CTL3 0x47 87 #define RT712_DIGITAL_MISC_CTRL4 0x4a 88 #define RT712_FSM_CTL 0x67 89 #define RT712_SW_CONFIG1 0x8a 90 #define RT712_SW_CONFIG2 0x8b 91 92 /* Index (NID:57h) */ 93 #define RT712_HP_DET_CTL3 0x0c 94 95 /* Index (NID:58h) */ 96 #define RT712_DAC_DC_CALI_CTL1 0x00 97 #define RT712_DAC_DC_CALI_CTL2 0x01 98 99 /* Index (NID:59h) */ 100 #define RT712_ULTRA_SOUND_DETECTOR6 0x1e 101 102 /* Index (NID:5bh) */ 103 #define RT712_IMS_DIGITAL_CTL1 0x00 104 #define RT712_IMS_DIGITAL_CTL5 0x05 105 #define RT712_SEL_VEE2_HP_CTL1 0x23 106 #define RT712_HP_DETECT_RLDET_CTL1 0x29 107 #define RT712_HP_DETECT_RLDET_CTL2 0x2a 108 109 /* Index (NID:5fh) */ 110 #define RT712_MISC_POWER_CTL0 0x00 111 #define RT712_MISC_POWER_CTL7 0x08 112 113 /* Index (NID:61h) */ 114 #define RT712_HDA_LEGACY_MUX_CTL0 0x00 115 #define RT712_HDA_LEGACY_CONFIG_CTL0 0x06 116 #define RT712_HDA_LEGACY_RESET_CTL 0x08 117 #define RT712_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e 118 #define RT712_DMIC_ENT_FLOAT_CTL 0x10 119 #define RT712_DMIC_GAIN_ENT_FLOAT_CTL0 0x11 120 #define RT712_DMIC_GAIN_ENT_FLOAT_CTL2 0x13 121 #define RT712_ADC_ENT_FLOAT_CTL 0x15 122 #define RT712_ADC_VOL_CH_FLOAT_CTL2 0x18 123 #define RT712_DAC03_HP_PDE_FLOAT_CTL 0x22 124 #define RT712_MIC2_LINE2_PDE_FLOAT_CTL 0x23 125 #define RT712_ADC0A_08_PDE_FLOAT_CTL 0x26 126 #define RT712_ADC0B_11_PDE_FLOAT_CTL 0x27 127 #define RT712_DMIC1_2_PDE_FLOAT_CTL 0x2b 128 #define RT712_AMP_PDE_FLOAT_CTL 0x2c 129 #define RT712_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f 130 #define RT712_GE_RELATED_CTL1 0x45 131 #define RT712_GE_RELATED_CTL2 0x46 132 #define RT712_MIXER_CTL0 0x52 133 #define RT712_MIXER_CTL1 0x53 134 #define RT712_EAPD_CTL 0x55 135 #define RT712_UMP_HID_CTL0 0x60 136 #define RT712_UMP_HID_CTL1 0x61 137 #define RT712_UMP_HID_CTL2 0x62 138 #define RT712_UMP_HID_CTL3 0x63 139 #define RT712_UMP_HID_CTL4 0x64 140 #define RT712_UMP_HID_CTL5 0x65 141 #define RT712_UMP_HID_CTL6 0x66 142 #define RT712_UMP_HID_CTL7 0x67 143 #define RT712_UMP_HID_CTL8 0x68 144 #define RT712_MISC_CTL_FOR_UAJ 0x72 145 #define RT712_ADC0A_CS_ADC0B_FU_FLOAT_CTL 0xa2 146 #define RT712_DMIC2_FU_IT_FLOAT_CTL 0xa6 147 #define RT712_ADC0B_FU_CH12_FLOAT_CTL 0xb0 148 #define RT712_DMIC2_FU_CH12_FLOAT_CTL 0xb1 149 150 /* Parameter & Verb control 01 (0x1a)(NID:20h) */ 151 #define RT712_HIDDEN_REG_SW_RESET (0x1 << 14) 152 153 /* combo jack auto switch control 2 (0x46)(NID:20h) */ 154 #define RT712_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) 155 #define RT712_COMBOJACK_AUTO_DET_TRS (0x1 << 10) 156 #define RT712_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) 157 #define RT712_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) 158 159 /* DAC DC offset calibration control-1 (0x00)(NID:58h) */ 160 #define RT712_DAC_DC_CALI_TRIGGER (0x1 << 15) 161 162 #define RT712_EAPD_HIGH 0x2 163 #define RT712_EAPD_LOW 0x0 164 165 /* SDW clock root frequency */ 166 #define RT712_SDW_ROOT_CLK 0x004d 167 #define RT712_SDW_SCALE_CLK0 0x0062 168 #define RT712_SDW_SCALE_CLK1 0x0072 169 170 /* PLL2 config */ 171 #define RT712_PLL2_CONF1 0x2f3a 172 #define RT712_PLL2_CONF2 0x2f3d 173 #define RT712_PLL2_CONF3 0x2f41 174 175 /* RC Calibration register */ 176 #define RT712_RC_CAL 0x3201 177 178 /* Buffer address for HID */ 179 #define RT712_BUF_ADDR_HID1 0x44030000 180 #define RT712_BUF_ADDR_HID2 0x44030020 181 182 /* RT712 SDCA Control - function number */ 183 #define FUNC_NUM_JACK_CODEC 0x01 184 #define FUNC_NUM_MIC_ARRAY 0x02 185 #define FUNC_NUM_HID 0x03 186 #define FUNC_NUM_AMP 0x04 187 188 /* RT712 SDCA entity */ 189 #define RT712_SDCA_ENT0 0x00 190 #define RT712_SDCA_ENT_HID01 0x01 191 #define RT712_SDCA_ENT_GE49 0x49 192 #define RT712_SDCA_ENT_USER_FU05 0x05 193 #define RT712_SDCA_ENT_USER_FU06 0x06 194 #define RT712_SDCA_ENT_USER_FU0F 0x0f 195 #define RT712_SDCA_ENT_USER_FU10 0x19 196 #define RT712_SDCA_ENT_USER_FU1E 0x1e 197 #define RT712_SDCA_ENT_FU15 0x15 198 #define RT712_SDCA_ENT_PDE23 0x23 199 #define RT712_SDCA_ENT_PDE40 0x40 200 #define RT712_SDCA_ENT_PDE11 0x11 201 #define RT712_SDCA_ENT_PDE12 0x12 202 #define RT712_SDCA_ENT_CS01 0x01 203 #define RT712_SDCA_ENT_CS11 0x11 204 #define RT712_SDCA_ENT_CS1F 0x1f 205 #define RT712_SDCA_ENT_CS1C 0x1c 206 #define RT712_SDCA_ENT_CS31 0x31 207 #define RT712_SDCA_ENT_OT23 0x42 208 #define RT712_SDCA_ENT_IT11 0x26 209 #define RT712_SDCA_ENT_IT26 0x26 210 #define RT712_SDCA_ENT_IT09 0x09 211 #define RT712_SDCA_ENT_PLATFORM_FU15 0x15 212 #define RT712_SDCA_ENT_PLATFORM_FU44 0x44 213 214 /* RT712 SDCA control */ 215 #define RT712_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 216 #define RT712_SDCA_CTL_FU_MUTE 0x01 217 #define RT712_SDCA_CTL_FU_VOLUME 0x02 218 #define RT712_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 219 #define RT712_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11 220 #define RT712_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 221 #define RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 222 #define RT712_SDCA_CTL_SELECTED_MODE 0x01 223 #define RT712_SDCA_CTL_DETECTED_MODE 0x02 224 #define RT712_SDCA_CTL_REQ_POWER_STATE 0x01 225 #define RT712_SDCA_CTL_VENDOR_DEF 0x30 226 #define RT712_SDCA_CTL_FU_CH_GAIN 0x0b 227 #define RT712_SDCA_CTL_FUNC_STATUS 0x10 228 229 /* Function_Status */ 230 #define FUNCTION_NEEDS_INITIALIZATION BIT(5) 231 #define FUNCTION_HAS_BEEN_RESET BIT(6) 232 #define FUNCTION_BUSY BIT(7) 233 234 /* sample frequency index */ 235 #define RT712_SDCA_RATE_16000HZ 0x04 236 #define RT712_SDCA_RATE_32000HZ 0x07 237 #define RT712_SDCA_RATE_44100HZ 0x08 238 #define RT712_SDCA_RATE_48000HZ 0x09 239 #define RT712_SDCA_RATE_96000HZ 0x0b 240 #define RT712_SDCA_RATE_192000HZ 0x0d 241 242 enum { 243 RT712_AIF1, 244 RT712_AIF2, 245 RT712_AIF3, 246 }; 247 248 enum rt712_sdca_jd_src { 249 RT712_JD_NULL, 250 RT712_JD1, 251 }; 252 253 enum rt712_sdca_hw_id { 254 RT712_DEV_ID_712 = 0x7, 255 RT712_DEV_ID_713 = 0x6, 256 RT712_DEV_ID_716 = 0x5, 257 RT712_DEV_ID_717 = 0x4, 258 }; 259 260 #define RT712_PART_ID_713 0x713 261 262 enum rt712_sdca_version { 263 RT712_VA, 264 RT712_VB, 265 }; 266 267 enum { 268 RT712_CLK_FREQ_19_2_MHZ = 1, 269 RT712_CLK_FREQ_24MHZ = 2, 270 RT712_CLK_FREQ_24_576MHZ = 3, 271 RT712_CLK_FREQ_22_5792MHZ = 4, 272 }; 273 274 275 int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave); 276 int rt712_sdca_init(struct device *dev, struct regmap *regmap, 277 struct regmap *mbq_regmap, struct sdw_slave *slave); 278 279 int rt712_sdca_jack_detect(struct rt712_sdca_priv *rt712, bool *hp, bool *mic); 280 #endif /* __RT712_H__ */ 281