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Searched refs:reset_ctl (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsmu_v13_0_10.c32 static bool smu_v13_0_10_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in smu_v13_0_10_is_mode2_default() argument
34 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_is_mode2_default()
42 smu_v13_0_10_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_get_reset_handler() argument
46 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_get_reset_handler()
50 for_each_handler(i, handler, reset_ctl) { in smu_v13_0_10_get_reset_handler()
56 if (smu_v13_0_10_is_mode2_default(reset_ctl) && in smu_v13_0_10_get_reset_handler()
58 for_each_handler(i, handler, reset_ctl) { in smu_v13_0_10_get_reset_handler()
92 smu_v13_0_10_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_mode2_prepare_hwcontext() argument
96 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_prepare_hwcontext()
112 struct amdgpu_reset_control *reset_ctl = in smu_v13_0_10_async_reset() local
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H A Dsienna_cichlid.c34 static bool sienna_cichlid_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in sienna_cichlid_is_mode2_default() argument
37 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_is_mode2_default()
47 sienna_cichlid_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_get_reset_handler() argument
54 for_each_handler(i, handler, reset_ctl) { in sienna_cichlid_get_reset_handler()
60 if (sienna_cichlid_is_mode2_default(reset_ctl)) { in sienna_cichlid_get_reset_handler()
61 for_each_handler(i, handler, reset_ctl) { in sienna_cichlid_get_reset_handler()
93 sienna_cichlid_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_mode2_prepare_hwcontext() argument
97 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_prepare_hwcontext()
113 struct amdgpu_reset_control *reset_ctl = in sienna_cichlid_async_reset() local
115 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_async_reset()
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H A Daldebaran.c34 static bool aldebaran_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in aldebaran_is_mode2_default() argument
36 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_is_mode2_default()
46 aldebaran_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in aldebaran_get_reset_handler() argument
50 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_get_reset_handler()
54 if (aldebaran_is_mode2_default(reset_ctl)) in aldebaran_get_reset_handler()
63 for_each_handler(i, handler, reset_ctl) { in aldebaran_get_reset_handler()
112 aldebaran_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in aldebaran_mode2_prepare_hwcontext() argument
116 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_mode2_prepare_hwcontext()
129 struct amdgpu_reset_control *reset_ctl = in aldebaran_async_reset() local
131 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_async_reset()
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H A Damdgpu_reset.c57 struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_xgmi_reset_on_init_prep_hwctxt() argument
78 struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_xgmi_reset_on_init_restore_hwctxt() argument
100 struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_xgmi_reset_on_init_perform_reset() argument
103 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in amdgpu_reset_xgmi_reset_on_init_perform_reset()
/linux/drivers/net/dsa/realtek/
H A Drtl83xx.c187 priv->reset_ctl = devm_reset_control_get_optional(dev, NULL); in rtl83xx_probe()
188 if (IS_ERR(priv->reset_ctl)) in rtl83xx_probe()
189 return dev_err_cast_probe(dev, priv->reset_ctl, in rtl83xx_probe()
200 if (priv->reset_ctl || priv->reset) { in rtl83xx_probe()
306 ret = reset_control_assert(priv->reset_ctl); in rtl83xx_reset_assert()
319 ret = reset_control_deassert(priv->reset_ctl); in rtl83xx_reset_deassert()
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_ethdr.c83 struct reset_control *reset_ctl; member
280 reset_control_reset(priv->reset_ctl); in mtk_ethdr_stop()
363 priv->reset_ctl = devm_reset_control_array_get_optional_exclusive(dev); in mtk_ethdr_probe()
364 if (IS_ERR(priv->reset_ctl)) in mtk_ethdr_probe()
365 return dev_err_probe(dev, PTR_ERR(priv->reset_ctl), in mtk_ethdr_probe()