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Searched refs:res_ctx (Results 1 – 25 of 31) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c557 struct resource_context *res_ctx, in resource_unreference_clock_source() argument
564 res_ctx->clock_source_ref_count[i]--; in resource_unreference_clock_source()
567 res_ctx->dp_clock_source_ref_count--; in resource_unreference_clock_source()
571 struct resource_context *res_ctx, in resource_reference_clock_source() argument
578 res_ctx->clock_source_ref_count[i]++; in resource_reference_clock_source()
581 res_ctx->dp_clock_source_ref_count++; in resource_reference_clock_source()
585 struct resource_context *res_ctx, in resource_get_clock_source_reference() argument
592 return res_ctx->clock_source_ref_count[i]; in resource_get_clock_source_reference()
595 return res_ctx->dp_clock_source_ref_count; in resource_get_clock_source_reference()
732 struct resource_context *res_ctx, in resource_find_used_clk_src_for_sharing() argument
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H A Ddc_stream.c240 struct resource_context *res_ctx; in program_cursor_attributes() local
247 res_ctx = &dc->current_state->res_ctx; in program_cursor_attributes()
250 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_attributes()
387 struct resource_context *res_ctx; in program_cursor_position() local
394 res_ctx = &dc->current_state->res_ctx; in program_cursor_position()
397 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_position()
487 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_program_cursor_position()
678 struct resource_context *res_ctx = in dc_stream_get_vblank_counter() local
679 &dc->current_state->res_ctx; in dc_stream_get_vblank_counter()
684 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; in dc_stream_get_vblank_counter()
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H A Ddc.c432 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in set_long_vtotal()
496 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
538 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_last_used_drr_vtotal()
604 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_crc_window()
670 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_multiple_crc_window()
719 &dc->current_state->res_ctx, stream); in dc_stream_configure_crc()
793 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
819 if (dc->current_state->res_ctx.pipe_ctx[i].stream in dc_stream_set_dyn_expansion()
821 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dyn_expansion()
841 if (link->dc->current_state->res_ctx.pipe_ctx[i].stream == in dc_stream_set_dither_option()
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H A Ddc_surface.c74 struct pipe_ctx *pipe_ctx = &dc_state->res_ctx.pipe_ctx[i]; in dc_plane_get_pipe_mask()
135 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
150 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
290 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_force_dcc_and_tiling_disable()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c114 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_merge_pipes_for_subvp()
132 dcn20_release_dsc(&context->res_ctx, dc->res_pool, &pipe->stream_res.dsc); in dcn32_merge_pipes_for_subvp()
159 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_all_pipes_have_stream_and_plane()
176 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_in_use()
201 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_any_surfaces_rotated()
260 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in override_det_for_subvp()
275 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in override_det_for_subvp()
340 if (context->res_ctx.pipe_ctx[j].stream == context->streams[i] && in dcn32_determine_det_override()
348 current_plane = context->res_ctx.pipe_ctx[j].plane_state; in dcn32_determine_det_override()
350 if (k != j && context->res_ctx.pipe_ctx[k].stream == context->streams[i] && in dcn32_determine_det_override()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c730 *opp_cnt = resource_get_opp_heads_for_otg_master(pipe_ctx, &context->res_ctx, opp_heads); in enable_stream_timing_calc()
1023 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in disable_link_output_symclk_on_tx_off()
1247 struct pipe_ctx *pipe = &ctx->res_ctx.pipe_ctx[i]; in dcn401_calculate_cab_allocation()
1462 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn401_optimize_bandwidth()
1531 old_otg_master = &dc->current_state->res_ctx.pipe_ctx[otg_master->pipe_idx]; in update_dsc_for_odm_change()
1535 &dc->current_state->res_ctx, in update_dsc_for_odm_change()
1552 new_pipe = &context->res_ctx.pipe_ctx[old_pipe->pipe_idx]; in update_dsc_for_odm_change()
1571 otg_master, &context->res_ctx, opp_heads); in dcn401_update_odm()
1615 old_otg_master = &dc->current_state->res_ctx.pipe_ctx[otg_master->pipe_idx]; in dcn401_add_dsc_sequence_for_odm_change()
1619 &dc->current_state->res_ctx, in dcn401_add_dsc_sequence_for_odm_change()
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/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddmub_replay.c125 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; in dmub_replay_copy_settings() local
129 if (res_ctx && in dmub_replay_copy_settings()
130 res_ctx->pipe_ctx[i].stream && in dmub_replay_copy_settings()
131 res_ctx->pipe_ctx[i].stream->link && in dmub_replay_copy_settings()
132 res_ctx->pipe_ctx[i].stream->link == link && in dmub_replay_copy_settings()
133 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { in dmub_replay_copy_settings()
134 pipe_ctx = &res_ctx->pipe_ctx[i]; in dmub_replay_copy_settings()
H A Ddce_clk_mgr.c190 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in get_max_pixel_clock_for_all_paths()
511 if (stream == context->res_ctx.pipe_ctx[k].stream) { in dce110_fill_display_configs()
512 pipe_ctx = &context->res_ctx.pipe_ctx[k]; in dce110_fill_display_configs()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c869 opp_cnt = resource_get_opp_heads_for_otg_master(pipe_ctx, &context->res_ctx, opp_heads); in dcn20_enable_stream_timing()
2064 pipe = &context->res_ctx.pipe_ctx[i]; in dcn20_program_front_end_for_ctx()
2076 if (dc->current_state->res_ctx.pipe_ctx[i].plane_state) in dcn20_program_front_end_for_ctx()
2078 if (context->res_ctx.pipe_ctx[i].plane_state) in dcn20_program_front_end_for_ctx()
2091 dcn20_detect_pipe_changes(dc->current_state, context, &dc->current_state->res_ctx.pipe_ctx[i], in dcn20_program_front_end_for_ctx()
2092 &context->res_ctx.pipe_ctx[i]); in dcn20_program_front_end_for_ctx()
2098 struct dc_stream_state *stream = dc->current_state->res_ctx.pipe_ctx[i].stream; in dcn20_program_front_end_for_ctx()
2100 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn20_program_front_end_for_ctx()
2102 if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable && stream && in dcn20_program_front_end_for_ctx()
2104 struct timing_generator *tg = dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg; in dcn20_program_front_end_for_ctx()
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/linux/lib/kunit/
H A Dresource.c131 struct kunit_action_ctx *res_ctx = container_of(res, struct kunit_action_ctx, res); in __kunit_action_match() local
138 return (match_ctx->func == res_ctx->func) && (match_ctx->ctx == res_ctx->ctx); in __kunit_action_match()
H A Dkunit-test.c509 struct kunit_test_resource_context *res_ctx = (struct kunit_test_resource_context *)ctx; in action_order_1() local
511 KUNIT_RESOURCE_TEST_MARK_ORDER(res_ctx, free_order, 1); in action_order_1()
516 struct kunit_test_resource_context *res_ctx = (struct kunit_test_resource_context *)ctx; in action_order_2() local
518 KUNIT_RESOURCE_TEST_MARK_ORDER(res_ctx, free_order, 2); in action_order_2()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c538 if (!context->res_ctx.pipe_ctx[i].stream) in dcn31_calculate_wm_and_dlg_fp()
541 if (context->res_ctx.pipe_ctx[i].plane_state) in dcn31_calculate_wm_and_dlg_fp()
573 if (context->res_ctx.pipe_ctx[i].stream) in dcn31_calculate_wm_and_dlg_fp()
574 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
577 if (!context->res_ctx.pipe_ctx[i].stream) in dcn31_calculate_wm_and_dlg_fp()
580 context->res_ctx.pipe_ctx[i].det_buffer_size_kb = in dcn31_calculate_wm_and_dlg_fp()
582 if (context->res_ctx.pipe_ctx[i].det_buffer_size_kb > 384) in dcn31_calculate_wm_and_dlg_fp()
583 context->res_ctx.pipe_ctx[i].det_buffer_size_kb /= 2; in dcn31_calculate_wm_and_dlg_fp()
584 total_det += context->res_ctx.pipe_ctx[i].det_buffer_size_kb; in dcn31_calculate_wm_and_dlg_fp()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c476 struct resource_context *res_ctx = &context->res_ctx; in dcn351_populate_dml_pipes_from_context_fpu() local
491 if (!res_ctx->pipe_ctx[i].stream) in dcn351_populate_dml_pipes_from_context_fpu()
494 pipe = &res_ctx->pipe_ctx[i]; in dcn351_populate_dml_pipes_from_context_fpu()
590 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn351_populate_dml_pipes_from_context_fpu()
617 if (context->res_ctx.pipe_ctx[i].plane_state) in dcn351_decide_zstate_support()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c443 struct resource_context *res_ctx = &context->res_ctx; in dcn35_populate_dml_pipes_from_context_fpu() local
458 if (!res_ctx->pipe_ctx[i].stream) in dcn35_populate_dml_pipes_from_context_fpu()
461 pipe = &res_ctx->pipe_ctx[i]; in dcn35_populate_dml_pipes_from_context_fpu()
557 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn35_populate_dml_pipes_from_context_fpu()
587 if (context->res_ctx.pipe_ctx[i].plane_state) in dcn35_decide_zstate_support()
/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_edp_panel_control.c538 if (dc->current_state->res_ctx.pipe_ctx[i].stream) { in get_pipe_from_link()
539 if (dc->current_state->res_ctx.pipe_ctx[i].stream->link == link) { in get_pipe_from_link()
540 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in get_pipe_from_link()
800 if (dc->current_state->res_ctx.pipe_ctx[i].stream in edp_setup_psr()
806 dc->current_state->res_ctx. in edp_setup_psr()
1035 if (dc->current_state->res_ctx.pipe_ctx[i].stream in edp_setup_panel_replay()
1041 dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg->inst + 1; in edp_setup_panel_replay()
1141 if (dc->current_state->res_ctx.pipe_ctx[i].stream in edp_setup_freesync_replay()
1147 dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg->inst + 1; in edp_setup_freesync_replay()
1315 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in get_abm_from_stream_res()
H A Dlink_dp_capability.c343 struct resource_context *res_ctx = &link->dc->current_state->res_ctx; in dp_is_fec_supported() local
345 struct link_encoder *link_enc = get_temp_dio_link_enc(res_ctx, res_pool, link); in dp_is_fec_supported()
2242 struct resource_context *res_ctx = &link->dc->current_state->res_ctx; in dp_get_max_link_enc_cap() local
2244 struct link_encoder *link_enc = get_temp_dio_link_enc(res_ctx, res_pool, link); in dp_get_max_link_enc_cap()
2281 struct resource_context *res_ctx = &link->dc->current_state->res_ctx; in dp_get_max_link_cap() local
2283 struct link_encoder *link_enc = get_temp_dio_link_enc(res_ctx, res_pool, link); in dp_get_max_link_cap()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce110/
H A Ddce110_resource.h49 struct resource_context *res_ctx,
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.h50 struct resource_context *res_ctx,
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_trace.h28 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[index]; \
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_resource.c41 pipe = &link->dc->current_state->res_ctx.pipe_ctx[i]; in link_get_cur_link_res()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c117 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
153 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist()
184 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist()
/linux/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c195 struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx; in dp_test_get_audio_test_data()
495 resource_build_test_pattern_params(&link->dc->current_state->res_ctx, in set_crtc_test_pattern()
655 struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx; in dp_set_test_pattern()
973 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dp_set_preferred_link_settings()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c306 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn201_init_hw()
341 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn201_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c164 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in ramp_up_dispclk_with_dpp()
/linux/drivers/gpu/drm/amd/display/dc/irq/dce110/
H A Dirq_service_dce110.c219 tg = dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; in dce110_vblank_set()

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