| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_link_enc_cfg.c | 71 if (dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_TRANSIENT) in get_assignment()
72 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i]; in get_assignment()
74 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in get_assignment()
88 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in get_stream_using_link_enc()
114 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in remove_link_enc_assignment()
117 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid = false; in remove_link_enc_assignment()
122 state->res_ctx.link_enc_cfg_ctx.link_enc_avail[eng_idx] = eng_id; in remove_link_enc_assignment()
125 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].eng_id = ENGINE_ID_UNKNOWN; in remove_link_enc_assignment()
126 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL; in remove_link_enc_assignment()
150 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i] = (struct link_enc_assignment){ in add_link_enc_assignment()
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| H A D | dc_resource.c | 504 struct resource_context *res_ctx, in find_matching_clock_source()
511 res_ctx->clock_source_ref_count[i]--; in resource_unreference_clock_source()
514 res_ctx->dp_clock_source_ref_count--; in resource_unreference_clock_source()
518 struct resource_context *res_ctx, in resource_unreference_clock_source()
525 res_ctx->clock_source_ref_count[i]++; in resource_reference_clock_source()
528 res_ctx->dp_clock_source_ref_count++; in resource_reference_clock_source()
532 struct resource_context *res_ctx, in resource_reference_clock_source()
539 return res_ctx->clock_source_ref_count[i]; in resource_get_clock_source_reference()
542 return res_ctx->dp_clock_source_ref_count; in resource_get_clock_source_reference()
679 struct resource_context *res_ctx, in is_sharable_clk_src()
509 resource_unreference_clock_source(struct resource_context * res_ctx,const struct resource_pool * pool,struct clock_source * clock_source) resource_unreference_clock_source() argument
523 resource_reference_clock_source(struct resource_context * res_ctx,const struct resource_pool * pool,struct clock_source * clock_source) resource_reference_clock_source() argument
537 resource_get_clock_source_reference(struct resource_context * res_ctx,const struct resource_pool * pool,struct clock_source * clock_source) resource_get_clock_source_reference() argument
684 resource_find_used_clk_src_for_sharing(struct resource_context * res_ctx,struct pipe_ctx * pipe_ctx) resource_find_used_clk_src_for_sharing() argument
1437 resource_build_test_pattern_params(struct resource_context * res_ctx,struct pipe_ctx * otg_master) resource_build_test_pattern_params() argument
1664 resource_find_free_secondary_pipe_legacy(struct resource_context * res_ctx,const struct resource_pool * pool,const struct pipe_ctx * primary_pipe) resource_find_free_secondary_pipe_legacy() argument
1902 resource_get_otg_master_for_stream(struct resource_context * res_ctx,const struct dc_stream_state * stream) resource_get_otg_master_for_stream() argument
1916 resource_get_opp_heads_for_otg_master(const struct pipe_ctx * otg_master,struct resource_context * res_ctx,struct pipe_ctx * opp_heads[MAX_PIPES]) resource_get_opp_heads_for_otg_master() argument
1941 resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx * opp_head,struct resource_context * res_ctx,struct pipe_ctx * dpp_pipes[MAX_PIPES]) resource_get_dpp_pipes_for_opp_head() argument
1960 resource_get_dpp_pipes_for_plane(const struct dc_plane_state * plane,struct resource_context * res_ctx,struct pipe_ctx * dpp_pipes[MAX_PIPES]) resource_get_dpp_pipes_for_plane() argument
2470 acquire_first_split_pipe(struct resource_context * res_ctx,const struct resource_pool * pool,struct dc_stream_state * stream) acquire_first_split_pipe() argument
2505 update_stream_engine_usage(struct resource_context * res_ctx,const struct resource_pool * pool,struct stream_encoder * stream_enc,bool acquired) update_stream_engine_usage() argument
2519 update_hpo_dp_stream_engine_usage(struct resource_context * res_ctx,const struct resource_pool * pool,struct hpo_dp_stream_encoder * hpo_dp_stream_enc,bool acquired) update_hpo_dp_stream_engine_usage() argument
2533 find_acquired_hpo_dp_link_enc_for_link(const struct resource_context * res_ctx,const struct dc_link * link) find_acquired_hpo_dp_link_enc_for_link() argument
2546 find_free_hpo_dp_link_enc(const struct resource_context * res_ctx,const struct resource_pool * pool) find_free_hpo_dp_link_enc() argument
2560 acquire_hpo_dp_link_enc(struct resource_context * res_ctx,unsigned int link_index,int enc_index) acquire_hpo_dp_link_enc() argument
2569 retain_hpo_dp_link_enc(struct resource_context * res_ctx,int enc_index) retain_hpo_dp_link_enc() argument
2576 release_hpo_dp_link_enc(struct resource_context * res_ctx,int enc_index) release_hpo_dp_link_enc() argument
2583 add_hpo_dp_link_enc_to_ctx(struct resource_context * res_ctx,const struct resource_pool * pool,struct pipe_ctx * pipe_ctx,struct dc_stream_state * stream) add_hpo_dp_link_enc_to_ctx() argument
2606 remove_hpo_dp_link_enc_from_ctx(struct resource_context * res_ctx,struct pipe_ctx * pipe_ctx,struct dc_stream_state * stream) remove_hpo_dp_link_enc_from_ctx() argument
3285 update_audio_usage(struct resource_context * res_ctx,const struct resource_pool * pool,struct audio * audio,bool acquired) update_audio_usage() argument
3298 find_first_free_match_hpo_dp_stream_enc_for_link(struct resource_context * res_ctx,const struct resource_pool * pool,struct dc_stream_state * stream) find_first_free_match_hpo_dp_stream_enc_for_link() argument
3316 find_first_free_audio(struct resource_context * res_ctx,const struct resource_pool * pool,enum engine_id id,enum dce_version dc_version) find_first_free_audio() argument
3417 acquire_resource_from_hw_enabled_state(struct resource_context * res_ctx,const struct resource_pool * pool,struct dc_stream_state * stream) acquire_resource_from_hw_enabled_state() argument
4500 dc_resource_find_first_free_pll(struct resource_context * res_ctx,const struct resource_pool * pool) dc_resource_find_first_free_pll() argument
4912 get_temp_hpo_dp_link_enc(const struct resource_context * res_ctx,const struct resource_pool * const pool,const struct dc_link * link) get_temp_hpo_dp_link_enc() argument
4935 const struct resource_context *res_ctx = &dc->current_state->res_ctx; get_temp_dp_link_res() local
[all...] |
| H A D | dc_stream.c | 229 struct resource_context *res_ctx; in program_cursor_attributes() local
235 res_ctx = &dc->current_state->res_ctx; in program_cursor_attributes()
238 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_attributes()
339 struct resource_context *res_ctx; in program_cursor_position() local
345 res_ctx = &dc->current_state->res_ctx; in program_cursor_position()
348 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_position()
428 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_program_cursor_position()
630 struct resource_context *res_ctx = in dc_stream_get_vblank_counter() local
631 &dc->current_state->res_ctx; in dc_stream_get_vblank_counter()
636 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; in dc_stream_get_vblank_counter()
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| H A D | dc.c | 404 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in set_long_vtotal()
462 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
499 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_last_used_drr_vtotal()
532 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crtc_position()
592 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_crc_window()
643 &dc->current_state->res_ctx, stream); in dc_stream_configure_crc()
713 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
739 if (dc->current_state->res_ctx.pipe_ctx[i].stream in dc_stream_set_dyn_expansion()
741 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dyn_expansion()
761 if (link->dc->current_state->res_ctx in dc_stream_set_dither_option()
2270 struct resource_context *res_ctx = &dc->current_state->res_ctx; dc_acquire_release_mpc_3dlut() local
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| H A D | dc_state.c | 151 struct pipe_ctx *cur_pipe = &dst_state->res_ctx.pipe_ctx[i]; in dc_state_copy_internal()
154 cur_pipe->top_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx]; in dc_state_copy_internal()
157 cur_pipe->bottom_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; in dc_state_copy_internal()
160 cur_pipe->prev_odm_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx]; in dc_state_copy_internal()
163 cur_pipe->next_odm_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx]; in dc_state_copy_internal()
334 memset(&state->res_ctx, 0, sizeof(state->res_ctx)); in dc_state_destruct()
412 &state->res_ctx, stream); in dc_state_remove_stream()
479 &state->res_ctx, stream); in dc_state_add_plane()
922 struct pipe_ctx *pipe = &state->res_ctx in dc_state_remove_phantom_streams_and_planes()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_dc_resource_mgmt.c | 114 …if (state->res_ctx.pipe_ctx[i].stream && state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id… in find_master_pipe_of_stream()
115 if (!state->res_ctx.pipe_ctx[i].prev_odm_pipe && !state->res_ctx.pipe_ctx[i].top_pipe) in find_master_pipe_of_stream()
116 return &state->res_ctx.pipe_ctx[i]; in find_master_pipe_of_stream()
130 …if (state->res_ctx.pipe_ctx[i].plane_state && get_plane_id(ctx, state, state->res_ctx.pipe_ctx[i].… in find_master_pipe_of_plane()
131 state->res_ctx.pipe_ctx[i].stream->stream_id, in find_master_pipe_of_plane()
132 …ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pip… in find_master_pipe_of_plane()
134 return &state->res_ctx.pipe_ctx[i]; in find_master_pipe_of_plane()
149 struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i]; in find_pipes_assigned_to_plane()
264 …if (existing_state->res_ctx.pipe_ctx[i].stream && existing_state->res_ctx.pipe_ctx[i].stream->stre… in find_preferred_pipe_candidates()
265 if (existing_state->res_ctx.pipe_ctx[i].plane_res.hubp && in find_preferred_pipe_candidates()
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| H A D | dml2_utils.c | 174 if (!context->res_ctx.pipe_ctx[i].stream) in is_dp2p0_output_encoder()
176 if (is_dp2p0_output_encoder(&context->res_ctx.pipe_ctx[i]))
299 if (!context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream) in dml2_calculate_rq_and_dlg_params()
305 if (get_plane_id(in_ctx, context, context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_state, in dml2_calculate_rq_and_dlg_params()
306 context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id, in dml2_calculate_rq_and_dlg_params()
307 in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[context->res_ctx.pipe_ctx[dc_pipe_ctx_index].pipe_idx], &plane_id)) { in dml2_calculate_rq_and_dlg_params()
310 dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id); in dml2_calculate_rq_and_dlg_params()
316 ASSERT(in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[dml_pipe_idx] == context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id); in dml2_calculate_rq_and_dlg_params()
321 populate_pipe_ctx_dlg_params_from_dml(&context->res_ctx.pipe_ctx[dc_pipe_ctx_index], &context->bw_ctx.dml2->v20.dml_core_ctx, dml_pipe_idx); in dml2_calculate_rq_and_dlg_params()
323 pipe_mall_type = dc_state_get_pipe_subvp_type(context, &context->res_ctx in dml2_calculate_rq_and_dlg_params()
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| H A D | dml2_mall_phantom.c | 50 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dml2_helper_calculate_num_ways_for_subvp()
107 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in merge_pipes_for_subvp()
125 …ctx->config.svp_pstate.callbacks.release_dsc(&context->res_ctx, ctx->config.svp_pstate.callbacks.d… in merge_pipes_for_subvp()
151 const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in all_pipes_have_stream_and_plane()
192 struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i]; in get_num_free_pipes()
238 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in assign_subvp_pipe()
263 pipe = &context->res_ctx.pipe_ctx[i]; in assign_subvp_pipe()
316 struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i]; in enough_pipes_for_subvp()
368 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in subvp_subvp_schedulable()
449 pipe = &context->res_ctx.pipe_ctx[i]; in dml2_svp_drr_schedulable()
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| H A D | dml2_wrapper.h | 74 void (*build_test_pattern_params)(struct resource_context *res_ctx, struct pipe_ctx *otg_master);
95 struct resource_context *res_ctx,
98 struct resource_context *res_ctx,
101 struct resource_context *res_ctx,
139 void (*release_dsc)(struct resource_context *res_ctx, const struct resource_pool *pool, struct display_stream_compressor **dsc);
272 * @fast_validate: Fast validate will not populate context.res_ctx.
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | resource.h | 106 struct resource_context *res_ctx,
118 struct resource_context *res_ctx,
123 struct resource_context *res_ctx,
128 struct resource_context *res_ctx,
141 struct resource_context *res_ctx,
145 struct resource_context *res_ctx,
369 struct resource_context *res_ctx,
374 * master pipe in res_ctx.
379 struct resource_context *res_ctx,
384 * head pipe in res_ctx
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 114 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_merge_pipes_for_subvp()
132 dcn20_release_dsc(&context->res_ctx, dc->res_pool, &pipe->stream_res.dsc); in dcn32_merge_pipes_for_subvp()
159 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_all_pipes_have_stream_and_plane()
176 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_in_use()
201 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_any_surfaces_rotated()
260 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in override_det_for_subvp()
275 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in override_det_for_subvp()
340 if (context->res_ctx.pipe_ctx[j].stream == context->streams[i] && in dcn32_determine_det_override()
348 current_plane = context->res_ctx.pipe_ctx[j].plane_state; in dcn32_determine_det_override()
350 if (k != j && context->res_ctx in dcn32_determine_det_override()
385 struct resource_context *res_ctx = &context->res_ctx; dcn32_set_det_allocations() local
754 struct resource_context *res_ctx = &context->res_ctx; dcn32_update_dml_pipes_odm_policy_based_on_context() local
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| H A D | dcn32_resource.c | 1596 struct resource_context *res_ctx, in dcn32_acquire_post_bldn_3dlut() argument
1608 if (!res_ctx->is_mpc_3dlut_acquired[mpcc_id]) { in dcn32_acquire_post_bldn_3dlut()
1611 res_ctx->is_mpc_3dlut_acquired[mpcc_id] = true; in dcn32_acquire_post_bldn_3dlut()
1618 struct resource_context *res_ctx, in dcn32_release_post_bldn_3dlut() argument
1628 res_ctx->is_mpc_3dlut_acquired[i] = false; in dcn32_release_post_bldn_3dlut()
1646 struct pipe_ctx *curr_pipe = &context->res_ctx.pipe_ctx[dc_pipe_idx]; in dcn32_enable_phantom_plane()
1690 struct pipe_ctx *ref_pipe = &context->res_ctx.pipe_ctx[dc_pipe_idx]; in dcn32_enable_phantom_stream()
1729 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_add_phantom_pipes()
1830 struct resource_context *res_ctx = &context->res_ctx; in dcn32_populate_dml_pipes_from_context()
1824 struct resource_context *res_ctx = &context->res_ctx; dcn32_populate_dml_pipes_from_context() local
2602 find_idle_secondary_pipe_check_mpo(struct resource_context * res_ctx,const struct resource_pool * pool,const struct pipe_ctx * primary_pipe) find_idle_secondary_pipe_check_mpo() argument
2669 struct resource_context *res_ctx = &state->res_ctx; dcn32_acquire_idle_pipe_for_head_pipe_in_layer() local
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 991 struct resource_context *res_ctx, in dcn20_populate_dml_writeback_from_context() argument
999 struct dc_writeback_info *wb_info = &res_ctx->pipe_ctx[i].stream->writeback_info[0]; in dcn20_populate_dml_writeback_from_context()
1001 if (!res_ctx->pipe_ctx[i].stream) in dcn20_populate_dml_writeback_from_context()
1043 wb_arb_params->time_per_pixel = 16.0 * 1000 / (context->res_ctx.pipe_ctx[i].stream->phy_pix_clk / 1000); /* 4 bit fraction, ms */ in dcn20_fpu_set_wb_arb_params()
1050 if (!context->res_ctx.pipe_ctx[i].stream) in is_dtbclk_required()
1052 if (dc->link_srv->dp_is_128b_132b_signal(&context->res_ctx.pipe_ctx[i])) in is_dtbclk_required()
1065 if (context->res_ctx.pipe_ctx[i].plane_state) in decide_zstate_support()
1181 if (!context->res_ctx.pipe_ctx[i].stream) in dcn20_calculate_dlg_params()
1183 if (context->res_ctx.pipe_ctx[i].plane_state) in dcn20_calculate_dlg_params()
1190 if (dc_state_get_pipe_subvp_type(context, &context->res_ctx in dcn20_calculate_dlg_params()
1321 struct resource_context *res_ctx = &context->res_ctx; dcn20_populate_dml_pipes_from_context() local
2474 dcn201_populate_dml_writeback_from_context_fpu(struct dc * dc,struct resource_context * res_ctx,display_e2e_pipe_params_st * pipes) dcn201_populate_dml_writeback_from_context_fpu() argument
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1313 struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream); in dcn20_build_mapped_resource()
1326 struct resource_context *res_ctx, in dcn20_acquire_dsc() argument
1332 struct display_stream_compressor *dsc_old = dc->current_state->res_ctx.pipe_ctx[pipe_idx].stream_res.dsc; in dcn20_acquire_dsc()
1340 res_ctx->is_dsc_acquired[pipe_idx] = true; in dcn20_acquire_dsc()
1345 if (dsc_old && !res_ctx->is_dsc_acquired[dsc_old->inst]) { in dcn20_acquire_dsc()
1347 res_ctx->is_dsc_acquired[dsc_old->inst] = true; in dcn20_acquire_dsc()
1353 if (!res_ctx->is_dsc_acquired[i]) { in dcn20_acquire_dsc()
1355 res_ctx->is_dsc_acquired[i] = true; in dcn20_acquire_dsc()
1360 void dcn20_release_dsc(struct resource_context *res_ctx, in dcn20_release_dsc() argument
1368 res_ctx in dcn20_release_dsc()
1480 dcn20_split_stream_for_odm(const struct dc * dc,struct resource_context * res_ctx,struct pipe_ctx * prev_odm_pipe,struct pipe_ctx * next_odm_pipe) dcn20_split_stream_for_odm() argument
1563 dcn20_split_stream_for_mpc(struct resource_context * res_ctx,const struct resource_pool * pool,struct pipe_ctx * primary_pipe,struct pipe_ctx * secondary_pipe) dcn20_split_stream_for_mpc() argument
1708 dcn20_find_secondary_pipe(struct dc * dc,struct resource_context * res_ctx,const struct resource_pool * pool,const struct pipe_ctx * primary_pipe) dcn20_find_secondary_pipe() argument
2178 struct resource_context *res_ctx = &new_ctx->res_ctx; dcn20_acquire_free_pipe_for_layer() local
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| H A D | dcn20_resource.h | 132 void dcn20_release_dsc(struct resource_context *res_ctx,
137 struct resource_context *res_ctx,
143 struct resource_context *res_ctx,
147 struct resource_context *res_ctx,
151 struct resource_context *res_ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 343 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_helper_populate_phantom_dlg_params()
488 pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_set_phantom_stream_timing()
565 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_get_num_free_pipes()
610 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_assign_subvp_pipe()
642 pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_assign_subvp_pipe()
685 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_enough_pipes_for_subvp()
735 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in subvp_subvp_schedulable()
817 pipe = &context->res_ctx.pipe_ctx[i]; in subvp_drr_schedulable()
834 drr_pipe = &context->res_ctx.pipe_ctx[i]; in subvp_drr_schedulable()
923 pipe = &context->res_ctx in subvp_vblank_schedulable()
1848 dcn32_split_stream_for_mpc_or_odm(const struct dc * dc,struct resource_context * res_ctx,struct pipe_ctx * pri_pipe,struct pipe_ctx * sec_pipe,bool odm) dcn32_split_stream_for_mpc_or_odm() argument
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dmub_replay.c | 124 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; in dmub_replay_copy_settings()
128 if (res_ctx && in dmub_replay_copy_settings()
129 res_ctx->pipe_ctx[i].stream && in dmub_replay_copy_settings()
130 res_ctx->pipe_ctx[i].stream->link && in dmub_replay_copy_settings()
131 res_ctx->pipe_ctx[i].stream->link == link && in dmub_replay_copy_settings()
132 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { in dmub_replay_copy_settings()
133 pipe_ctx = &res_ctx->pipe_ctx[i]; in dmub_replay_copy_settings()
122 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; dmub_replay_copy_settings() local
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 852 opp_cnt = resource_get_opp_heads_for_otg_master(pipe_ctx, &context->res_ctx, opp_heads); in dcn20_enable_stream_timing()
2024 pipe = &context->res_ctx.pipe_ctx[i]; in dcn20_program_front_end_for_ctx()
2036 if (dc->current_state->res_ctx.pipe_ctx[i].plane_state) in dcn20_program_front_end_for_ctx()
2038 if (context->res_ctx.pipe_ctx[i].plane_state) in dcn20_program_front_end_for_ctx()
2051 dcn20_detect_pipe_changes(dc->current_state, context, &dc->current_state->res_ctx.pipe_ctx[i], in dcn20_program_front_end_for_ctx()
2052 &context->res_ctx.pipe_ctx[i]); in dcn20_program_front_end_for_ctx()
2058 struct dc_stream_state *stream = dc->current_state->res_ctx.pipe_ctx[i].stream; in dcn20_program_front_end_for_ctx()
2060 if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable && stream && in dcn20_program_front_end_for_ctx()
2061 dc_state_get_pipe_subvp_type(dc->current_state, &dc->current_state->res_ctx.pipe_ctx[i]) == SUBVP_PHANTOM) { in dcn20_program_front_end_for_ctx()
2062 struct timing_generator *tg = dc->current_state->res_ctx in dcn20_program_front_end_for_ctx()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1326 struct resource_context *res_ctx = &context->res_ctx; in dcn30_populate_dml_pipes_from_context() local
1333 if (!res_ctx->pipe_ctx[i].stream) in dcn30_populate_dml_pipes_from_context()
1344 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_populate_dml_writeback_from_context() argument
1347 dcn30_fpu_populate_dml_writeback_from_context(dc, res_ctx, pipes); in dcn30_populate_dml_writeback_from_context()
1389 if (!context->res_ctx.pipe_ctx[i].stream) in dcn30_set_mcif_arb_params()
1393 …struct dc_writeback_info *writeback_info = &context->res_ctx.pipe_ctx[i].stream->writeback_info[j]; in dcn30_set_mcif_arb_params()
1410 …wb_arb_params->time_per_pixel = (1000000 << 6) / context->res_ctx.pipe_ctx[i].stream->phy_pix_clk;… in dcn30_set_mcif_arb_params()
1430 struct resource_context *res_ctx, in dcn30_acquire_post_bldn_3dlut() argument
1445 if (!res_ctx->is_mpc_3dlut_acquired[i]) { in dcn30_acquire_post_bldn_3dlut()
1449 res_ctx->is_mpc_3dlut_acquired[i] = true; in dcn30_acquire_post_bldn_3dlut()
[all …]
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| H A D | dcn30_resource.h | 76 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
84 struct resource_context *res_ctx,
91 struct resource_context *res_ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 232 struct pipe_ctx *pipe = &ctx->res_ctx.pipe_ctx[i]; in dcn32_calculate_cab_allocation()
352 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn32_commit_subvp_config()
383 pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_pipe_control_lock()
404 pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_pipe_control_lock()
604 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_update_force_pstate()
623 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_update_force_pstate()
624 struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn32_update_force_pstate()
669 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_update_mall_sel()
729 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_program_mall_pipe_config()
1138 struct pipe_ctx *current_pipe_ctx = &dc->current_state->res_ctx in dcn32_update_odm()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_hw_sequencer.c | 56 struct resource_context *res_ctx = &context->res_ctx; in dce60_should_enable_fbc() local
71 if (res_ctx->pipe_ctx[i].stream) { in dce60_should_enable_fbc()
73 pipe_ctx = &res_ctx->pipe_ctx[i]; in dce60_should_enable_fbc()
124 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; in dce60_enable_fbc()
396 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dce60_apply_ctx_for_surface()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_utils.c | 118 num_pipes = dml_ctx->config.callbacks.get_dpp_pipes_for_plane(dc_main_plane, &context->res_ctx, dc_main_pipes); in dml21_find_dc_pipes_for_plane()
121 struct pipe_ctx *otg_master_pipe = dml_ctx->config.callbacks.get_otg_master_for_stream(&context->res_ctx, dc_main_stream); in dml21_find_dc_pipes_for_plane()
123 num_pipes = dml_ctx->config.callbacks.get_opp_heads_for_otg_master(otg_master_pipe, &context->res_ctx, dc_main_pipes); in dml21_find_dc_pipes_for_plane()
137 dml_ctx->config.callbacks.get_dpp_pipes_for_plane(dc_phantom_plane, &context->res_ctx, dc_phantom_pipes); in dml21_find_dc_pipes_for_plane()
288 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dml21_program_dc_pipe()
522 if (context->res_ctx.pipe_ctx[k].stream && in dml21_build_fams2_programming()
523 context->res_ctx.pipe_ctx[k].stream->stream_id == stream->stream_id && in dml21_build_fams2_programming()
524 context->res_ctx.pipe_ctx[k].plane_state == context->stream_status[i].plane_states[j]) { in dml21_build_fams2_programming()
551 if (context->res_ctx.pipe_ctx[k].stream &&
552 context->res_ctx
[all...] |
| /linux/lib/kunit/ |
| H A D | resource.c | 131 struct kunit_action_ctx *res_ctx = container_of(res, struct kunit_action_ctx, res); in __kunit_action_match() local
138 return (match_ctx->func == res_ctx->func) && (match_ctx->ctx == res_ctx->ctx); in __kunit_action_match()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1093 if (dc->current_state->res_ctx.pipe_ctx[i].stream_res.audio != NULL) in dce110_enable_audio_stream()
1511 struct pipe_ctx *pipe_ctx_old = &dc->current_state->res_ctx. in dce110_enable_stream_timing()
1784 dc->current_state->res_ctx.pipe_ctx[i].pipe_idx = i; in get_edp_streams()
1786 &dc->current_state->res_ctx.pipe_ctx[i]); in get_edp_streams()
1882 pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, edp_stream); in dce110_enable_accelerated_mode()
1964 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dce110_set_displaymarks()
1993 struct resource_context *res_ctx, in dce110_set_safe_displaymarks()
2005 if (res_ctx->pipe_ctx[i].stream == NULL || res_ctx->pipe_ctx[i].plane_res.mi == NULL) in dce110_set_safe_displaymarks()
2008 res_ctx in dce110_set_safe_displaymarks()
1982 dce110_set_safe_displaymarks(struct resource_context * res_ctx,const struct resource_pool * pool) dce110_set_safe_displaymarks() argument
2097 struct resource_context *res_ctx = &context->res_ctx; should_enable_fbc() local
[all...] |