| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_dc_resource_mgmt.c | 114 …if (state->res_ctx.pipe_ctx[i].stream && state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id… in find_master_pipe_of_stream()
115 if (!state->res_ctx.pipe_ctx[i].prev_odm_pipe && !state->res_ctx.pipe_ctx[i].top_pipe) in find_master_pipe_of_stream()
116 return &state->res_ctx.pipe_ctx[i]; in find_master_pipe_of_stream()
130 …if (state->res_ctx.pipe_ctx[i].plane_state && get_plane_id(ctx, state, state->res_ctx.pipe_ctx[i].… in find_master_pipe_of_plane()
131 state->res_ctx.pipe_ctx[i].stream->stream_id, in find_master_pipe_of_plane()
132 …ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pip… in find_master_pipe_of_plane()
134 return &state->res_ctx.pipe_ctx[i]; in find_master_pipe_of_plane()
149 struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i]; in find_pipes_assigned_to_plane()
271 …if (existing_state->res_ctx.pipe_ctx[i].stream && existing_state->res_ctx.pipe_ctx[i].stream->stre… in find_preferred_pipe_candidates()
273 resource_is_pipe_type(&existing_state->res_ctx.pipe_ctx[i], DPP_PIPE) ? in find_preferred_pipe_candidates()
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| H A D | dml2_wrapper_fpu.c | 182 struct pipe_ctx *pipe = &display_state->res_ctx.pipe_ctx[i]; in calculate_lowest_supported_state_for_temp_read()
290 struct pipe_ctx *pipe = &display_state->res_ctx.pipe_ctx[i]; in dml_mode_support_wrapper()
484 …dml2_calculate_rq_and_dlg_params(in_dc, context, &context->res_ctx, dml2, in_dc->res_pool->pipe_co… in dml2_validate_and_build_resource()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 434 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in set_long_vtotal()
471 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_last_used_drr_vtotal()
537 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_crc_window()
603 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_multiple_crc_window()
653 &dc->current_state->res_ctx, stream); in dc_stream_configure_crc()
728 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
754 if (dc->current_state->res_ctx.pipe_ctx[i].stream in dc_stream_set_dyn_expansion()
756 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dyn_expansion()
772 struct resource_context *res_ctx = &link->dc->current_state->res_ctx; in dc_stream_set_dither_option() local
778 otg_master = resource_get_otg_master_for_stream(res_ctx, stream); in dc_stream_set_dither_option()
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| /linux/lib/kunit/ |
| H A D | resource.c | 131 struct kunit_action_ctx *res_ctx = container_of(res, struct kunit_action_ctx, res); in __kunit_action_match() local
138 return (match_ctx->func == res_ctx->func) && (match_ctx->ctx == res_ctx->ctx); in __kunit_action_match()
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| H A D | kunit-test.c | 509 struct kunit_test_resource_context *res_ctx = (struct kunit_test_resource_context *)ctx; in action_order_1() local
511 KUNIT_RESOURCE_TEST_MARK_ORDER(res_ctx, free_order, 1); in action_order_1()
516 struct kunit_test_resource_context *res_ctx = (struct kunit_test_resource_context *)ctx; in action_order_2() local
518 KUNIT_RESOURCE_TEST_MARK_ORDER(res_ctx, free_order, 2); in action_order_2()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.h | 32 struct resource_context *res_ctx,
86 struct resource_context *res_ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| H A D | dce110_resource.h | 49 struct resource_context *res_ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 199 struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn35_disable_otg_wa()
200 struct pipe_ctx *new_pipe = &context->res_ctx.pipe_ctx[i]; in dcn35_disable_otg_wa()
204 ? &context->res_ctx.pipe_ctx[i] in dcn35_disable_otg_wa()
205 : &dc->current_state->res_ctx.pipe_ctx[i]; in dcn35_disable_otg_wa()
265 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn35_update_clocks_update_dtb_dto()
305 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn35_update_clocks_update_dpp_dto()
307 if (context->res_ctx.pipe_ctx[i].plane_res.dpp) in dcn35_update_clocks_update_dpp_dto()
308 dpp_inst = context->res_ctx.pipe_ctx[i].plane_res.dpp->inst; in dcn35_update_clocks_update_dpp_dto()
309 else if (!context->res_ctx.pipe_ctx[i].plane_res.dpp && dppclk_khz == 0) { in dcn35_update_clocks_update_dpp_dto()
314 } else if (!context->res_ctx.pipe_ctx[i].plane_res.dpp && dppclk_khz > 0) { in dcn35_update_clocks_update_dpp_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_resource.c | 41 pipe = &link->dc->current_state->res_ctx.pipe_ctx[i]; in link_get_cur_link_res()
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| H A D | link_detection.c | 983 link->dc->current_state->res_ctx.pipe_ctx; in should_verify_link_capability_destructively()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce100/ |
| H A D | dce100_resource.c | 854 struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream(&context->res_ctx, stream); in build_mapped_resource()
878 stream = context->res_ctx.pipe_ctx[i].stream; in dce100_validate_bandwidth()
977 struct resource_context *res_ctx, in dce100_find_first_free_match_stream_enc_for_link() argument
993 if (!res_ctx->is_stream_enc_acquired[i] && in dce100_find_first_free_match_stream_enc_for_link()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 159 ? &context->res_ctx.pipe_ctx[i] in dcn314_disable_otg_wa()
160 : &dc->current_state->res_ctx.pipe_ctx[i]; in dcn314_disable_otg_wa()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 123 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn31_disable_otg_wa()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_helpers.c | 1490 struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx; in dm_helpers_dp_handle_test_pattern_request()
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