| /linux/drivers/gpu/drm/sprd/ |
| H A D | megacores_pll.c | 102 regmap_write(regmap, reg_addr[i], reg_val[i]); in dphy_set_pll_reg()
131 regmap_write(regmap, 0x31, val[CLK]); in dphy_set_timing_reg()
132 regmap_write(regmap, 0x41, val[DATA]); in dphy_set_timing_reg()
133 regmap_write(regmap, 0x51, val[DATA]); in dphy_set_timing_reg()
134 regmap_write(regmap, 0x61, val[DATA]); in dphy_set_timing_reg()
135 regmap_write(regmap, 0x71, val[DATA]); in dphy_set_timing_reg()
137 regmap_write(regmap, 0x90, val[CLK]); in dphy_set_timing_reg()
138 regmap_write(regmap, 0xa0, val[DATA]); in dphy_set_timing_reg()
139 regmap_write(regmap, 0xb0, val[DATA]); in dphy_set_timing_reg()
140 regmap_write(regmap, 0xc0, val[DATA]); in dphy_set_timing_reg()
[all …]
|
| /linux/sound/soc/codecs/ |
| H A D | es8389.c | 761 regmap_write(es8389->regmap, ES8389_CLK_DIV1, coeff_div[coeff].Reg0x04); in es8389_init()
762 regmap_write(es8389->regmap, ES8389_CLK_MUL, coeff_div[coeff].Reg0x05); in es8389_init()
763 regmap_write(es8389->regmap, ES8389_CLK_MUX1, coeff_div[coeff].Reg0x06); in es8389_init()
764 regmap_write(es8389->regmap, ES8389_CLK_MUX2, coeff_div[coeff].Reg0x07); in es8389_init()
765 regmap_write(es8389->regmap, ES8389_CLK_CTL1, coeff_div[coeff].Reg0x08); in es8389_init()
766 regmap_write(es8389->regmap, ES8389_CLK_CTL2, coeff_div[coeff].Reg0x09); in es8389_init()
767 regmap_write(es8389->regmap, ES8389_CLK_CTL3, coeff_div[coeff].Reg0x0A); in es8389_init()
770 regmap_write(es8389->regmap, ES8389_CLK_DIV2, coeff_div[coeff].Reg0x11); in es8389_init()
771 regmap_write(es8389->regmap, ES8389_ADC_OSR, coeff_div[coeff].Reg0x21); in es8389_init()
772 regmap_write(es838 in es8389_init()
[all...] |
| H A D | es8326.c | 82 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); in es8326_crosstalk1_set()
120 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); in es8326_crosstalk2_set()
594 regmap_write(es8326->regmap, ES8326_CLK_DIV1, in es8326_pcm_hw_params()
596 regmap_write(es8326->regmap, ES8326_CLK_DIV2, in es8326_pcm_hw_params()
598 regmap_write(es8326->regmap, ES8326_CLK_DLL, in es8326_pcm_hw_params()
600 regmap_write(es8326->regmap, ES8326_CLK_MUX,
602 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, in es8326_mute()
604 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, in es8326_mute()
606 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, in es8326_mute()
608 regmap_write(es832 in es8326_mute()
[all...] |
| H A D | es8375.c | 324 regmap_write(es8375->regmap, ES8375_CLK_MGR4, in es8375_hw_params()
326 regmap_write(es8375->regmap, ES8375_CLK_MGR5, in es8375_hw_params()
328 regmap_write(es8375->regmap, ES8375_CLK_MGR6, in es8375_hw_params()
330 regmap_write(es8375->regmap, ES8375_CLK_MGR7, in es8375_hw_params()
332 regmap_write(es8375->regmap, ES8375_CLK_MGR8, in es8375_hw_params()
334 regmap_write(es8375->regmap, ES8375_CLK_MGR9, in es8375_hw_params()
336 regmap_write(es8375->regmap, ES8375_CLK_MGR10, in es8375_hw_params()
338 regmap_write(es8375->regmap, ES8375_CLK_MGR11, in es8375_hw_params()
340 regmap_write(es8375->regmap, ES8375_ADC_OSR_GAIN, in es8375_hw_params()
439 regmap_write(es837 in es8375_set_dai_fmt()
[all...] |
| H A D | mt6358.c | 228 regmap_write(priv->regmap, MT6358_ZCD_CON0, 0x0000); in hp_zcd_disable()
824 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_sgen_event()
826 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_sgen_event()
828 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_sgen_event()
830 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_sgen_event()
841 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_sgen_event()
842 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_sgen_event()
866 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_aif_in_event()
868 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_aif_in_event()
870 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_aif_in_event()
[all …]
|
| H A D | es9356.c | 306 regmap_write(es9356->regmap, in es9356_sdca_button_detect()
339 regmap_write(es9356->regmap, in es9356_sdca_headset_detect()
341 regmap_write(es9356->regmap, ES9356_HP_DETECTTIME, 0x75); in es9356_sdca_headset_detect()
343 regmap_write(es9356->regmap, ES9356_HP_DETECTTIME, 0xa4); in es9356_sdca_headset_detect()
505 regmap_write(es9356->regmap, in es9356_power_state()
517 regmap_write(es9356->regmap, in es9356_power_state()
717 regmap_write(es9356->regmap, ES9356_STATE, 0x02); in es9356_register_init()
718 regmap_write(es9356->regmap, ES9356_ENDPOINT_MODE, 0x24); in es9356_register_init()
719 regmap_write(es9356->regmap, ES9356_PRE_DIV_CTL, 0x00); in es9356_register_init()
720 regmap_write(es9356->regmap, ES9356_ADC_OSR, 0x18); in es9356_register_init()
[all …]
|
| H A D | rt700.c | 38 ret = regmap_write(regmap, addr, value); in rt700_index_write()
279 regmap_write(rt700->regmap, in rt700_jack_init()
284 regmap_write(rt700->regmap, in rt700_jack_init()
286 regmap_write(rt700->regmap, in rt700_jack_init()
288 regmap_write(rt700->regmap, in rt700_jack_init()
298 regmap_write(rt700->regmap, in rt700_jack_init()
300 regmap_write(rt700->regmap, in rt700_jack_init()
302 regmap_write(rt700->regmap, in rt700_jack_init()
310 regmap_write(rt700->regmap, in rt700_jack_init()
400 regmap_write(rt70 in rt700_set_amp_gain_put()
[all...] |
| H A D | rt715.c | 41 ret = regmap_write(regmap, addr, value); in rt715_index_write()
56 ret = regmap_write(regmap, addr, value); in rt715_index_write_nid()
97 regmap_write(regmap, RT715_FUNC_RESET, 0); in rt715_reset()
155 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
181 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
183 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
188 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
192 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
209 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
276 regmap_write(rt71 in rt715_set_main_switch_put()
[all...] |
| H A D | rt711.c | 39 ret = regmap_write(regmap, addr, value); in rt711_index_write()
80 regmap_write(regmap, RT711_FUNC_RESET, 0); in rt711_reset()
94 regmap_write(rt711->regmap, in rt711_calibration()
130 regmap_write(rt711->regmap, in rt711_calibration()
368 regmap_write(rt711->regmap, in rt711_jack_init()
373 regmap_write(rt711->regmap, in rt711_jack_init()
375 regmap_write(rt711->regmap, in rt711_jack_init()
377 regmap_write(rt711->regmap, in rt711_jack_init()
439 regmap_write(rt711->regmap, in rt711_jack_init()
441 regmap_write(rt71 in rt711_jack_init()
[all...] |
| H A D | rt1308-sdw.c | 114 regmap_write(rt1308->regmap, 0xe0, value); in rt1308_clock_config()
115 regmap_write(rt1308->regmap, 0xf0, value); in rt1308_clock_config()
172 regmap_write(rt1308->regmap, 0xc7f0, 0x04); in rt1308_apply_calib_params()
173 regmap_write(rt1308->regmap, 0xc7f1, 0xfe); in rt1308_apply_calib_params()
175 regmap_write(rt1308->regmap, 0xc7f0, 0x44); in rt1308_apply_calib_params()
177 regmap_write(rt1308->regmap, 0xc240, 0x10); in rt1308_apply_calib_params()
208 regmap_write(rt1308->regmap, reg, data); in rt1308_apply_bq_params()
239 regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0); in rt1308_io_init()
246 regmap_write(rt1308->regmap, 0xc103, 0xc0); in rt1308_io_init()
247 regmap_write(rt1308->regmap, 0xc030, 0x17); in rt1308_io_init()
[all …]
|
| H A D | rt715-sdw.c | 165 ret = regmap_write(rt715->sdw_regmap, reg, 0); in rt715_sdw_read()
170 ret = regmap_write(rt715->sdw_regmap, reg2, val2); in rt715_sdw_read()
175 ret = regmap_write(rt715->sdw_regmap, reg3, in rt715_sdw_read()
181 ret = regmap_write(rt715->sdw_regmap, reg4, (*val & 0xff)); in rt715_sdw_read()
186 ret = regmap_write(rt715->sdw_regmap, reg, *val); in rt715_sdw_read()
192 ret = regmap_write(rt715->sdw_regmap, reg, in rt715_sdw_read()
198 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff)); in rt715_sdw_read()
204 ret = regmap_write(rt715->sdw_regmap, reg2, in rt715_sdw_read()
208 ret = regmap_write(rt715->sdw_regmap, reg, (*val & 0xff)); in rt715_sdw_read()
212 ret = regmap_write(rt715->sdw_regmap, reg, in rt715_sdw_read()
[all …]
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| H A D | rt1320-sdw.c | 1197 regmap_write(rt1320->regmap, in rt1320_data_rw()
1208 regmap_write(rt1320->regmap, start + i, data[i]); in rt1320_data_rw()
1248 regmap_write(rt1320->regmap, 0xc483, 0x80); in rt1320_pr_read()
1249 regmap_write(rt1320->regmap, 0xc482, 0x40); in rt1320_pr_read()
1250 regmap_write(rt1320->regmap, 0xc481, 0x0c); in rt1320_pr_read()
1251 regmap_write(rt1320->regmap, 0xc480, 0x10); in rt1320_pr_read()
1253 regmap_write(rt1320->regmap, 0xc487, ((reg & 0xff000000) >> 24)); in rt1320_pr_read()
1254 regmap_write(rt1320->regmap, 0xc486, ((reg & 0x00ff0000) >> 16)); in rt1320_pr_read()
1255 regmap_write(rt1320->regmap, 0xc485, ((reg & 0x0000ff00) >> 8)); in rt1320_pr_read()
1256 regmap_write(rt1320->regmap, 0xc484, (reg & 0x000000ff)); in rt1320_pr_read()
[all …]
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| H A D | rt1011.c | 1031 regmap_write(regmap, RT1011_RESET, 0); in rt1011_reset()
1241 regmap_write(rt1011->regmap, RT1011_INIT_RECIPROCAL_REG_24_16, in rt1011_r0_load()
1243 regmap_write(rt1011->regmap, RT1011_INIT_RECIPROCAL_REG_15_0, in rt1011_r0_load()
1245 regmap_write(rt1011->regmap, RT1011_SPK_TEMP_PROTECT_4, 0x4080); in rt1011_r0_load()
1328 regmap_write(rt1011->regmap, RT1011_TDM_TOTAL_SET, 0x0240); in rt1011_i2s_ref_put()
1329 regmap_write(rt1011->regmap, RT1011_TDM1_SET_2, 0x8); in rt1011_i2s_ref_put()
1330 regmap_write(rt1011->regmap, RT1011_TDM1_SET_1, 0x1022); in rt1011_i2s_ref_put()
1331 regmap_write(rt1011->regmap, RT1011_ADCDAT_OUT_SOURCE, 0x4); in rt1011_i2s_ref_put()
1334 regmap_write(rt1011->regmap, RT1011_TDM_TOTAL_SET, 0x0240); in rt1011_i2s_ref_put()
1335 regmap_write(rt101 in rt1011_i2s_ref_put()
[all...] |
| H A D | rt711-sdw.c | 109 ret = regmap_write(rt711->sdw_regmap, reg, 0); in rt711_sdw_read()
114 ret = regmap_write(rt711->sdw_regmap, reg2, val2); in rt711_sdw_read()
119 ret = regmap_write(rt711->sdw_regmap, in rt711_sdw_read()
125 ret = regmap_write(rt711->sdw_regmap, reg4, (*val & 0xff)); in rt711_sdw_read()
130 ret = regmap_write(rt711->sdw_regmap, reg, *val); in rt711_sdw_read()
136 ret = regmap_write(rt711->sdw_regmap, in rt711_sdw_read()
142 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff)); in rt711_sdw_read()
148 ret = regmap_write(rt711->sdw_regmap, in rt711_sdw_read()
152 ret = regmap_write(rt711->sdw_regmap, reg, (*val & 0xff)); in rt711_sdw_read()
156 ret = regmap_write(rt711->sdw_regmap, in rt711_sdw_read()
[all …]
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| /linux/drivers/iio/imu/inv_mpu6050/ |
| H A D | inv_mpu_aux.c | 32 ret = regmap_write(st->map, st->reg->sample_rate_div, d); in inv_mpu_i2c_master_xfer()
38 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); in inv_mpu_i2c_master_xfer()
47 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); in inv_mpu_i2c_master_xfer()
53 ret = regmap_write(st->map, st->reg->sample_rate_div, d); in inv_mpu_i2c_master_xfer()
58 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0); in inv_mpu_i2c_master_xfer()
73 regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl); in inv_mpu_i2c_master_xfer()
75 regmap_write(st->map, st->reg->sample_rate_div, st->chip_config.divider); in inv_mpu_i2c_master_xfer()
77 regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0); in inv_mpu_i2c_master_xfer()
108 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_MST_CTRL, val); in inv_mpu_aux_init()
113 ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, 0); in inv_mpu_aux_init()
[all …]
|
| /linux/drivers/power/reset/ |
| H A D | arm-versatile-reboot.c | 79 regmap_write(syscon_regmap, INTEGRATOR_HDR_LOCK_OFFSET, in versatile_reboot()
87 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
93 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
97 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
99 regmap_write(syscon_regmap, in versatile_reboot()
103 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
105 regmap_write(syscon_regmap, in versatile_reboot()
110 regmap_write(syscon_regmap, VERSATILE_SYS_LOCK_OFFSET, in versatile_reboot()
112 regmap_write(syscon_regmap, VERSATILE_SYS_RESETCTL_OFFSET, in versatile_reboot()
114 regmap_write(syscon_regmap, VERSATILE_SYS_RESETCTL_OFFSET, in versatile_reboot()
[all …]
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| /linux/drivers/phy/allwinner/ |
| H A D | phy-sun6i-mipi-dphy.c | 229 regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG, in sun6i_a31_mipi_dphy_tx_power_on()
236 regmap_write(dphy->regs, SUN6I_DPHY_ANA1_REG, in sun6i_a31_mipi_dphy_tx_power_on()
240 regmap_write(dphy->regs, SUN6I_DPHY_ANA4_REG, in sun6i_a31_mipi_dphy_tx_power_on()
251 regmap_write(dphy->regs, SUN6I_DPHY_ANA2_REG, in sun6i_a31_mipi_dphy_tx_power_on()
255 regmap_write(dphy->regs, SUN6I_DPHY_ANA3_REG, in sun6i_a31_mipi_dphy_tx_power_on()
267 regmap_write(dphy->regs, SUN6I_DPHY_ANA4_REG, in sun50i_a100_mipi_dphy_tx_power_on()
287 regmap_write(dphy->regs, SUN6I_DPHY_ANA3_REG, in sun50i_a100_mipi_dphy_tx_power_on()
292 regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG, in sun50i_a100_mipi_dphy_tx_power_on()
296 regmap_write(dphy->regs, SUN50I_COMBO_PHY_REG0, in sun50i_a100_mipi_dphy_tx_power_on()
303 regmap_write(dphy->regs, SUN50I_DPHY_PLL_REG0, in sun50i_a100_mipi_dphy_tx_power_on()
[all …]
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| /linux/drivers/gpu/drm/meson/ |
| H A D | meson_vclk.c | 246 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800023d); in meson_venci_cvbs_clock_config()
247 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00404e00); in meson_venci_cvbs_clock_config()
248 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); in meson_venci_cvbs_clock_config()
249 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); in meson_venci_cvbs_clock_config()
250 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_venci_cvbs_clock_config()
251 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); in meson_venci_cvbs_clock_config()
252 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4800023d); in meson_venci_cvbs_clock_config()
259 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x4000027b); in meson_venci_cvbs_clock_config()
260 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb300); in meson_venci_cvbs_clock_config()
261 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0xa6212844); in meson_venci_cvbs_clock_config()
[all …]
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| /linux/drivers/phy/amlogic/ |
| H A D | phy-meson-axg-mipi-dphy.c | 228 regmap_write(priv->regmap, MIPI_DSI_PHY_CTRL, 0x1); in phy_meson_axg_mipi_dphy_power_on()
229 regmap_write(priv->regmap, MIPI_DSI_PHY_CTRL, in phy_meson_axg_mipi_dphy_power_on()
246 regmap_write(priv->regmap, MIPI_DSI_CLK_TIM, in phy_meson_axg_mipi_dphy_power_on()
252 regmap_write(priv->regmap, MIPI_DSI_CLK_TIM1, in phy_meson_axg_mipi_dphy_power_on()
255 regmap_write(priv->regmap, MIPI_DSI_HS_TIM, in phy_meson_axg_mipi_dphy_power_on()
261 regmap_write(priv->regmap, MIPI_DSI_LP_TIM, in phy_meson_axg_mipi_dphy_power_on()
267 regmap_write(priv->regmap, MIPI_DSI_ANA_UP_TIM, 0x0100); in phy_meson_axg_mipi_dphy_power_on()
268 regmap_write(priv->regmap, MIPI_DSI_INIT_TIM, in phy_meson_axg_mipi_dphy_power_on()
270 regmap_write(priv->regmap, MIPI_DSI_WAKEUP_TIM, in phy_meson_axg_mipi_dphy_power_on()
272 regmap_write(priv->regmap, MIPI_DSI_LPOK_TIM, 0x7C); in phy_meson_axg_mipi_dphy_power_on()
[all …]
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| /linux/drivers/phy/lantiq/ |
| H A D | phy-lantiq-vrx200-pcie.c | 103 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL1, 0x120e); in ltq_vrx200_pcie_phy_common_setup()
106 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL2, 0x39d7); in ltq_vrx200_pcie_phy_common_setup()
107 regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL3, 0x0900); in ltq_vrx200_pcie_phy_common_setup()
110 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_EI, 0x0004); in ltq_vrx200_pcie_phy_common_setup()
111 regmap_write(priv->phy_regmap, PCIE_PHY_RX1_A_CTRL, 0x6803); in ltq_vrx200_pcie_phy_common_setup()
118 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL2, 0x0706); in ltq_vrx200_pcie_phy_common_setup()
121 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL3, 0x1fff); in ltq_vrx200_pcie_phy_common_setup()
124 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL1, 0x0810); in ltq_vrx200_pcie_phy_common_setup()
131 regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL2, 0x2e00); in ltq_vrx200_pcie_phy_common_setup()
134 regmap_write(priv->phy_regmap, PCIE_PHY_TX2_CTRL2, 0x3096); in ltq_vrx200_pcie_phy_common_setup()
[all …]
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| /linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-samsung-dcphy.c | 978 regmap_write(samsung->regmap, BIAS_CON0, I_DEV_DIV_6 | I_RES_100_2UA); in samsung_mipi_dcphy_bias_block_enable()
979 regmap_write(samsung->regmap, BIAS_CON1, I_VBG_SEL_820MV | I_BGR_VREF_820MV | in samsung_mipi_dcphy_bias_block_enable()
981 regmap_write(samsung->regmap, BIAS_CON2, REG_325M_325MV | REG_LP_400M_400MV | in samsung_mipi_dcphy_bias_block_enable()
994 regmap_write(samsung->regmap, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000)); in samsung_mipi_dphy_lane_enable()
1000 regmap_write(samsung->regmap, DPHY_MD3_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1006 regmap_write(samsung->regmap, COMBO_MD2_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1012 regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1019 regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1, in samsung_mipi_dphy_lane_enable()
1064 regmap_write(samsung->regmap, PLL_CON1, dsm_tmp); in samsung_mipi_dcphy_pll_configure()
1066 regmap_write(samsung->regmap, PLL_CON1, samsung->pll.dsm); in samsung_mipi_dcphy_pll_configure()
[all …]
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| /linux/arch/arm/mach-rockchip/ |
| H A D | pm.c | 102 regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0, in rk3288_slp_mode_set()
111 regmap_write(sgrf_regmap, RK3288_SGRF_CPU_CON0, SGRF_DAPDEVICEEN_WRITE); in rk3288_slp_mode_set()
114 regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR, in rk3288_slp_mode_set()
137 regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1, in rk3288_slp_mode_set()
147 regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, 32 * 30); in rk3288_slp_mode_set()
150 regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, in rk3288_slp_mode_set()
160 regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1, in rk3288_slp_mode_set()
164 regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, 24000 * 30); in rk3288_slp_mode_set()
167 regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, 0); in rk3288_slp_mode_set()
170 regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, mode_set); in rk3288_slp_mode_set()
[all …]
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| /linux/drivers/devfreq/event/ |
| H A D | exynos-ppmu.c | 135 ret = regmap_write(info->regmap, PPMU_CNTENC, in exynos_ppmu_disable()
150 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_disable()
173 ret = regmap_write(info->regmap, PPMU_CNTENS, cntens); in exynos_ppmu_set_event()
178 ret = regmap_write(info->regmap, PPMU_BEVTxSEL(id), in exynos_ppmu_set_event()
194 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_set_event()
220 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_get_event()
261 ret = regmap_write(info->regmap, PPMU_CNTENC, cntenc); in exynos_ppmu_get_event()
289 ret = regmap_write(info->regmap, PPMU_V2_FLAG, clear); in exynos_ppmu_v2_disable()
293 ret = regmap_write(info->regmap, PPMU_V2_INTENC, clear); in exynos_ppmu_v2_disable()
297 ret = regmap_write(info->regmap, PPMU_V2_CNTENC, clear); in exynos_ppmu_v2_disable()
[all …]
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| /linux/sound/soc/mediatek/mt8183/ |
| H A D | mt8183-dai-adda.c | 225 regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x38); in set_mtkaif_rx()
226 regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x39); in set_mtkaif_rx()
228 regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, in set_mtkaif_rx()
253 regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x31); in set_mtkaif_rx()
254 regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, in set_mtkaif_rx()
258 regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x31); in set_mtkaif_rx()
259 regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 0x0); in set_mtkaif_rx()
284 regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON0, 0); in mtk_dai_adda_hw_params()
285 regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON1, 0); in mtk_dai_adda_hw_params()
318 regmap_write(af in mtk_dai_adda_hw_params()
[all...] |
| /linux/drivers/regulator/ |
| H A D | raa215300.c | 87 regmap_write(regmap, RAA215300_REG_BLOCK_EN, val); in raa215300_i2c_probe()
91 regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_1, val); in raa215300_i2c_probe()
93 regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_2, val); in raa215300_i2c_probe()
95 regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_3, val); in raa215300_i2c_probe()
97 regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_4, val); in raa215300_i2c_probe()
99 regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_6, val); in raa215300_i2c_probe()
102 regmap_write(regmap, RAA215300_INT_MASK_1, RAA215300_INT_MASK_1_ALL); in raa215300_i2c_probe()
103 regmap_write(regmap, RAA215300_INT_MASK_2, RAA215300_INT_MASK_2_ALL); in raa215300_i2c_probe()
104 regmap_write(regmap, RAA215300_INT_MASK_3, RAA215300_INT_MASK_3_ALL); in raa215300_i2c_probe()
105 regmap_write(regmap, RAA215300_INT_MASK_4, RAA215300_INT_MASK_4_ALL); in raa215300_i2c_probe()
[all …]
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