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Searched refs:regmap_set_bits (Results 1 – 25 of 128) sorted by relevance

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/linux/drivers/pmdomain/imx/
H A Dimx8mp-blk-ctrl.c179 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
182 regmap_set_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
185 regmap_set_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_on()
230 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
243 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
310 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(9)); in imx8mp_hdmi_blk_ctrl_power_on()
311 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(16)); in imx8mp_hdmi_blk_ctrl_power_on()
314 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
317 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_on()
318 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
[all …]
H A Dimx8m-blk-ctrl.c111 regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask); in imx8m_blk_ctrl_power_on()
124 regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); in imx8m_blk_ctrl_power_on()
126 regmap_set_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask); in imx8m_blk_ctrl_power_on()
430 regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(0) | BIT(1) | BIT(2)); in imx8mm_vpu_power_notifier()
441 regmap_set_bits(bc->regmap, 0x8, 0xffffffff); in imx8mm_vpu_power_notifier()
442 regmap_set_bits(bc->regmap, 0xc, 0xffffffff); in imx8mm_vpu_power_notifier()
443 regmap_set_bits(bc->regmap, 0x10, 0xffffffff); in imx8mm_vpu_power_notifier()
444 regmap_set_bits(bc->regmap, 0x14, 0xffffffff); in imx8mm_vpu_power_notifier()
534 regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(12)); in imx8mm_disp_power_notifier()
535 regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(6)); in imx8mm_disp_power_notifier()
[all …]
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi_v2.c69 regmap_set_bits(hdmi->regs, TOP_INT_ENABLE00, HPD_PORD_HWIRQS); in mtk_hdmi_v2_enable_hpd_pord_irq()
77 regmap_set_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_HPD); in mtk_hdmi_v2_set_sw_hpd()
78 regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR); in mtk_hdmi_v2_set_sw_hpd()
79 regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_SW); in mtk_hdmi_v2_set_sw_hpd()
92 regmap_set_bits(hdmi->regs, TOP_CFG00, SCR_ON | HDMI2_ON); in mtk_hdmi_v2_enable_scrambling()
107 regmap_set_bits(hdmi->regs, TOP_VMUTE_CFG1, REG_VMUTE_EN); in mtk_hdmi_v2_hw_vid_mute()
134 regmap_set_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_RSTB); in mtk_hdmi_v2_hw_reset()
159 regmap_set_bits(hdmi->regs, TOP_INFO_RPT, AUD_RPT_EN); in mtk_hdmi_v2_hw_write_audio_infoframe()
160 regmap_set_bits(hdmi->regs, TOP_INFO_EN, AUD_EN | AUD_EN_WR); in mtk_hdmi_v2_hw_write_audio_infoframe()
176 regmap_set_bits(hdmi->regs, TOP_INFO_RPT, AVI_RPT_EN); in mtk_hdmi_v2_hw_write_avi_infoframe()
[all …]
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8qm-hsio.c209 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2, in imx_hsio_pcie_phy_resets()
211 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2, in imx_hsio_pcie_phy_resets()
213 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2, in imx_hsio_pcie_phy_resets()
217 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
219 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
222 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
224 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
237 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0, in imx_hsio_sata_phy_resets()
241 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0, HSIO_RESET_N); in imx_hsio_sata_phy_resets()
245 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0, HSIO_RESET_N); in imx_hsio_sata_phy_resets()
[all …]
/linux/drivers/usb/typec/mux/
H A Dwcd939x-usbss.c306 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_MG1_BIAS, in wcd939x_usbss_set()
312 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_MG2_BIAS, in wcd939x_usbss_set()
396 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
408 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SELECT1, in wcd939x_usbss_set()
414 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
420 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
467 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_EQUALIZER1, in wcd939x_usbss_set()
485 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
502 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_DISP_AUXP_THRESH, in wcd939x_usbss_set()
523 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
[all …]
/linux/drivers/phy/amlogic/
H A Dphy-meson8b-usb2.c168 regmap_set_bits(priv->regmap, REG_CONFIG, REG_CONFIG_CLK_32k_ALTSEL); in phy_meson8b_usb2_power_on()
177 regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET); in phy_meson8b_usb2_power_on()
182 regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT); in phy_meson8b_usb2_power_on()
189 regmap_set_bits(priv->regmap, REG_ADP_BC, in phy_meson8b_usb2_power_on()
213 regmap_set_bits(priv->regmap, REG_DBG_UART, in phy_meson8b_usb2_power_off()
221 regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET); in phy_meson8b_usb2_power_off()
/linux/drivers/misc/
H A Dtps6594-pfsm.c121 ret = regmap_set_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS, in tps6594_pfsm_configure_ret_trig()
130 ret = regmap_set_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS, in tps6594_pfsm_configure_ret_trig()
168 ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2, in tps6594_pfsm_ioctl()
184 ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS, in tps6594_pfsm_ioctl()
207 ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS, in tps6594_pfsm_ioctl()
H A Dtps6594-esm.c68 ret = regmap_set_bits(tps->regmap, TPS6594_REG_ESM_SOC_MODE_CFG, in tps6594_esm_probe()
73 ret = regmap_set_bits(tps->regmap, TPS6594_REG_ESM_SOC_START_REG, in tps6594_esm_probe()
126 return regmap_set_bits(tps->regmap, TPS6594_REG_ESM_SOC_START_REG, in tps6594_esm_resume()
/linux/drivers/mfd/
H A Dtps65910.c317 ret = regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL, in tps65910_sleepinit()
325 ret = regmap_set_bits(tps65910->regmap, in tps65910_sleepinit()
335 ret = regmap_set_bits(tps65910->regmap, in tps65910_sleepinit()
345 ret = regmap_set_bits(tps65910->regmap, in tps65910_sleepinit()
496 ret = regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL, in tps65910_i2c_probe()
/linux/drivers/iio/adc/
H A Dmeson_saradc.c553 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_start_sample_engine()
556 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_start_sample_engine()
559 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_start_sample_engine()
570 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_stop_sample_engine()
589 regmap_set_bits(priv->regmap, MESON_SAR_ADC_DELAY, in meson_sar_adc_lock()
879 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG3, in meson_sar_adc_init()
915 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
918 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
921 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
924 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
[all …]
H A Drohm-bd79124.c402 ret = regmap_set_bits(data->map, BD79124_REG_SEQ_CFG, in bd79124_start_measurement()
451 return regmap_set_bits(data->map, BD79124_REG_SEQ_CFG, in bd79124_stop_measurement()
523 ret = regmap_set_bits(data->map, BD79124_REG_ALERT_CH_SEL, BIT(channel)); in bd79124_enable_event()
553 return regmap_set_bits(data->map, BD79124_REG_GEN_CFG, in bd79124_enable_event()
645 return regmap_set_bits(data->map, BD79124_REG_SEQ_CFG, in bd79124_single_chan_seq()
662 return regmap_set_bits(data->map, BD79124_REG_SEQ_CFG, in bd79124_single_chan_seq_end()
966 ret = regmap_set_bits(data->map, BD79124_REG_GEN_CFG, in bd79124_hw_init()
988 ret = regmap_set_bits(data->map, BD79124_REG_SEQ_CFG, in bd79124_hw_init()
/linux/drivers/gpio/
H A Dgpio-tps65910.c46 return regmap_set_bits(tps65910->regmap, in tps65910_gpio_set()
65 return regmap_set_bits(tps65910->regmap, TPS65910_GPIO0 + offset, in tps65910_gpio_output()
163 ret = regmap_set_bits(tps65910->regmap, in tps65910_gpio_probe()
/linux/sound/soc/fsl/
H A Dfsl_xcvr.c364 regmap_set_bits(xcvr->regmap_pll, FSL_XCVR_PLL_BANDGAP, in fsl_xcvr_en_phy_pll()
374 regmap_set_bits(xcvr->regmap_pll, FSL_XCVR_PLL_CTRL0, in fsl_xcvr_en_phy_pll()
386 regmap_set_bits(xcvr->regmap_pll, FSL_XCVR_PLL_CTRL0, in fsl_xcvr_en_phy_pll()
393 regmap_set_bits(xcvr->regmap_pll, FSL_XCVR_PLL_CTRL0, in fsl_xcvr_en_phy_pll()
400 regmap_set_bits(xcvr->regmap_pll, FSL_XCVR_PLL_CTRL0, in fsl_xcvr_en_phy_pll()
421 regmap_set_bits(xcvr->regmap_phy, FSL_XCVR_PHY_CTRL, in fsl_xcvr_en_phy_pll()
425 regmap_set_bits(xcvr->regmap_phy, FSL_XCVR_PHY_CTRL2, in fsl_xcvr_en_phy_pll()
430 regmap_set_bits(xcvr->regmap_phy, FSL_XCVR_PHY_CTRL, in fsl_xcvr_en_phy_pll()
433 regmap_set_bits(xcvr->regmap_phy, FSL_XCVR_PHY_CTRL, in fsl_xcvr_en_phy_pll()
477 regmap_set_bits(xcv in fsl_xcvr_en_aud_pll()
[all...]
H A Dfsl_micfil.c567 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
649 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
671 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
675 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
679 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
683 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
691 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
695 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
699 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
733 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
[all …]
/linux/drivers/rtc/
H A Drtc-tps6594.c80 return regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_shadow_timestamp()
146 return regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_set_time()
234 return regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_set_calibration()
377 ret = regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_2, in tps6594_rtc_probe()
388 ret = regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_probe()
/linux/sound/soc/jz4740/
H A Djz4740-i2s.c107 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
109 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_RFLUSH); in jz4740_i2s_startup()
122 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
128 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_startup()
160 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, mask); in jz4740_i2s_trigger()
448 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_resume()
/linux/drivers/iio/dac/
H A Dadi-axi-dac.c128 ret = regmap_set_bits(st->regmap, AXI_DAC_RSTN_REG, in axi_dac_enable()
144 return regmap_set_bits(st->regmap, AXI_DAC_RSTN_REG, in axi_dac_enable()
326 return regmap_set_bits(st->regmap, AXI_DAC_CNTRL_1_REG, in __axi_dac_frequency_set()
388 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_1_REG, in axi_dac_scale_set()
429 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_1_REG, in axi_dac_phase_set()
634 return regmap_set_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in axi_dac_ddr_disable()
661 return regmap_set_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in axi_dac_data_stream_enable()
728 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in __axi_dac_bus_reg_write()
971 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in axi_dac_probe()
/linux/drivers/pwm/
H A Dpwm-stm32.c348 ret = regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE); in stm32_pwm_write_waveform()
376 ret = regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE); in stm32_pwm_write_waveform()
391 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_pwm_write_waveform()
394 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_write_waveform()
482 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_pwm_raw_capture()
483 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_raw_capture()
489 regmap_set_bits(priv->regmap, TIM_CCER, ccen); in stm32_pwm_raw_capture()
789 regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE); in stm32_pwm_detect_complementary()
825 regmap_set_bits(regmap, TIM_CCER, TIM_CCER_CCXE); in stm32_pwm_detect_channels()
H A Dpwm-jz4740.c93 regmap_set_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm), TCU_TCSR_PWM_EN); in jz4740_pwm_enable()
187 regmap_set_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm), in jz4740_pwm_apply()
207 regmap_set_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm), in jz4740_pwm_apply()
/linux/drivers/iio/light/
H A Dltr390.c188 ret = regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_UVS_MODE); in ltr390_set_mode()
625 ret = regmap_set_bits(data->regmap, LTR390_INT_CFG, LTR390_LS_INT_EN); in ltr390_do_event_config()
642 return regmap_set_bits(data->regmap, LTR390_INT_CFG, LTR390_LS_INT_SEL_UVS); in ltr390_do_event_config()
821 regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_SW_RESET); in ltr390_probe()
826 ret = regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_SENSOR_ENABLE); in ltr390_probe()
866 return regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, in ltr390_resume()
883 return regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_SENSOR_ENABLE); in ltr390_runtime_resume()
/linux/drivers/hwmon/
H A Dmax31760.c270 return regmap_set_bits(state->regmap, REG_CR3, BIT(channel)); in max31760_write()
285 return regmap_set_bits(state->regmap, REG_CR2, CR2_DFC); in max31760_write()
477 ret = regmap_set_bits(state->regmap, REG_CR1, CR1_HYST); in pwm1_auto_point_temp_hyst_store()
537 ret = regmap_set_bits(state->regmap, REG_CR2, CR2_ALERTS); in max31760_probe()
567 return regmap_set_bits(state->regmap, REG_CR2, CR2_STBY); in max31760_suspend()
/linux/sound/soc/codecs/
H A Djz4740.c222 regmap_set_bits(regmap, JZ4740_REG_CODEC_1, JZ4740_CODEC_1_RESET); in jz4740_codec_wakeup()
258 regmap_set_bits(regmap, JZ4740_REG_CODEC_1, mask); in jz4740_codec_set_bias_level()
262 regmap_set_bits(regmap, JZ4740_REG_CODEC_1, mask); in jz4740_codec_set_bias_level()
/linux/drivers/net/pcs/
H A Dpcs-mtk-lynxi.c164 regmap_set_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, in mtk_pcs_lynxi_config()
168 regmap_set_bits(mpcs->regmap, SGMSYS_RESERVED_0, in mtk_pcs_lynxi_config()
225 regmap_set_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1, BMCR_ANRESTART); in mtk_pcs_lynxi_restart_an()
/linux/drivers/iio/imu/inv_icm45600/
H A Dinv_icm45600_buffer.c261 ret = regmap_set_bits(st->map, INV_ICM45600_REG_FIFO_CONFIG2, in inv_icm45600_buffer_postenable()
266 ret = regmap_set_bits(st->map, INV_ICM45600_REG_INT1_CONFIG0, in inv_icm45600_buffer_postenable()
280 ret = regmap_set_bits(st->map, INV_ICM45600_REG_FIFO_CONFIG3, in inv_icm45600_buffer_postenable()
322 ret = regmap_set_bits(st->map, INV_ICM45600_REG_FIFO_CONFIG2, in inv_icm45600_buffer_predisable()
556 return regmap_set_bits(st->map, INV_ICM45600_REG_FIFO_CONFIG2, in inv_icm45600_buffer_init()
/linux/drivers/iio/trigger/
H A Dstm32-timer-trigger.c167 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE); in stm32_timer_start()
178 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_timer_start()
181 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_timer_start()
209 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_timer_stop()
510 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_counter_write_raw()
566 regmap_set_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS); in stm32_set_trigger_mode()
772 regmap_set_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS2); in stm32_timer_detect_trgo2()

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