Home
last modified time | relevance | path

Searched refs:regmap_set_bits (Results 1 – 25 of 136) sorted by relevance

123456

/linux/drivers/pmdomain/imx/
H A Dimx8mp-blk-ctrl.c179 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
182 regmap_set_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
185 regmap_set_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_on()
230 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
243 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
310 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(9)); in imx8mp_hdmi_blk_ctrl_power_on()
311 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(16)); in imx8mp_hdmi_blk_ctrl_power_on()
314 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
317 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_on()
318 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
[all …]
H A Dimx8m-blk-ctrl.c111 regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask); in imx8m_blk_ctrl_power_on()
124 regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); in imx8m_blk_ctrl_power_on()
126 regmap_set_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask); in imx8m_blk_ctrl_power_on()
430 regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(0) | BIT(1) | BIT(2)); in imx8mm_vpu_power_notifier()
441 regmap_set_bits(bc->regmap, 0x8, 0xffffffff); in imx8mm_vpu_power_notifier()
442 regmap_set_bits(bc->regmap, 0xc, 0xffffffff); in imx8mm_vpu_power_notifier()
443 regmap_set_bits(bc->regmap, 0x10, 0xffffffff); in imx8mm_vpu_power_notifier()
444 regmap_set_bits(bc->regmap, 0x14, 0xffffffff); in imx8mm_vpu_power_notifier()
534 regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(12)); in imx8mm_disp_power_notifier()
535 regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(6)); in imx8mm_disp_power_notifier()
[all …]
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8qm-hsio.c209 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2, in imx_hsio_pcie_phy_resets()
211 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2, in imx_hsio_pcie_phy_resets()
213 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL2, in imx_hsio_pcie_phy_resets()
217 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
219 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
222 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
224 regmap_set_bits(priv->phy, lane->phy_off + HSIO_CTRL0, in imx_hsio_pcie_phy_resets()
237 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0, in imx_hsio_sata_phy_resets()
241 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0, HSIO_RESET_N); in imx_hsio_sata_phy_resets()
245 regmap_set_bits(priv->ctrl, lane->ctrl_off + HSIO_CTRL0, HSIO_RESET_N); in imx_hsio_sata_phy_resets()
[all …]
/linux/drivers/usb/typec/mux/
H A Dwcd939x-usbss.c306 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_MG1_BIAS, in wcd939x_usbss_set()
312 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_MG2_BIAS, in wcd939x_usbss_set()
396 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
408 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SELECT1, in wcd939x_usbss_set()
414 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
420 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
467 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_EQUALIZER1, in wcd939x_usbss_set()
485 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
502 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_DISP_AUXP_THRESH, in wcd939x_usbss_set()
523 ret = regmap_set_bits(usbss->regmap, WCD_USBSS_SWITCH_SETTINGS_ENABLE, in wcd939x_usbss_set()
[all …]
/linux/sound/soc/codecs/
H A Djz4770.c204 regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_VIC, in jz4770_codec_set_bias_level()
206 regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_VIC, in jz4770_codec_set_bias_level()
298 regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, in jz4770_codec_mute_stream()
400 regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, in hpout_event()
407 regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_CR_HP, in hpout_event()
420 regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, in hpout_event()
609 regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_HP, REG_CR_HP_SEL_MASK); in jz4770_codec_codec_init_regs()
612 regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_LO, REG_CR_LO_SEL_MASK); in jz4770_codec_codec_init_regs()
623 regmap_set_bits(regmap, JZ4770_CODEC_REG_AICR_ADC, in jz4770_codec_codec_init_regs()
625 regmap_set_bits(regmap, JZ4770_CODEC_REG_AICR_DAC, in jz4770_codec_codec_init_regs()
[all …]
H A Djz4760.c186 regmap_set_bits(regmap, JZ4760_CODEC_REG_PMR1, REG_PMR1_SB_SLEEP); in jz4760_codec_set_bias_level()
187 regmap_set_bits(regmap, JZ4760_CODEC_REG_PMR1, REG_PMR1_SB); in jz4760_codec_set_bias_level()
377 regmap_set_bits(jz_codec->regmap, JZ4760_CODEC_REG_IFR, in hpout_event()
384 regmap_set_bits(jz_codec->regmap, JZ4760_CODEC_REG_CR1, in hpout_event()
397 regmap_set_bits(jz_codec->regmap, JZ4760_CODEC_REG_IFR, in hpout_event()
582 regmap_set_bits(regmap, JZ4760_CODEC_REG_CR1, REG_CR1_OUTSEL_MASK); in jz4760_codec_codec_init_regs()
593 regmap_set_bits(regmap, JZ4760_CODEC_REG_AICR, in jz4760_codec_codec_init_regs()
611 regmap_set_bits(jz_codec->regmap, JZ4760_CODEC_REG_CR2, in jz4760_codec_codec_init_regs()
H A Djz4740.c222 regmap_set_bits(regmap, JZ4740_REG_CODEC_1, JZ4740_CODEC_1_RESET); in jz4740_codec_wakeup()
257 regmap_set_bits(regmap, JZ4740_REG_CODEC_1, mask); in jz4740_codec_set_bias_level()
261 regmap_set_bits(regmap, JZ4740_REG_CODEC_1, mask); in jz4740_codec_set_bias_level()
/linux/drivers/pmdomain/mediatek/
H A Dmtk-pm-domains.c95 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_ISOINT_B_BIT); in scpsys_sram_enable()
110 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_CLKISO_BIT); in scpsys_sram_disable()
115 regmap_set_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits); in scpsys_sram_disable()
174 regmap_set_bits(regmap, bpd->bus_prot_set, bpd->bus_prot_set_clr_mask); in scpsys_bus_protect_set()
253 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT); in scpsys_power_on()
254 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT); in scpsys_power_on()
264 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); in scpsys_power_on()
326 regmap_set_bits(scpsys->base, pd->data->ext_buck_iso_offs, in scpsys_power_off()
332 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT); in scpsys_power_off()
333 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); in scpsys_power_off()
/linux/drivers/pwm/
H A Dpwm-stm32.c103 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_pwm_raw_capture()
104 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_raw_capture()
110 regmap_set_bits(priv->regmap, TIM_CCER, ccen); in stm32_pwm_raw_capture()
365 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE); in stm32_pwm_config()
383 regmap_set_bits(priv->regmap, TIM_BDTR, TIM_BDTR_MOE); in stm32_pwm_config()
417 regmap_set_bits(priv->regmap, TIM_CCER, mask); in stm32_pwm_enable()
420 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_pwm_enable()
423 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_enable()
616 regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE); in stm32_pwm_detect_complementary()
633 regmap_set_bits(regmap, TIM_CCER, TIM_CCER_CCXE); in stm32_pwm_detect_channels()
H A Dpwm-jz4740.c93 regmap_set_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm), TCU_TCSR_PWM_EN); in jz4740_pwm_enable()
187 regmap_set_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm), in jz4740_pwm_apply()
207 regmap_set_bits(jz->map, TCU_REG_TCSRc(pwm->hwpwm), in jz4740_pwm_apply()
/linux/drivers/misc/
H A Dtps6594-esm.c68 ret = regmap_set_bits(tps->regmap, TPS6594_REG_ESM_SOC_MODE_CFG, in tps6594_esm_probe()
73 ret = regmap_set_bits(tps->regmap, TPS6594_REG_ESM_SOC_START_REG, in tps6594_esm_probe()
126 return regmap_set_bits(tps->regmap, TPS6594_REG_ESM_SOC_START_REG, in tps6594_esm_resume()
/linux/drivers/mfd/
H A Dtps65910.c317 ret = regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL, in tps65910_sleepinit()
325 ret = regmap_set_bits(tps65910->regmap, in tps65910_sleepinit()
335 ret = regmap_set_bits(tps65910->regmap, in tps65910_sleepinit()
345 ret = regmap_set_bits(tps65910->regmap, in tps65910_sleepinit()
496 ret = regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL, in tps65910_i2c_probe()
/linux/sound/soc/fsl/
H A Dfsl_micfil.c457 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
556 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
578 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
582 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
586 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
590 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
598 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
602 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
606 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
640 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
[all …]
/linux/drivers/gpio/
H A Dgpio-tps65910.c46 regmap_set_bits(tps65910->regmap, TPS65910_GPIO0 + offset, in tps65910_gpio_set()
62 return regmap_set_bits(tps65910->regmap, TPS65910_GPIO0 + offset, in tps65910_gpio_output()
160 ret = regmap_set_bits(tps65910->regmap, in tps65910_gpio_probe()
/linux/drivers/iio/adc/
H A Dmeson_saradc.c549 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_start_sample_engine()
552 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_start_sample_engine()
555 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_start_sample_engine()
566 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG0, in meson_sar_adc_stop_sample_engine()
585 regmap_set_bits(priv->regmap, MESON_SAR_ADC_DELAY, in meson_sar_adc_lock()
875 regmap_set_bits(priv->regmap, MESON_SAR_ADC_REG3, in meson_sar_adc_init()
911 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
914 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
917 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
920 regmap_set_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, in meson_sar_adc_init()
[all …]
H A Dadi-axi-adc.c97 ret = regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable()
113 return regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable()
156 return regmap_set_bits(st->regmap, ADI_AXI_ADC_REG_CTRL, in axi_adc_data_sample_trigger()
281 return regmap_set_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan), in axi_adc_chan_enable()
/linux/drivers/rtc/
H A Drtc-tps6594.c80 return regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_shadow_timestamp()
146 return regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_set_time()
234 return regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_set_calibration()
377 ret = regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_2, in tps6594_rtc_probe()
388 ret = regmap_set_bits(tps->regmap, TPS6594_REG_RTC_CTRL_1, in tps6594_rtc_probe()
/linux/sound/soc/jz4740/
H A Djz4740-i2s.c107 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
109 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_RFLUSH); in jz4740_i2s_startup()
122 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
128 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_startup()
160 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, mask); in jz4740_i2s_trigger()
448 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_resume()
/linux/drivers/iio/dac/
H A Dadi-axi-dac.c92 ret = regmap_set_bits(st->regmap, AXI_DAC_REG_RSTN, in axi_dac_enable()
106 return regmap_set_bits(st->regmap, AXI_DAC_REG_RSTN, in axi_dac_enable()
274 return regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_1, AXI_DAC_SYNC); in __axi_dac_frequency_set()
332 ret = regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_1, AXI_DAC_SYNC); in axi_dac_scale_set()
369 ret = regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_1, AXI_DAC_SYNC); in axi_dac_phase_set()
616 ret = regmap_set_bits(st->regmap, AXI_DAC_REG_CNTRL_2, ADI_DAC_R1_MODE); in axi_dac_probe()
/linux/drivers/soc/qcom/
H A Dramp_controller.c82 ret = regmap_set_bits(r, d->cmd_reg, RC_ROOT_EN); in rc_wait_for_update()
108 ret = regmap_set_bits(r, d->cmd_reg + RC_REG_CFG_UPDATE, ce); in rc_set_cfg_update()
113 ret = regmap_set_bits(r, d->cmd_reg + RC_REG_CFG_UPDATE, RC_CFG_UPDATE_EN); in rc_set_cfg_update()
/linux/drivers/net/pcs/
H A Dpcs-mtk-lynxi.c146 regmap_set_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, in mtk_pcs_lynxi_config()
150 regmap_set_bits(mpcs->regmap, SGMSYS_RESERVED_0, in mtk_pcs_lynxi_config()
207 regmap_set_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1, BMCR_ANRESTART); in mtk_pcs_lynxi_restart_an()
/linux/drivers/hwmon/
H A Dmax31760.c270 return regmap_set_bits(state->regmap, REG_CR3, BIT(channel)); in max31760_write()
285 return regmap_set_bits(state->regmap, REG_CR2, CR2_DFC); in max31760_write()
477 ret = regmap_set_bits(state->regmap, REG_CR1, CR1_HYST); in pwm1_auto_point_temp_hyst_store()
537 ret = regmap_set_bits(state->regmap, REG_CR2, CR2_ALERTS); in max31760_probe()
567 return regmap_set_bits(state->regmap, REG_CR2, CR2_STBY); in max31760_suspend()
/linux/drivers/iio/trigger/
H A Dstm32-timer-trigger.c161 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE); in stm32_timer_start()
172 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_timer_start()
175 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_timer_start()
204 regmap_set_bits(priv->regmap, TIM_EGR, TIM_EGR_UG); in stm32_timer_stop()
501 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_counter_write_raw()
556 regmap_set_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS); in stm32_set_trigger_mode()
758 regmap_set_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS2); in stm32_timer_detect_trgo2()
/linux/sound/soc/mediatek/mt8188/
H A Dmt8188-dai-adda.c42 regmap_set_bits(afe->regmap, AFE_ADDA_MTKAIF_CFG0, in mt8188_adda_mtkaif_init()
45 regmap_set_bits(afe->regmap, AFE_AUD_PAD_TOP, RG_RX_PROTOCOL2); in mt8188_adda_mtkaif_init()
128 regmap_set_bits(afe->regmap, reg, val); in mtk_adda_ul_mictype()
380 regmap_set_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON, in mtk_dai_da_configure()
/linux/drivers/iio/light/
H A Dltr390.c119 ret = regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_UVS_MODE); in ltr390_set_mode()
359 regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_SW_RESET); in ltr390_probe()
364 ret = regmap_set_bits(data->regmap, LTR390_MAIN_CTRL, LTR390_SENSOR_ENABLE); in ltr390_probe()

123456