| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 136 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
137 .reg_name_pre ## _ ## reg_name_post[id] = BASE(mm ## reg_name_pre \
138 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
139 mm ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 666 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
667 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
668 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
669 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 679 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
680 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
681 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
682 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 671 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
672 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
673 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
674 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 672 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
673 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
674 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
675 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 534 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
535 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
536 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
537 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 547 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
548 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
549 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
550 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 527 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
528 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
529 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
530 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 521 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
522 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
523 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
524 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 501 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
502 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
503 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
504 reg ## reg_name_pre ## id ## _ ## reg_name_post
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 525 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
526 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
527 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
528 reg ## reg_name_pre ## id ## _ ## reg_name_post
|