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Searched refs:regGFX_IMU_D_RAM_ADDR (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v12_0.c114 WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, 0); in imu_v12_0_load_microcode()
119 WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, adev->gfx.imu_fw_version); in imu_v12_0_load_microcode()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_12_0_0_offset.h7159 #define regGFX_IMU_D_RAM_ADDR … macro
H A Dgc_11_0_3_offset.h11700 #define regGFX_IMU_D_RAM_ADDR … macro
H A Dgc_11_0_0_offset.h11297 #define regGFX_IMU_D_RAM_ADDR … macro