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Searched refs:regGCMC_VM_FB_LOCATION_BASE (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0_3.c74 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0xe0000000),
125 else if (entry->reg == regGCMC_VM_FB_LOCATION_BASE) in program_rlc_ram_register_setting()
H A Dimu_v12_0.c229 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0x1c0000),
268 else if (entry->reg == regGCMC_VM_FB_LOCATION_BASE) in program_imu_rlc_ram_old()
302 if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_FB_LOCATION_BASE)) in imu_v12_init_gfxhub_settings()
H A Dimu_v11_0.c235 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0xe0000000),
289 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0xe0000000),
335 else if (entry->reg == regGCMC_VM_FB_LOCATION_BASE) in program_imu_rlc_ram()
H A Dgfxhub_v11_5_0.c111 u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE); in gfxhub_v11_5_0_get_fb_location()
363 WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE, in gfxhub_v11_5_0_gart_enable()
H A Dgfxhub_v3_0.c106 u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE); in gfxhub_v3_0_get_fb_location()
360 WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE, in gfxhub_v3_0_gart_enable()
H A Dgfxhub_v12_0.c113 u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE); in gfxhub_v12_0_get_fb_location()
368 WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE, in gfxhub_v12_0_gart_enable()
H A Dgfxhub_v3_0_3.c109 u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE); in gfxhub_v3_0_3_get_fb_location()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h1995 #define regGCMC_VM_FB_LOCATION_BASE … macro
H A Dgc_12_0_0_offset.h2872 #define regGCMC_VM_FB_LOCATION_BASE … macro
H A Dgc_11_0_3_offset.h3004 #define regGCMC_VM_FB_LOCATION_BASE … macro
H A Dgc_11_0_0_offset.h2830 #define regGCMC_VM_FB_LOCATION_BASE … macro